gpio: rcar: Fix runtime PM imbalance on error
[linux/fpc-iii.git] / drivers / watchdog / booke_wdt.c
blob9d09bbfdef20eff0dc1ef07ebbcfc7f95ee920ef
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Watchdog timer for PowerPC Book-E systems
5 * Author: Matthew McClintock
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
8 * Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
9 */
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/module.h>
14 #include <linux/smp.h>
15 #include <linux/watchdog.h>
17 #include <asm/reg_booke.h>
18 #include <asm/time.h>
19 #include <asm/div64.h>
21 /* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
22 * Also, the wdt_period sets the watchdog timer period timeout.
23 * For E500 cpus the wdt_period sets which bit changing from 0->1 will
24 * trigger a watchdog timeout. This watchdog timeout will occur 3 times, the
25 * first time nothing will happen, the second time a watchdog exception will
26 * occur, and the final time the board will reset.
30 #ifdef CONFIG_PPC_FSL_BOOK3E
31 #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
32 #define WDTP_MASK (WDTP(0x3f))
33 #else
34 #define WDTP(x) (TCR_WP(x))
35 #define WDTP_MASK (TCR_WP_MASK)
36 #endif
38 static bool booke_wdt_enabled;
39 module_param(booke_wdt_enabled, bool, 0);
40 static int booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
41 module_param(booke_wdt_period, int, 0);
43 #ifdef CONFIG_PPC_FSL_BOOK3E
45 /* For the specified period, determine the number of seconds
46 * corresponding to the reset time. There will be a watchdog
47 * exception at approximately 3/5 of this time.
49 * The formula to calculate this is given by:
50 * 2.5 * (2^(63-period+1)) / timebase_freq
52 * In order to simplify things, we assume that period is
53 * at least 1. This will still result in a very long timeout.
55 static unsigned long long period_to_sec(unsigned int period)
57 unsigned long long tmp = 1ULL << (64 - period);
58 unsigned long tmp2 = ppc_tb_freq;
60 /* tmp may be a very large number and we don't want to overflow,
61 * so divide the timebase freq instead of multiplying tmp
63 tmp2 = tmp2 / 5 * 2;
65 do_div(tmp, tmp2);
66 return tmp;
70 * This procedure will find the highest period which will give a timeout
71 * greater than the one required. e.g. for a bus speed of 66666666 and
72 * and a parameter of 2 secs, then this procedure will return a value of 38.
74 static unsigned int sec_to_period(unsigned int secs)
76 unsigned int period;
77 for (period = 63; period > 0; period--) {
78 if (period_to_sec(period) >= secs)
79 return period;
81 return 0;
84 #define MAX_WDT_TIMEOUT period_to_sec(1)
86 #else /* CONFIG_PPC_FSL_BOOK3E */
88 static unsigned long long period_to_sec(unsigned int period)
90 return period;
93 static unsigned int sec_to_period(unsigned int secs)
95 return secs;
98 #define MAX_WDT_TIMEOUT 3 /* from Kconfig */
100 #endif /* !CONFIG_PPC_FSL_BOOK3E */
102 static void __booke_wdt_set(void *data)
104 u32 val;
105 struct watchdog_device *wdog = data;
107 val = mfspr(SPRN_TCR);
108 val &= ~WDTP_MASK;
109 val |= WDTP(sec_to_period(wdog->timeout));
111 mtspr(SPRN_TCR, val);
114 static void booke_wdt_set(void *data)
116 on_each_cpu(__booke_wdt_set, data, 0);
119 static void __booke_wdt_ping(void *data)
121 mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
124 static int booke_wdt_ping(struct watchdog_device *wdog)
126 on_each_cpu(__booke_wdt_ping, NULL, 0);
128 return 0;
131 static void __booke_wdt_enable(void *data)
133 u32 val;
134 struct watchdog_device *wdog = data;
136 /* clear status before enabling watchdog */
137 __booke_wdt_ping(NULL);
138 val = mfspr(SPRN_TCR);
139 val &= ~WDTP_MASK;
140 val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(sec_to_period(wdog->timeout)));
142 mtspr(SPRN_TCR, val);
146 * booke_wdt_disable - disable the watchdog on the given CPU
148 * This function is called on each CPU. It disables the watchdog on that CPU.
150 * TCR[WRC] cannot be changed once it has been set to non-zero, but we can
151 * effectively disable the watchdog by setting its period to the maximum value.
153 static void __booke_wdt_disable(void *data)
155 u32 val;
157 val = mfspr(SPRN_TCR);
158 val &= ~(TCR_WIE | WDTP_MASK);
159 mtspr(SPRN_TCR, val);
161 /* clear status to make sure nothing is pending */
162 __booke_wdt_ping(NULL);
166 static int booke_wdt_start(struct watchdog_device *wdog)
168 on_each_cpu(__booke_wdt_enable, wdog, 0);
169 pr_debug("watchdog enabled (timeout = %u sec)\n", wdog->timeout);
171 return 0;
174 static int booke_wdt_stop(struct watchdog_device *wdog)
176 on_each_cpu(__booke_wdt_disable, NULL, 0);
177 pr_debug("watchdog disabled\n");
179 return 0;
182 static int booke_wdt_set_timeout(struct watchdog_device *wdt_dev,
183 unsigned int timeout)
185 wdt_dev->timeout = timeout;
186 booke_wdt_set(wdt_dev);
188 return 0;
191 static struct watchdog_info booke_wdt_info __ro_after_init = {
192 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
193 .identity = "PowerPC Book-E Watchdog",
196 static const struct watchdog_ops booke_wdt_ops = {
197 .owner = THIS_MODULE,
198 .start = booke_wdt_start,
199 .stop = booke_wdt_stop,
200 .ping = booke_wdt_ping,
201 .set_timeout = booke_wdt_set_timeout,
204 static struct watchdog_device booke_wdt_dev = {
205 .info = &booke_wdt_info,
206 .ops = &booke_wdt_ops,
207 .min_timeout = 1,
210 static void __exit booke_wdt_exit(void)
212 watchdog_unregister_device(&booke_wdt_dev);
215 static int __init booke_wdt_init(void)
217 int ret = 0;
218 bool nowayout = WATCHDOG_NOWAYOUT;
220 pr_info("powerpc book-e watchdog driver loaded\n");
221 booke_wdt_info.firmware_version = cur_cpu_spec->pvr_value;
222 booke_wdt_set_timeout(&booke_wdt_dev,
223 period_to_sec(booke_wdt_period));
224 watchdog_set_nowayout(&booke_wdt_dev, nowayout);
225 booke_wdt_dev.max_timeout = MAX_WDT_TIMEOUT;
226 if (booke_wdt_enabled)
227 booke_wdt_start(&booke_wdt_dev);
229 ret = watchdog_register_device(&booke_wdt_dev);
231 return ret;
234 module_init(booke_wdt_init);
235 module_exit(booke_wdt_exit);
237 MODULE_ALIAS("booke_wdt");
238 MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
239 MODULE_LICENSE("GPL");