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ixgbe: remove IXGBE_FLAG_MSI(X)_CAPABLE flags
[linux/fpc-iii.git] / drivers / parport / parport_serial.c
blobee932004724f6b24f77ea416b8211fbd8c681d55
1 /*
2 * Support for common PCI multi-I/O cards (which is most of them)
3 *
4 * Copyright (C) 2001 Tim Waugh <twaugh@redhat.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 *
12 * Multi-function PCI cards are supposed to present separate logical
13 * devices on the bus. A common thing to do seems to be to just use
14 * one logical device with lots of base address registers for both
15 * parallel ports and serial ports. This driver is for dealing with
16 * that.
17 *
18 */
19
20 #include <linux/types.h>
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/pci.h>
25 #include <linux/interrupt.h>
26 #include <linux/parport.h>
27 #include <linux/parport_pc.h>
28 #include <linux/8250_pci.h>
29
30 enum parport_pc_pci_cards {
31 titan_110l = 0,
32 titan_210l,
33 netmos_9xx5_combo,
34 netmos_9855,
35 netmos_9855_2p,
36 netmos_9900,
37 netmos_9900_2p,
38 netmos_99xx_1p,
39 avlab_1s1p,
40 avlab_1s2p,
41 avlab_2s1p,
42 siig_1s1p_10x,
43 siig_2s1p_10x,
44 siig_2p1s_20x,
45 siig_1s1p_20x,
46 siig_2s1p_20x,
47 timedia_4078a,
48 timedia_4079h,
49 timedia_4085h,
50 timedia_4088a,
51 timedia_4089a,
52 timedia_4095a,
53 timedia_4096a,
54 timedia_4078u,
55 timedia_4079a,
56 timedia_4085u,
57 timedia_4079r,
58 timedia_4079s,
59 timedia_4079d,
60 timedia_4079e,
61 timedia_4079f,
62 timedia_9079a,
63 timedia_9079b,
64 timedia_9079c,
65 wch_ch353_1s1p,
66 wch_ch353_2s1p,
67 sunix_2s1p,
68 };
69
70 /* each element directly indexed from enum list, above */
71 struct parport_pc_pci {
72 int numports;
73 struct { /* BAR (base address registers) numbers in the config
74 space header */
75 int lo;
76 int hi; /* -1 if not there, >6 for offset-method (max
77 BAR is 6) */
78 } addr[4];
79
80 /* If set, this is called immediately after pci_enable_device.
81 * If it returns non-zero, no probing will take place and the
82 * ports will not be used. */
83 int (*preinit_hook) (struct pci_dev *pdev, struct parport_pc_pci *card,
84 int autoirq, int autodma);
85
86 /* If set, this is called after probing for ports. If 'failed'
87 * is non-zero we couldn't use any of the ports. */
88 void (*postinit_hook) (struct pci_dev *pdev,
89 struct parport_pc_pci *card, int failed);
90 };
91
92 static int netmos_parallel_init(struct pci_dev *dev, struct parport_pc_pci *par,
93 int autoirq, int autodma)
94 {
95 /* the rule described below doesn't hold for this device */
96 if (dev->device == PCI_DEVICE_ID_NETMOS_9835 &&
97 dev->subsystem_vendor == PCI_VENDOR_ID_IBM &&
98 dev->subsystem_device == 0x0299)
99 return -ENODEV;
100
101 if (dev->device == PCI_DEVICE_ID_NETMOS_9912) {
102 par->numports = 1;
103 } else {
104 /*
105 * Netmos uses the subdevice ID to indicate the number of parallel
106 * and serial ports. The form is 0x00PS, where <P> is the number of
107 * parallel ports and <S> is the number of serial ports.
108 */
109 par->numports = (dev->subsystem_device & 0xf0) >> 4;
110 if (par->numports > ARRAY_SIZE(par->addr))
111 par->numports = ARRAY_SIZE(par->addr);
112 }
113
114 return 0;
115 }
116
117 static struct parport_pc_pci cards[] = {
118 /* titan_110l */ { 1, { { 3, -1 }, } },
119 /* titan_210l */ { 1, { { 3, -1 }, } },
120 /* netmos_9xx5_combo */ { 1, { { 2, -1 }, }, netmos_parallel_init },
121 /* netmos_9855 */ { 1, { { 0, -1 }, }, netmos_parallel_init },
122 /* netmos_9855_2p */ { 2, { { 0, -1 }, { 2, -1 }, } },
123 /* netmos_9900 */ {1, { { 3, 4 }, }, netmos_parallel_init },
124 /* netmos_9900_2p */ {2, { { 0, 1 }, { 3, 4 }, } },
125 /* netmos_99xx_1p */ {1, { { 0, 1 }, } },
126 /* avlab_1s1p */ { 1, { { 1, 2}, } },
127 /* avlab_1s2p */ { 2, { { 1, 2}, { 3, 4 },} },
128 /* avlab_2s1p */ { 1, { { 2, 3}, } },
129 /* siig_1s1p_10x */ { 1, { { 3, 4 }, } },
130 /* siig_2s1p_10x */ { 1, { { 4, 5 }, } },
131 /* siig_2p1s_20x */ { 2, { { 1, 2 }, { 3, 4 }, } },
132 /* siig_1s1p_20x */ { 1, { { 1, 2 }, } },
133 /* siig_2s1p_20x */ { 1, { { 2, 3 }, } },
134 /* timedia_4078a */ { 1, { { 2, -1 }, } },
135 /* timedia_4079h */ { 1, { { 2, 3 }, } },
136 /* timedia_4085h */ { 2, { { 2, -1 }, { 4, -1 }, } },
137 /* timedia_4088a */ { 2, { { 2, 3 }, { 4, 5 }, } },
138 /* timedia_4089a */ { 2, { { 2, 3 }, { 4, 5 }, } },
139 /* timedia_4095a */ { 2, { { 2, 3 }, { 4, 5 }, } },
140 /* timedia_4096a */ { 2, { { 2, 3 }, { 4, 5 }, } },
141 /* timedia_4078u */ { 1, { { 2, -1 }, } },
142 /* timedia_4079a */ { 1, { { 2, 3 }, } },
143 /* timedia_4085u */ { 2, { { 2, -1 }, { 4, -1 }, } },
144 /* timedia_4079r */ { 1, { { 2, 3 }, } },
145 /* timedia_4079s */ { 1, { { 2, 3 }, } },
146 /* timedia_4079d */ { 1, { { 2, 3 }, } },
147 /* timedia_4079e */ { 1, { { 2, 3 }, } },
148 /* timedia_4079f */ { 1, { { 2, 3 }, } },
149 /* timedia_9079a */ { 1, { { 2, 3 }, } },
150 /* timedia_9079b */ { 1, { { 2, 3 }, } },
151 /* timedia_9079c */ { 1, { { 2, 3 }, } },
152 /* wch_ch353_1s1p*/ { 1, { { 1, -1}, } },
153 /* wch_ch353_2s1p*/ { 1, { { 2, -1}, } },
154 /* sunix_2s1p */ { 1, { { 3, -1 }, } },
155 };
156
157 #define PCI_VENDOR_ID_SUNIX 0x1fd4
158 #define PCI_DEVICE_ID_SUNIX_1999 0x1999
159
160 static struct pci_device_id parport_serial_pci_tbl[] = {
161 /* PCI cards */
162 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_110L,
163 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_110l },
164 { PCI_VENDOR_ID_TITAN, PCI_DEVICE_ID_TITAN_210L,
165 PCI_ANY_ID, PCI_ANY_ID, 0, 0, titan_210l },
166 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9735,
167 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
168 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9745,
169 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
170 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835,
171 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
172 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9845,
173 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9xx5_combo },
174 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
175 0x1000, 0x0020, 0, 0, netmos_9855_2p },
176 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
177 0x1000, 0x0022, 0, 0, netmos_9855_2p },
178 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9855,
179 PCI_ANY_ID, PCI_ANY_ID, 0, 0, netmos_9855 },
180 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
181 0xA000, 0x3011, 0, 0, netmos_9900 },
182 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
183 0xA000, 0x3012, 0, 0, netmos_9900 },
184 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9900,
185 0xA000, 0x3020, 0, 0, netmos_9900_2p },
186 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9912,
187 0xA000, 0x2000, 0, 0, netmos_99xx_1p },
188 /* PCI_VENDOR_ID_AVLAB/Intek21 has another bunch of cards ...*/
189 { PCI_VENDOR_ID_AFAVLAB, 0x2110,
190 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
191 { PCI_VENDOR_ID_AFAVLAB, 0x2111,
192 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
193 { PCI_VENDOR_ID_AFAVLAB, 0x2112,
194 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s1p },
195 { PCI_VENDOR_ID_AFAVLAB, 0x2140,
196 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
197 { PCI_VENDOR_ID_AFAVLAB, 0x2141,
198 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
199 { PCI_VENDOR_ID_AFAVLAB, 0x2142,
200 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_1s2p },
201 { PCI_VENDOR_ID_AFAVLAB, 0x2160,
202 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
203 { PCI_VENDOR_ID_AFAVLAB, 0x2161,
204 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
205 { PCI_VENDOR_ID_AFAVLAB, 0x2162,
206 PCI_ANY_ID, PCI_ANY_ID, 0, 0, avlab_2s1p },
207 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_550,
208 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
209 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_650,
210 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
211 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_10x_850,
212 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_10x },
213 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_550,
214 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
215 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_650,
216 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
217 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_10x_850,
218 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_10x },
219 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_550,
220 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
221 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_650,
222 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
223 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2P1S_20x_850,
224 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2p1s_20x },
225 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_550,
226 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
227 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_650,
228 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
229 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_1S1P_20x_850,
230 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_1s1p_20x },
231 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_550,
232 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
233 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_650,
234 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
235 { PCI_VENDOR_ID_SIIG, PCI_DEVICE_ID_SIIG_2S1P_20x_850,
236 PCI_ANY_ID, PCI_ANY_ID, 0, 0, siig_2s1p_20x },
237 /* PCI_VENDOR_ID_TIMEDIA/SUNIX has many differing cards ...*/
238 { 0x1409, 0x7168, 0x1409, 0x4078, 0, 0, timedia_4078a },
239 { 0x1409, 0x7168, 0x1409, 0x4079, 0, 0, timedia_4079h },
240 { 0x1409, 0x7168, 0x1409, 0x4085, 0, 0, timedia_4085h },
241 { 0x1409, 0x7168, 0x1409, 0x4088, 0, 0, timedia_4088a },
242 { 0x1409, 0x7168, 0x1409, 0x4089, 0, 0, timedia_4089a },
243 { 0x1409, 0x7168, 0x1409, 0x4095, 0, 0, timedia_4095a },
244 { 0x1409, 0x7168, 0x1409, 0x4096, 0, 0, timedia_4096a },
245 { 0x1409, 0x7168, 0x1409, 0x5078, 0, 0, timedia_4078u },
246 { 0x1409, 0x7168, 0x1409, 0x5079, 0, 0, timedia_4079a },
247 { 0x1409, 0x7168, 0x1409, 0x5085, 0, 0, timedia_4085u },
248 { 0x1409, 0x7168, 0x1409, 0x6079, 0, 0, timedia_4079r },
249 { 0x1409, 0x7168, 0x1409, 0x7079, 0, 0, timedia_4079s },
250 { 0x1409, 0x7168, 0x1409, 0x8079, 0, 0, timedia_4079d },
251 { 0x1409, 0x7168, 0x1409, 0x9079, 0, 0, timedia_4079e },
252 { 0x1409, 0x7168, 0x1409, 0xa079, 0, 0, timedia_4079f },
253 { 0x1409, 0x7168, 0x1409, 0xb079, 0, 0, timedia_9079a },
254 { 0x1409, 0x7168, 0x1409, 0xc079, 0, 0, timedia_9079b },
255 { 0x1409, 0x7168, 0x1409, 0xd079, 0, 0, timedia_9079c },
256
257 /* WCH CARDS */
258 { 0x4348, 0x5053, PCI_ANY_ID, PCI_ANY_ID, 0, 0, wch_ch353_1s1p},
259 { 0x4348, 0x7053, 0x4348, 0x3253, 0, 0, wch_ch353_2s1p},
260
261 /*
262 * More SUNIX variations. At least one of these has part number
263 * '5079A but subdevice 0x102. That board reports 0x0708 as
264 * its PCI Class.
265 */
266 { PCI_VENDOR_ID_SUNIX, PCI_DEVICE_ID_SUNIX_1999, PCI_VENDOR_ID_SUNIX,
267 0x0102, 0, 0, sunix_2s1p },
268
269 { 0, } /* terminate list */
270 };
271 MODULE_DEVICE_TABLE(pci,parport_serial_pci_tbl);
272
273 /*
274 * This table describes the serial "geometry" of these boards. Any
275 * quirks for these can be found in drivers/serial/8250_pci.c
276 *
277 * Cards not tested are marked n/t
278 * If you have one of these cards and it works for you, please tell me..
279 */
280 static struct pciserial_board pci_parport_serial_boards[] = {
281 [titan_110l] = {
282 .flags = FL_BASE1 | FL_BASE_BARS,
283 .num_ports = 1,
284 .base_baud = 921600,
285 .uart_offset = 8,
286 },
287 [titan_210l] = {
288 .flags = FL_BASE1 | FL_BASE_BARS,
289 .num_ports = 2,
290 .base_baud = 921600,
291 .uart_offset = 8,
292 },
293 [netmos_9xx5_combo] = {
294 .flags = FL_BASE0 | FL_BASE_BARS,
295 .num_ports = 1,
296 .base_baud = 115200,
297 .uart_offset = 8,
298 },
299 [netmos_9855] = {
300 .flags = FL_BASE2 | FL_BASE_BARS,
301 .num_ports = 1,
302 .base_baud = 115200,
303 .uart_offset = 8,
304 },
305 [netmos_9855_2p] = {
306 .flags = FL_BASE4 | FL_BASE_BARS,
307 .num_ports = 1,
308 .base_baud = 115200,
309 .uart_offset = 8,
310 },
311 [netmos_9900] = { /* n/t */
312 .flags = FL_BASE0 | FL_BASE_BARS,
313 .num_ports = 1,
314 .base_baud = 115200,
315 .uart_offset = 8,
316 },
317 [netmos_9900_2p] = { /* parallel only */ /* n/t */
318 .flags = FL_BASE0,
319 .num_ports = 0,
320 .base_baud = 115200,
321 .uart_offset = 8,
322 },
323 [netmos_99xx_1p] = { /* parallel only */ /* n/t */
324 .flags = FL_BASE0,
325 .num_ports = 0,
326 .base_baud = 115200,
327 .uart_offset = 8,
328 },
329 [avlab_1s1p] = { /* n/t */
330 .flags = FL_BASE0 | FL_BASE_BARS,
331 .num_ports = 1,
332 .base_baud = 115200,
333 .uart_offset = 8,
334 },
335 [avlab_1s2p] = { /* n/t */
336 .flags = FL_BASE0 | FL_BASE_BARS,
337 .num_ports = 1,
338 .base_baud = 115200,
339 .uart_offset = 8,
340 },
341 [avlab_2s1p] = { /* n/t */
342 .flags = FL_BASE0 | FL_BASE_BARS,
343 .num_ports = 2,
344 .base_baud = 115200,
345 .uart_offset = 8,
346 },
347 [siig_1s1p_10x] = {
348 .flags = FL_BASE2,
349 .num_ports = 1,
350 .base_baud = 460800,
351 .uart_offset = 8,
352 },
353 [siig_2s1p_10x] = {
354 .flags = FL_BASE2,
355 .num_ports = 1,
356 .base_baud = 921600,
357 .uart_offset = 8,
358 },
359 [siig_2p1s_20x] = {
360 .flags = FL_BASE0,
361 .num_ports = 1,
362 .base_baud = 921600,
363 .uart_offset = 8,
364 },
365 [siig_1s1p_20x] = {
366 .flags = FL_BASE0,
367 .num_ports = 1,
368 .base_baud = 921600,
369 .uart_offset = 8,
370 },
371 [siig_2s1p_20x] = {
372 .flags = FL_BASE0,
373 .num_ports = 1,
374 .base_baud = 921600,
375 .uart_offset = 8,
376 },
377 [timedia_4078a] = {
378 .flags = FL_BASE0|FL_BASE_BARS,
379 .num_ports = 1,
380 .base_baud = 921600,
381 .uart_offset = 8,
382 },
383 [timedia_4079h] = {
384 .flags = FL_BASE0|FL_BASE_BARS,
385 .num_ports = 1,
386 .base_baud = 921600,
387 .uart_offset = 8,
388 },
389 [timedia_4085h] = {
390 .flags = FL_BASE0|FL_BASE_BARS,
391 .num_ports = 1,
392 .base_baud = 921600,
393 .uart_offset = 8,
394 },
395 [timedia_4088a] = {
396 .flags = FL_BASE0|FL_BASE_BARS,
397 .num_ports = 1,
398 .base_baud = 921600,
399 .uart_offset = 8,
400 },
401 [timedia_4089a] = {
402 .flags = FL_BASE0|FL_BASE_BARS,
403 .num_ports = 1,
404 .base_baud = 921600,
405 .uart_offset = 8,
406 },
407 [timedia_4095a] = {
408 .flags = FL_BASE0|FL_BASE_BARS,
409 .num_ports = 1,
410 .base_baud = 921600,
411 .uart_offset = 8,
412 },
413 [timedia_4096a] = {
414 .flags = FL_BASE0|FL_BASE_BARS,
415 .num_ports = 1,
416 .base_baud = 921600,
417 .uart_offset = 8,
418 },
419 [timedia_4078u] = {
420 .flags = FL_BASE0|FL_BASE_BARS,
421 .num_ports = 1,
422 .base_baud = 921600,
423 .uart_offset = 8,
424 },
425 [timedia_4079a] = {
426 .flags = FL_BASE0|FL_BASE_BARS,
427 .num_ports = 1,
428 .base_baud = 921600,
429 .uart_offset = 8,
430 },
431 [timedia_4085u] = {
432 .flags = FL_BASE0|FL_BASE_BARS,
433 .num_ports = 1,
434 .base_baud = 921600,
435 .uart_offset = 8,
436 },
437 [timedia_4079r] = {
438 .flags = FL_BASE0|FL_BASE_BARS,
439 .num_ports = 1,
440 .base_baud = 921600,
441 .uart_offset = 8,
442 },
443 [timedia_4079s] = {
444 .flags = FL_BASE0|FL_BASE_BARS,
445 .num_ports = 1,
446 .base_baud = 921600,
447 .uart_offset = 8,
448 },
449 [timedia_4079d] = {
450 .flags = FL_BASE0|FL_BASE_BARS,
451 .num_ports = 1,
452 .base_baud = 921600,
453 .uart_offset = 8,
454 },
455 [timedia_4079e] = {
456 .flags = FL_BASE0|FL_BASE_BARS,
457 .num_ports = 1,
458 .base_baud = 921600,
459 .uart_offset = 8,
460 },
461 [timedia_4079f] = {
462 .flags = FL_BASE0|FL_BASE_BARS,
463 .num_ports = 1,
464 .base_baud = 921600,
465 .uart_offset = 8,
466 },
467 [timedia_9079a] = {
468 .flags = FL_BASE0|FL_BASE_BARS,
469 .num_ports = 1,
470 .base_baud = 921600,
471 .uart_offset = 8,
472 },
473 [timedia_9079b] = {
474 .flags = FL_BASE0|FL_BASE_BARS,
475 .num_ports = 1,
476 .base_baud = 921600,
477 .uart_offset = 8,
478 },
479 [timedia_9079c] = {
480 .flags = FL_BASE0|FL_BASE_BARS,
481 .num_ports = 1,
482 .base_baud = 921600,
483 .uart_offset = 8,
484 },
485 [wch_ch353_1s1p] = {
486 .flags = FL_BASE0|FL_BASE_BARS,
487 .num_ports = 1,
488 .base_baud = 115200,
489 .uart_offset = 8,
490 },
491 [wch_ch353_2s1p] = {
492 .flags = FL_BASE0|FL_BASE_BARS,
493 .num_ports = 2,
494 .base_baud = 115200,
495 .uart_offset = 8,
496 },
497 [sunix_2s1p] = {
498 .flags = FL_BASE0|FL_BASE_BARS,
499 .num_ports = 2,
500 .base_baud = 921600,
501 .uart_offset = 8,
502 },
503 };
504
505 struct parport_serial_private {
506 struct serial_private *serial;
507 int num_par;
508 struct parport *port[PARPORT_MAX];
509 struct parport_pc_pci par;
510 };
511
512 /* Register the serial port(s) of a PCI card. */
513 static int serial_register(struct pci_dev *dev, const struct pci_device_id *id)
514 {
515 struct parport_serial_private *priv = pci_get_drvdata (dev);
516 struct pciserial_board *board;
517 struct serial_private *serial;
518
519 board = &pci_parport_serial_boards[id->driver_data];
520
521 if (board->num_ports == 0)
522 return 0;
523
524 serial = pciserial_init_ports(dev, board);
525
526 if (IS_ERR(serial))
527 return PTR_ERR(serial);
528
529 priv->serial = serial;
530 return 0;
531 }
532
533 /* Register the parallel port(s) of a PCI card. */
534 static int parport_register(struct pci_dev *dev, const struct pci_device_id *id)
535 {
536 struct parport_pc_pci *card;
537 struct parport_serial_private *priv = pci_get_drvdata (dev);
538 int n, success = 0;
539
540 priv->par = cards[id->driver_data];
541 card = &priv->par;
542 if (card->preinit_hook &&
543 card->preinit_hook (dev, card, PARPORT_IRQ_NONE, PARPORT_DMA_NONE))
544 return -ENODEV;
545
546 for (n = 0; n < card->numports; n++) {
547 struct parport *port;
548 int lo = card->addr[n].lo;
549 int hi = card->addr[n].hi;
550 unsigned long io_lo, io_hi;
551 int irq;
552
553 if (priv->num_par == ARRAY_SIZE (priv->port)) {
554 printk (KERN_WARNING
555 "parport_serial: %s: only %zu parallel ports "
556 "supported (%d reported)\n", pci_name (dev),
557 ARRAY_SIZE(priv->port), card->numports);
558 break;
559 }
560
561 io_lo = pci_resource_start (dev, lo);
562 io_hi = 0;
563 if ((hi >= 0) && (hi <= 6))
564 io_hi = pci_resource_start (dev, hi);
565 else if (hi > 6)
566 io_lo += hi; /* Reinterpret the meaning of
567 "hi" as an offset (see SYBA
568 def.) */
569 /* TODO: test if sharing interrupts works */
570 irq = dev->irq;
571 if (irq == IRQ_NONE) {
572 dev_dbg(&dev->dev,
573 "PCI parallel port detected: I/O at %#lx(%#lx)\n",
574 io_lo, io_hi);
575 irq = PARPORT_IRQ_NONE;
576 } else {
577 dev_dbg(&dev->dev,
578 "PCI parallel port detected: I/O at %#lx(%#lx), IRQ %d\n",
579 io_lo, io_hi, irq);
580 }
581 port = parport_pc_probe_port (io_lo, io_hi, irq,
582 PARPORT_DMA_NONE, &dev->dev, IRQF_SHARED);
583 if (port) {
584 priv->port[priv->num_par++] = port;
585 success = 1;
586 }
587 }
588
589 if (card->postinit_hook)
590 card->postinit_hook (dev, card, !success);
591
592 return 0;
593 }
594
595 static int parport_serial_pci_probe(struct pci_dev *dev,
596 const struct pci_device_id *id)
597 {
598 struct parport_serial_private *priv;
599 int err;
600
601 priv = kzalloc (sizeof *priv, GFP_KERNEL);
602 if (!priv)
603 return -ENOMEM;
604 pci_set_drvdata (dev, priv);
605
606 err = pci_enable_device (dev);
607 if (err) {
608 kfree (priv);
609 return err;
610 }
611
612 if (parport_register (dev, id)) {
613 kfree (priv);
614 return -ENODEV;
615 }
616
617 if (serial_register (dev, id)) {
618 int i;
619 for (i = 0; i < priv->num_par; i++)
620 parport_pc_unregister_port (priv->port[i]);
621 kfree (priv);
622 return -ENODEV;
623 }
624
625 return 0;
626 }
627
628 static void parport_serial_pci_remove(struct pci_dev *dev)
629 {
630 struct parport_serial_private *priv = pci_get_drvdata (dev);
631 int i;
632
633 // Serial ports
634 if (priv->serial)
635 pciserial_remove_ports(priv->serial);
636
637 // Parallel ports
638 for (i = 0; i < priv->num_par; i++)
639 parport_pc_unregister_port (priv->port[i]);
640
641 kfree (priv);
642 return;
643 }
644
645 #ifdef CONFIG_PM
646 static int parport_serial_pci_suspend(struct pci_dev *dev, pm_message_t state)
647 {
648 struct parport_serial_private *priv = pci_get_drvdata(dev);
649
650 if (priv->serial)
651 pciserial_suspend_ports(priv->serial);
652
653 /* FIXME: What about parport? */
654
655 pci_save_state(dev);
656 pci_set_power_state(dev, pci_choose_state(dev, state));
657 return 0;
658 }
659
660 static int parport_serial_pci_resume(struct pci_dev *dev)
661 {
662 struct parport_serial_private *priv = pci_get_drvdata(dev);
663 int err;
664
665 pci_set_power_state(dev, PCI_D0);
666 pci_restore_state(dev);
667
668 /*
669 * The device may have been disabled. Re-enable it.
670 */
671 err = pci_enable_device(dev);
672 if (err) {
673 printk(KERN_ERR "parport_serial: %s: error enabling "
674 "device for resume (%d)\n", pci_name(dev), err);
675 return err;
676 }
677
678 if (priv->serial)
679 pciserial_resume_ports(priv->serial);
680
681 /* FIXME: What about parport? */
682
683 return 0;
684 }
685 #endif
686
687 static struct pci_driver parport_serial_pci_driver = {
688 .name = "parport_serial",
689 .id_table = parport_serial_pci_tbl,
690 .probe = parport_serial_pci_probe,
691 .remove = parport_serial_pci_remove,
692 #ifdef CONFIG_PM
693 .suspend = parport_serial_pci_suspend,
694 .resume = parport_serial_pci_resume,
695 #endif
696 };
697
698
699 static int __init parport_serial_init (void)
700 {
701 return pci_register_driver (&parport_serial_pci_driver);
702 }
703
704 static void __exit parport_serial_exit (void)
705 {
706 pci_unregister_driver (&parport_serial_pci_driver);
707 return;
708 }
709
710 MODULE_AUTHOR("Tim Waugh <twaugh@redhat.com>");
711 MODULE_DESCRIPTION("Driver for common parallel+serial multi-I/O PCI cards");
712 MODULE_LICENSE("GPL");
713
714 module_init(parport_serial_init);
715 module_exit(parport_serial_exit);
Linux with added FPC-III support