usb: dwc3: keystone: drop dma_mask configuration
[linux/fpc-iii.git] / drivers / staging / octeon / ethernet-rx.c
bloba0f4868cfa13aa954625c4cef264b1d935fa67e2
1 /**********************************************************************
2 * Author: Cavium Networks
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2010 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 **********************************************************************/
27 #include <linux/module.h>
28 #include <linux/kernel.h>
29 #include <linux/cache.h>
30 #include <linux/cpumask.h>
31 #include <linux/netdevice.h>
32 #include <linux/etherdevice.h>
33 #include <linux/ip.h>
34 #include <linux/string.h>
35 #include <linux/prefetch.h>
36 #include <linux/ratelimit.h>
37 #include <linux/smp.h>
38 #include <linux/interrupt.h>
39 #include <net/dst.h>
40 #ifdef CONFIG_XFRM
41 #include <linux/xfrm.h>
42 #include <net/xfrm.h>
43 #endif /* CONFIG_XFRM */
45 #include <linux/atomic.h>
47 #include <asm/octeon/octeon.h>
49 #include "ethernet-defines.h"
50 #include "ethernet-mem.h"
51 #include "ethernet-rx.h"
52 #include "octeon-ethernet.h"
53 #include "ethernet-util.h"
55 #include <asm/octeon/cvmx-helper.h>
56 #include <asm/octeon/cvmx-wqe.h>
57 #include <asm/octeon/cvmx-fau.h>
58 #include <asm/octeon/cvmx-pow.h>
59 #include <asm/octeon/cvmx-pip.h>
60 #include <asm/octeon/cvmx-scratch.h>
62 #include <asm/octeon/cvmx-gmxx-defs.h>
64 struct cvm_napi_wrapper {
65 struct napi_struct napi;
66 } ____cacheline_aligned_in_smp;
68 static struct cvm_napi_wrapper cvm_oct_napi[NR_CPUS] __cacheline_aligned_in_smp;
70 struct cvm_oct_core_state {
71 int baseline_cores;
73 * The number of additional cores that could be processing
74 * input packets.
76 atomic_t available_cores;
77 cpumask_t cpu_state;
78 } ____cacheline_aligned_in_smp;
80 static struct cvm_oct_core_state core_state __cacheline_aligned_in_smp;
82 static int cvm_irq_cpu;
84 static void cvm_oct_enable_napi(void *_)
86 int cpu = smp_processor_id();
87 napi_schedule(&cvm_oct_napi[cpu].napi);
90 static void cvm_oct_enable_one_cpu(void)
92 int v;
93 int cpu;
95 /* Check to see if more CPUs are available for receive processing... */
96 v = atomic_sub_if_positive(1, &core_state.available_cores);
97 if (v < 0)
98 return;
100 /* ... if a CPU is available, Turn on NAPI polling for that CPU. */
101 for_each_online_cpu(cpu) {
102 if (!cpu_test_and_set(cpu, core_state.cpu_state)) {
103 v = smp_call_function_single(cpu, cvm_oct_enable_napi,
104 NULL, 0);
105 if (v)
106 panic("Can't enable NAPI.");
107 break;
112 static void cvm_oct_no_more_work(void)
114 int cpu = smp_processor_id();
116 if (cpu == cvm_irq_cpu) {
117 enable_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group);
118 return;
121 cpu_clear(cpu, core_state.cpu_state);
122 atomic_add(1, &core_state.available_cores);
126 * cvm_oct_do_interrupt - interrupt handler.
128 * The interrupt occurs whenever the POW has packets in our group.
131 static irqreturn_t cvm_oct_do_interrupt(int cpl, void *dev_id)
133 /* Disable the IRQ and start napi_poll. */
134 disable_irq_nosync(OCTEON_IRQ_WORKQ0 + pow_receive_group);
135 cvm_irq_cpu = smp_processor_id();
136 cvm_oct_enable_napi(NULL);
138 return IRQ_HANDLED;
142 * cvm_oct_check_rcv_error - process receive errors
143 * @work: Work queue entry pointing to the packet.
145 * Returns Non-zero if the packet can be dropped, zero otherwise.
147 static inline int cvm_oct_check_rcv_error(cvmx_wqe_t *work)
149 if ((work->word2.snoip.err_code == 10) && (work->len <= 64)) {
151 * Ignore length errors on min size packets. Some
152 * equipment incorrectly pads packets to 64+4FCS
153 * instead of 60+4FCS. Note these packets still get
154 * counted as frame errors.
156 } else
157 if (USE_10MBPS_PREAMBLE_WORKAROUND
158 && ((work->word2.snoip.err_code == 5)
159 || (work->word2.snoip.err_code == 7))) {
162 * We received a packet with either an alignment error
163 * or a FCS error. This may be signalling that we are
164 * running 10Mbps with GMXX_RXX_FRM_CTL[PRE_CHK]
165 * off. If this is the case we need to parse the
166 * packet to determine if we can remove a non spec
167 * preamble and generate a correct packet.
169 int interface = cvmx_helper_get_interface_num(work->ipprt);
170 int index = cvmx_helper_get_interface_index_num(work->ipprt);
171 union cvmx_gmxx_rxx_frm_ctl gmxx_rxx_frm_ctl;
172 gmxx_rxx_frm_ctl.u64 =
173 cvmx_read_csr(CVMX_GMXX_RXX_FRM_CTL(index, interface));
174 if (gmxx_rxx_frm_ctl.s.pre_chk == 0) {
176 uint8_t *ptr =
177 cvmx_phys_to_ptr(work->packet_ptr.s.addr);
178 int i = 0;
180 while (i < work->len - 1) {
181 if (*ptr != 0x55)
182 break;
183 ptr++;
184 i++;
187 if (*ptr == 0xd5) {
189 printk_ratelimited("Port %d received 0xd5 preamble\n", work->ipprt);
191 work->packet_ptr.s.addr += i + 1;
192 work->len -= i + 5;
193 } else if ((*ptr & 0xf) == 0xd) {
195 printk_ratelimited("Port %d received 0x?d preamble\n", work->ipprt);
197 work->packet_ptr.s.addr += i;
198 work->len -= i + 4;
199 for (i = 0; i < work->len; i++) {
200 *ptr =
201 ((*ptr & 0xf0) >> 4) |
202 ((*(ptr + 1) & 0xf) << 4);
203 ptr++;
205 } else {
206 printk_ratelimited("Port %d unknown preamble, packet "
207 "dropped\n",
208 work->ipprt);
210 cvmx_helper_dump_packet(work);
212 cvm_oct_free_work(work);
213 return 1;
216 } else {
217 printk_ratelimited("Port %d receive error code %d, packet dropped\n",
218 work->ipprt, work->word2.snoip.err_code);
219 cvm_oct_free_work(work);
220 return 1;
223 return 0;
227 * cvm_oct_napi_poll - the NAPI poll function.
228 * @napi: The NAPI instance, or null if called from cvm_oct_poll_controller
229 * @budget: Maximum number of packets to receive.
231 * Returns the number of packets processed.
233 static int cvm_oct_napi_poll(struct napi_struct *napi, int budget)
235 const int coreid = cvmx_get_core_num();
236 uint64_t old_group_mask;
237 uint64_t old_scratch;
238 int rx_count = 0;
239 int did_work_request = 0;
240 int packet_not_copied;
242 /* Prefetch cvm_oct_device since we know we need it soon */
243 prefetch(cvm_oct_device);
245 if (USE_ASYNC_IOBDMA) {
246 /* Save scratch in case userspace is using it */
247 CVMX_SYNCIOBDMA;
248 old_scratch = cvmx_scratch_read64(CVMX_SCR_SCRATCH);
251 /* Only allow work for our group (and preserve priorities) */
252 old_group_mask = cvmx_read_csr(CVMX_POW_PP_GRP_MSKX(coreid));
253 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid),
254 (old_group_mask & ~0xFFFFull) | 1 << pow_receive_group);
256 if (USE_ASYNC_IOBDMA) {
257 cvmx_pow_work_request_async(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
258 did_work_request = 1;
261 while (rx_count < budget) {
262 struct sk_buff *skb = NULL;
263 struct sk_buff **pskb = NULL;
264 int skb_in_hw;
265 cvmx_wqe_t *work;
267 if (USE_ASYNC_IOBDMA && did_work_request)
268 work = cvmx_pow_work_response_async(CVMX_SCR_SCRATCH);
269 else
270 work = cvmx_pow_work_request_sync(CVMX_POW_NO_WAIT);
272 prefetch(work);
273 did_work_request = 0;
274 if (work == NULL) {
275 union cvmx_pow_wq_int wq_int;
276 wq_int.u64 = 0;
277 wq_int.s.iq_dis = 1 << pow_receive_group;
278 wq_int.s.wq_int = 1 << pow_receive_group;
279 cvmx_write_csr(CVMX_POW_WQ_INT, wq_int.u64);
280 break;
282 pskb = (struct sk_buff **)(cvm_oct_get_buffer_ptr(work->packet_ptr) - sizeof(void *));
283 prefetch(pskb);
285 if (USE_ASYNC_IOBDMA && rx_count < (budget - 1)) {
286 cvmx_pow_work_request_async_nocheck(CVMX_SCR_SCRATCH, CVMX_POW_NO_WAIT);
287 did_work_request = 1;
290 if (rx_count == 0) {
292 * First time through, see if there is enough
293 * work waiting to merit waking another
294 * CPU.
296 union cvmx_pow_wq_int_cntx counts;
297 int backlog;
298 int cores_in_use = core_state.baseline_cores - atomic_read(&core_state.available_cores);
299 counts.u64 = cvmx_read_csr(CVMX_POW_WQ_INT_CNTX(pow_receive_group));
300 backlog = counts.s.iq_cnt + counts.s.ds_cnt;
301 if (backlog > budget * cores_in_use && napi != NULL)
302 cvm_oct_enable_one_cpu();
304 rx_count++;
306 skb_in_hw = USE_SKBUFFS_IN_HW && work->word2.s.bufs == 1;
307 if (likely(skb_in_hw)) {
308 skb = *pskb;
309 prefetch(&skb->head);
310 prefetch(&skb->len);
312 prefetch(cvm_oct_device[work->ipprt]);
314 /* Immediately throw away all packets with receive errors */
315 if (unlikely(work->word2.snoip.rcv_error)) {
316 if (cvm_oct_check_rcv_error(work))
317 continue;
321 * We can only use the zero copy path if skbuffs are
322 * in the FPA pool and the packet fits in a single
323 * buffer.
325 if (likely(skb_in_hw)) {
326 skb->data = skb->head + work->packet_ptr.s.addr - cvmx_ptr_to_phys(skb->head);
327 prefetch(skb->data);
328 skb->len = work->len;
329 skb_set_tail_pointer(skb, skb->len);
330 packet_not_copied = 1;
331 } else {
333 * We have to copy the packet. First allocate
334 * an skbuff for it.
336 skb = dev_alloc_skb(work->len);
337 if (!skb) {
338 cvm_oct_free_work(work);
339 continue;
343 * Check if we've received a packet that was
344 * entirely stored in the work entry.
346 if (unlikely(work->word2.s.bufs == 0)) {
347 uint8_t *ptr = work->packet_data;
349 if (likely(!work->word2.s.not_IP)) {
351 * The beginning of the packet
352 * moves for IP packets.
354 if (work->word2.s.is_v6)
355 ptr += 2;
356 else
357 ptr += 6;
359 memcpy(skb_put(skb, work->len), ptr, work->len);
360 /* No packet buffers to free */
361 } else {
362 int segments = work->word2.s.bufs;
363 union cvmx_buf_ptr segment_ptr = work->packet_ptr;
364 int len = work->len;
366 while (segments--) {
367 union cvmx_buf_ptr next_ptr =
368 *(union cvmx_buf_ptr *)cvmx_phys_to_ptr(segment_ptr.s.addr - 8);
371 * Octeon Errata PKI-100: The segment size is
372 * wrong. Until it is fixed, calculate the
373 * segment size based on the packet pool
374 * buffer size. When it is fixed, the
375 * following line should be replaced with this
376 * one: int segment_size =
377 * segment_ptr.s.size;
379 int segment_size = CVMX_FPA_PACKET_POOL_SIZE -
380 (segment_ptr.s.addr - (((segment_ptr.s.addr >> 7) - segment_ptr.s.back) << 7));
382 * Don't copy more than what
383 * is left in the packet.
385 if (segment_size > len)
386 segment_size = len;
387 /* Copy the data into the packet */
388 memcpy(skb_put(skb, segment_size),
389 cvmx_phys_to_ptr(segment_ptr.s.addr),
390 segment_size);
391 len -= segment_size;
392 segment_ptr = next_ptr;
395 packet_not_copied = 0;
398 if (likely((work->ipprt < TOTAL_NUMBER_OF_PORTS) &&
399 cvm_oct_device[work->ipprt])) {
400 struct net_device *dev = cvm_oct_device[work->ipprt];
401 struct octeon_ethernet *priv = netdev_priv(dev);
404 * Only accept packets for devices that are
405 * currently up.
407 if (likely(dev->flags & IFF_UP)) {
408 skb->protocol = eth_type_trans(skb, dev);
409 skb->dev = dev;
411 if (unlikely(work->word2.s.not_IP || work->word2.s.IP_exc ||
412 work->word2.s.L4_error || !work->word2.s.tcp_or_udp))
413 skb->ip_summed = CHECKSUM_NONE;
414 else
415 skb->ip_summed = CHECKSUM_UNNECESSARY;
417 /* Increment RX stats for virtual ports */
418 if (work->ipprt >= CVMX_PIP_NUM_INPUT_PORTS) {
419 #ifdef CONFIG_64BIT
420 atomic64_add(1, (atomic64_t *)&priv->stats.rx_packets);
421 atomic64_add(skb->len, (atomic64_t *)&priv->stats.rx_bytes);
422 #else
423 atomic_add(1, (atomic_t *)&priv->stats.rx_packets);
424 atomic_add(skb->len, (atomic_t *)&priv->stats.rx_bytes);
425 #endif
427 netif_receive_skb(skb);
428 } else {
429 /* Drop any packet received for a device that isn't up */
431 printk_ratelimited("%s: Device not up, packet dropped\n",
432 dev->name);
434 #ifdef CONFIG_64BIT
435 atomic64_add(1, (atomic64_t *)&priv->stats.rx_dropped);
436 #else
437 atomic_add(1, (atomic_t *)&priv->stats.rx_dropped);
438 #endif
439 dev_kfree_skb_irq(skb);
441 } else {
443 * Drop any packet received for a device that
444 * doesn't exist.
446 printk_ratelimited("Port %d not controlled by Linux, packet dropped\n",
447 work->ipprt);
448 dev_kfree_skb_irq(skb);
451 * Check to see if the skbuff and work share the same
452 * packet buffer.
454 if (USE_SKBUFFS_IN_HW && likely(packet_not_copied)) {
456 * This buffer needs to be replaced, increment
457 * the number of buffers we need to free by
458 * one.
460 cvmx_fau_atomic_add32(FAU_NUM_PACKET_BUFFERS_TO_FREE,
463 cvmx_fpa_free(work, CVMX_FPA_WQE_POOL,
464 DONT_WRITEBACK(1));
465 } else {
466 cvm_oct_free_work(work);
469 /* Restore the original POW group mask */
470 cvmx_write_csr(CVMX_POW_PP_GRP_MSKX(coreid), old_group_mask);
471 if (USE_ASYNC_IOBDMA) {
472 /* Restore the scratch area */
473 cvmx_scratch_write64(CVMX_SCR_SCRATCH, old_scratch);
475 cvm_oct_rx_refill_pool(0);
477 if (rx_count < budget && napi != NULL) {
478 /* No more work */
479 napi_complete(napi);
480 cvm_oct_no_more_work();
482 return rx_count;
485 #ifdef CONFIG_NET_POLL_CONTROLLER
487 * cvm_oct_poll_controller - poll for receive packets
488 * device.
490 * @dev: Device to poll. Unused
492 void cvm_oct_poll_controller(struct net_device *dev)
494 cvm_oct_napi_poll(NULL, 16);
496 #endif
498 void cvm_oct_rx_initialize(void)
500 int i;
501 struct net_device *dev_for_napi = NULL;
502 union cvmx_pow_wq_int_thrx int_thr;
503 union cvmx_pow_wq_int_pc int_pc;
505 for (i = 0; i < TOTAL_NUMBER_OF_PORTS; i++) {
506 if (cvm_oct_device[i]) {
507 dev_for_napi = cvm_oct_device[i];
508 break;
512 if (NULL == dev_for_napi)
513 panic("No net_devices were allocated.");
515 if (max_rx_cpus >= 1 && max_rx_cpus < num_online_cpus())
516 atomic_set(&core_state.available_cores, max_rx_cpus);
517 else
518 atomic_set(&core_state.available_cores, num_online_cpus());
519 core_state.baseline_cores = atomic_read(&core_state.available_cores);
521 core_state.cpu_state = CPU_MASK_NONE;
522 for_each_possible_cpu(i) {
523 netif_napi_add(dev_for_napi, &cvm_oct_napi[i].napi,
524 cvm_oct_napi_poll, rx_napi_weight);
525 napi_enable(&cvm_oct_napi[i].napi);
527 /* Register an IRQ handler to receive POW interrupts */
528 i = request_irq(OCTEON_IRQ_WORKQ0 + pow_receive_group,
529 cvm_oct_do_interrupt, 0, "Ethernet", cvm_oct_device);
531 if (i)
532 panic("Could not acquire Ethernet IRQ %d\n",
533 OCTEON_IRQ_WORKQ0 + pow_receive_group);
535 disable_irq_nosync(OCTEON_IRQ_WORKQ0 + pow_receive_group);
537 int_thr.u64 = 0;
538 int_thr.s.tc_en = 1;
539 int_thr.s.tc_thr = 1;
540 /* Enable POW interrupt when our port has at least one packet */
541 cvmx_write_csr(CVMX_POW_WQ_INT_THRX(pow_receive_group), int_thr.u64);
543 int_pc.u64 = 0;
544 int_pc.s.pc_thr = 5;
545 cvmx_write_csr(CVMX_POW_WQ_INT_PC, int_pc.u64);
548 /* Scheduld NAPI now. This will indirectly enable interrupts. */
549 cvm_oct_enable_one_cpu();
552 void cvm_oct_rx_shutdown(void)
554 int i;
555 /* Shutdown all of the NAPIs */
556 for_each_possible_cpu(i)
557 netif_napi_del(&cvm_oct_napi[i].napi);