2 * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
3 * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
5 * This code is *strongly* based on EHCI-HCD code by David Brownell since
6 * the chip is a quasi-EHCI compatible.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/timer.h>
33 #include <linux/list.h>
34 #include <linux/interrupt.h>
35 #include <linux/usb.h>
36 #include <linux/usb/hcd.h>
37 #include <linux/moduleparam.h>
38 #include <linux/dma-mapping.h>
42 #include <asm/unaligned.h>
44 #include <linux/irq.h>
45 #include <linux/platform_device.h>
49 #define DRIVER_VERSION "0.0.50"
55 #define oxu_dbg(oxu, fmt, args...) \
56 dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
57 #define oxu_err(oxu, fmt, args...) \
58 dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
59 #define oxu_info(oxu, fmt, args...) \
60 dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
62 #ifdef CONFIG_DYNAMIC_DEBUG
66 static inline struct usb_hcd
*oxu_to_hcd(struct oxu_hcd
*oxu
)
68 return container_of((void *) oxu
, struct usb_hcd
, hcd_priv
);
71 static inline struct oxu_hcd
*hcd_to_oxu(struct usb_hcd
*hcd
)
73 return (struct oxu_hcd
*) (hcd
->hcd_priv
);
81 #undef OXU_VERBOSE_DEBUG
83 #ifdef OXU_VERBOSE_DEBUG
84 #define oxu_vdbg oxu_dbg
86 #define oxu_vdbg(oxu, fmt, args...) /* Nop */
91 static int __attribute__((__unused__
))
92 dbg_status_buf(char *buf
, unsigned len
, const char *label
, u32 status
)
94 return scnprintf(buf
, len
, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
95 label
, label
[0] ? " " : "", status
,
96 (status
& STS_ASS
) ? " Async" : "",
97 (status
& STS_PSS
) ? " Periodic" : "",
98 (status
& STS_RECL
) ? " Recl" : "",
99 (status
& STS_HALT
) ? " Halt" : "",
100 (status
& STS_IAA
) ? " IAA" : "",
101 (status
& STS_FATAL
) ? " FATAL" : "",
102 (status
& STS_FLR
) ? " FLR" : "",
103 (status
& STS_PCD
) ? " PCD" : "",
104 (status
& STS_ERR
) ? " ERR" : "",
105 (status
& STS_INT
) ? " INT" : ""
109 static int __attribute__((__unused__
))
110 dbg_intr_buf(char *buf
, unsigned len
, const char *label
, u32 enable
)
112 return scnprintf(buf
, len
, "%s%sintrenable %02x%s%s%s%s%s%s",
113 label
, label
[0] ? " " : "", enable
,
114 (enable
& STS_IAA
) ? " IAA" : "",
115 (enable
& STS_FATAL
) ? " FATAL" : "",
116 (enable
& STS_FLR
) ? " FLR" : "",
117 (enable
& STS_PCD
) ? " PCD" : "",
118 (enable
& STS_ERR
) ? " ERR" : "",
119 (enable
& STS_INT
) ? " INT" : ""
123 static const char *const fls_strings
[] =
124 { "1024", "512", "256", "??" };
126 static int dbg_command_buf(char *buf
, unsigned len
,
127 const char *label
, u32 command
)
129 return scnprintf(buf
, len
,
130 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
131 label
, label
[0] ? " " : "", command
,
132 (command
& CMD_PARK
) ? "park" : "(park)",
133 CMD_PARK_CNT(command
),
134 (command
>> 16) & 0x3f,
135 (command
& CMD_LRESET
) ? " LReset" : "",
136 (command
& CMD_IAAD
) ? " IAAD" : "",
137 (command
& CMD_ASE
) ? " Async" : "",
138 (command
& CMD_PSE
) ? " Periodic" : "",
139 fls_strings
[(command
>> 2) & 0x3],
140 (command
& CMD_RESET
) ? " Reset" : "",
141 (command
& CMD_RUN
) ? "RUN" : "HALT"
145 static int dbg_port_buf(char *buf
, unsigned len
, const char *label
,
146 int port
, u32 status
)
150 /* signaling state */
151 switch (status
& (3 << 10)) {
156 sig
= "k"; /* low speed */
166 return scnprintf(buf
, len
,
167 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
168 label
, label
[0] ? " " : "", port
, status
,
169 (status
& PORT_POWER
) ? " POWER" : "",
170 (status
& PORT_OWNER
) ? " OWNER" : "",
172 (status
& PORT_RESET
) ? " RESET" : "",
173 (status
& PORT_SUSPEND
) ? " SUSPEND" : "",
174 (status
& PORT_RESUME
) ? " RESUME" : "",
175 (status
& PORT_OCC
) ? " OCC" : "",
176 (status
& PORT_OC
) ? " OC" : "",
177 (status
& PORT_PEC
) ? " PEC" : "",
178 (status
& PORT_PE
) ? " PE" : "",
179 (status
& PORT_CSC
) ? " CSC" : "",
180 (status
& PORT_CONNECT
) ? " CONNECT" : ""
186 static inline int __attribute__((__unused__
))
187 dbg_status_buf(char *buf
, unsigned len
, const char *label
, u32 status
)
190 static inline int __attribute__((__unused__
))
191 dbg_command_buf(char *buf
, unsigned len
, const char *label
, u32 command
)
194 static inline int __attribute__((__unused__
))
195 dbg_intr_buf(char *buf
, unsigned len
, const char *label
, u32 enable
)
198 static inline int __attribute__((__unused__
))
199 dbg_port_buf(char *buf
, unsigned len
, const char *label
, int port
, u32 status
)
204 /* functions have the "wrong" filename when they're output... */
205 #define dbg_status(oxu, label, status) { \
207 dbg_status_buf(_buf, sizeof _buf, label, status); \
208 oxu_dbg(oxu, "%s\n", _buf); \
211 #define dbg_cmd(oxu, label, command) { \
213 dbg_command_buf(_buf, sizeof _buf, label, command); \
214 oxu_dbg(oxu, "%s\n", _buf); \
217 #define dbg_port(oxu, label, port, status) { \
219 dbg_port_buf(_buf, sizeof _buf, label, port, status); \
220 oxu_dbg(oxu, "%s\n", _buf); \
227 /* Initial IRQ latency: faster than hw default */
228 static int log2_irq_thresh
; /* 0 to 6 */
229 module_param(log2_irq_thresh
, int, S_IRUGO
);
230 MODULE_PARM_DESC(log2_irq_thresh
, "log2 IRQ latency, 1-64 microframes");
232 /* Initial park setting: slower than hw default */
233 static unsigned park
;
234 module_param(park
, uint
, S_IRUGO
);
235 MODULE_PARM_DESC(park
, "park setting; 1-3 back-to-back async packets");
237 /* For flakey hardware, ignore overcurrent indicators */
238 static bool ignore_oc
;
239 module_param(ignore_oc
, bool, S_IRUGO
);
240 MODULE_PARM_DESC(ignore_oc
, "ignore bogus hardware overcurrent indications");
243 static void ehci_work(struct oxu_hcd
*oxu
);
244 static int oxu_hub_control(struct usb_hcd
*hcd
,
245 u16 typeReq
, u16 wValue
, u16 wIndex
,
246 char *buf
, u16 wLength
);
252 /* Low level read/write registers functions */
253 static inline u32
oxu_readl(void *base
, u32 reg
)
255 return readl(base
+ reg
);
258 static inline void oxu_writel(void *base
, u32 reg
, u32 val
)
260 writel(val
, base
+ reg
);
263 static inline void timer_action_done(struct oxu_hcd
*oxu
,
264 enum ehci_timer_action action
)
266 clear_bit(action
, &oxu
->actions
);
269 static inline void timer_action(struct oxu_hcd
*oxu
,
270 enum ehci_timer_action action
)
272 if (!test_and_set_bit(action
, &oxu
->actions
)) {
276 case TIMER_IAA_WATCHDOG
:
277 t
= EHCI_IAA_JIFFIES
;
279 case TIMER_IO_WATCHDOG
:
282 case TIMER_ASYNC_OFF
:
283 t
= EHCI_ASYNC_JIFFIES
;
285 case TIMER_ASYNC_SHRINK
:
287 t
= EHCI_SHRINK_JIFFIES
;
291 /* all timings except IAA watchdog can be overridden.
292 * async queue SHRINK often precedes IAA. while it's ready
293 * to go OFF neither can matter, and afterwards the IO
294 * watchdog stops unless there's still periodic traffic.
296 if (action
!= TIMER_IAA_WATCHDOG
297 && t
> oxu
->watchdog
.expires
298 && timer_pending(&oxu
->watchdog
))
300 mod_timer(&oxu
->watchdog
, t
);
305 * handshake - spin reading hc until handshake completes or fails
306 * @ptr: address of hc register to be read
307 * @mask: bits to look at in result of read
308 * @done: value of those bits when handshake succeeds
309 * @usec: timeout in microseconds
311 * Returns negative errno, or zero on success
313 * Success happens when the "mask" bits have the specified value (hardware
314 * handshake done). There are two failure modes: "usec" have passed (major
315 * hardware flakeout), or the register reads as all-ones (hardware removed).
317 * That last failure should_only happen in cases like physical cardbus eject
318 * before driver shutdown. But it also seems to be caused by bugs in cardbus
319 * bridge shutdown: shutting down the bridge before the devices using it.
321 static int handshake(struct oxu_hcd
*oxu
, void __iomem
*ptr
,
322 u32 mask
, u32 done
, int usec
)
328 if (result
== ~(u32
)0) /* card removed */
339 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
340 static int ehci_halt(struct oxu_hcd
*oxu
)
342 u32 temp
= readl(&oxu
->regs
->status
);
344 /* disable any irqs left enabled by previous code */
345 writel(0, &oxu
->regs
->intr_enable
);
347 if ((temp
& STS_HALT
) != 0)
350 temp
= readl(&oxu
->regs
->command
);
352 writel(temp
, &oxu
->regs
->command
);
353 return handshake(oxu
, &oxu
->regs
->status
,
354 STS_HALT
, STS_HALT
, 16 * 125);
357 /* Put TDI/ARC silicon into EHCI mode */
358 static void tdi_reset(struct oxu_hcd
*oxu
)
360 u32 __iomem
*reg_ptr
;
363 reg_ptr
= (u32 __iomem
*)(((u8 __iomem
*)oxu
->regs
) + 0x68);
364 tmp
= readl(reg_ptr
);
366 writel(tmp
, reg_ptr
);
369 /* Reset a non-running (STS_HALT == 1) controller */
370 static int ehci_reset(struct oxu_hcd
*oxu
)
373 u32 command
= readl(&oxu
->regs
->command
);
375 command
|= CMD_RESET
;
376 dbg_cmd(oxu
, "reset", command
);
377 writel(command
, &oxu
->regs
->command
);
378 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
379 oxu
->next_statechange
= jiffies
;
380 retval
= handshake(oxu
, &oxu
->regs
->command
,
381 CMD_RESET
, 0, 250 * 1000);
391 /* Idle the controller (from running) */
392 static void ehci_quiesce(struct oxu_hcd
*oxu
)
397 if (!HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))
401 /* wait for any schedule enables/disables to take effect */
402 temp
= readl(&oxu
->regs
->command
) << 10;
403 temp
&= STS_ASS
| STS_PSS
;
404 if (handshake(oxu
, &oxu
->regs
->status
, STS_ASS
| STS_PSS
,
405 temp
, 16 * 125) != 0) {
406 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
410 /* then disable anything that's still active */
411 temp
= readl(&oxu
->regs
->command
);
412 temp
&= ~(CMD_ASE
| CMD_IAAD
| CMD_PSE
);
413 writel(temp
, &oxu
->regs
->command
);
415 /* hardware can take 16 microframes to turn off ... */
416 if (handshake(oxu
, &oxu
->regs
->status
, STS_ASS
| STS_PSS
,
418 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
423 static int check_reset_complete(struct oxu_hcd
*oxu
, int index
,
424 u32 __iomem
*status_reg
, int port_status
)
426 if (!(port_status
& PORT_CONNECT
)) {
427 oxu
->reset_done
[index
] = 0;
431 /* if reset finished and it's still not enabled -- handoff */
432 if (!(port_status
& PORT_PE
)) {
433 oxu_dbg(oxu
, "Failed to enable port %d on root hub TT\n",
437 oxu_dbg(oxu
, "port %d high speed\n", index
+ 1);
442 static void ehci_hub_descriptor(struct oxu_hcd
*oxu
,
443 struct usb_hub_descriptor
*desc
)
445 int ports
= HCS_N_PORTS(oxu
->hcs_params
);
448 desc
->bDescriptorType
= 0x29;
449 desc
->bPwrOn2PwrGood
= 10; /* oxu 1.0, 2.3.9 says 20ms max */
450 desc
->bHubContrCurrent
= 0;
452 desc
->bNbrPorts
= ports
;
453 temp
= 1 + (ports
/ 8);
454 desc
->bDescLength
= 7 + 2 * temp
;
456 /* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
457 memset(&desc
->u
.hs
.DeviceRemovable
[0], 0, temp
);
458 memset(&desc
->u
.hs
.DeviceRemovable
[temp
], 0xff, temp
);
460 temp
= 0x0008; /* per-port overcurrent reporting */
461 if (HCS_PPC(oxu
->hcs_params
))
462 temp
|= 0x0001; /* per-port power control */
464 temp
|= 0x0002; /* no power switching */
465 desc
->wHubCharacteristics
= (__force __u16
)cpu_to_le16(temp
);
469 /* Allocate an OXU210HP on-chip memory data buffer
471 * An on-chip memory data buffer is required for each OXU210HP USB transfer.
472 * Each transfer descriptor has one or more on-chip memory data buffers.
474 * Data buffers are allocated from a fix sized pool of data blocks.
475 * To minimise fragmentation and give reasonable memory utlisation,
476 * data buffers are allocated with sizes the power of 2 multiples of
477 * the block size, starting on an address a multiple of the allocated size.
479 * FIXME: callers of this function require a buffer to be allocated for
480 * len=0. This is a waste of on-chip memory and should be fix. Then this
481 * function should be changed to not allocate a buffer for len=0.
483 static int oxu_buf_alloc(struct oxu_hcd
*oxu
, struct ehci_qtd
*qtd
, int len
)
485 int n_blocks
; /* minium blocks needed to hold len */
486 int a_blocks
; /* blocks allocated */
489 /* Don't allocte bigger than supported */
490 if (len
> BUFFER_SIZE
* BUFFER_NUM
) {
491 oxu_err(oxu
, "buffer too big (%d)\n", len
);
495 spin_lock(&oxu
->mem_lock
);
497 /* Number of blocks needed to hold len */
498 n_blocks
= (len
+ BUFFER_SIZE
- 1) / BUFFER_SIZE
;
500 /* Round the number of blocks up to the power of 2 */
501 for (a_blocks
= 1; a_blocks
< n_blocks
; a_blocks
<<= 1)
504 /* Find a suitable available data buffer */
505 for (i
= 0; i
< BUFFER_NUM
;
506 i
+= max(a_blocks
, (int)oxu
->db_used
[i
])) {
508 /* Check all the required blocks are available */
509 for (j
= 0; j
< a_blocks
; j
++)
510 if (oxu
->db_used
[i
+ j
])
516 /* Allocate blocks found! */
517 qtd
->buffer
= (void *) &oxu
->mem
->db_pool
[i
];
518 qtd
->buffer_dma
= virt_to_phys(qtd
->buffer
);
520 qtd
->qtd_buffer_len
= BUFFER_SIZE
* a_blocks
;
521 oxu
->db_used
[i
] = a_blocks
;
523 spin_unlock(&oxu
->mem_lock
);
530 spin_unlock(&oxu
->mem_lock
);
535 static void oxu_buf_free(struct oxu_hcd
*oxu
, struct ehci_qtd
*qtd
)
539 spin_lock(&oxu
->mem_lock
);
541 index
= (qtd
->buffer
- (void *) &oxu
->mem
->db_pool
[0])
543 oxu
->db_used
[index
] = 0;
544 qtd
->qtd_buffer_len
= 0;
548 spin_unlock(&oxu
->mem_lock
);
551 static inline void ehci_qtd_init(struct ehci_qtd
*qtd
, dma_addr_t dma
)
553 memset(qtd
, 0, sizeof *qtd
);
555 qtd
->hw_token
= cpu_to_le32(QTD_STS_HALT
);
556 qtd
->hw_next
= EHCI_LIST_END
;
557 qtd
->hw_alt_next
= EHCI_LIST_END
;
558 INIT_LIST_HEAD(&qtd
->qtd_list
);
561 static inline void oxu_qtd_free(struct oxu_hcd
*oxu
, struct ehci_qtd
*qtd
)
566 oxu_buf_free(oxu
, qtd
);
568 spin_lock(&oxu
->mem_lock
);
570 index
= qtd
- &oxu
->mem
->qtd_pool
[0];
571 oxu
->qtd_used
[index
] = 0;
573 spin_unlock(&oxu
->mem_lock
);
576 static struct ehci_qtd
*ehci_qtd_alloc(struct oxu_hcd
*oxu
)
579 struct ehci_qtd
*qtd
= NULL
;
581 spin_lock(&oxu
->mem_lock
);
583 for (i
= 0; i
< QTD_NUM
; i
++)
584 if (!oxu
->qtd_used
[i
])
588 qtd
= (struct ehci_qtd
*) &oxu
->mem
->qtd_pool
[i
];
589 memset(qtd
, 0, sizeof *qtd
);
591 qtd
->hw_token
= cpu_to_le32(QTD_STS_HALT
);
592 qtd
->hw_next
= EHCI_LIST_END
;
593 qtd
->hw_alt_next
= EHCI_LIST_END
;
594 INIT_LIST_HEAD(&qtd
->qtd_list
);
596 qtd
->qtd_dma
= virt_to_phys(qtd
);
598 oxu
->qtd_used
[i
] = 1;
601 spin_unlock(&oxu
->mem_lock
);
606 static void oxu_qh_free(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
610 spin_lock(&oxu
->mem_lock
);
612 index
= qh
- &oxu
->mem
->qh_pool
[0];
613 oxu
->qh_used
[index
] = 0;
615 spin_unlock(&oxu
->mem_lock
);
618 static void qh_destroy(struct kref
*kref
)
620 struct ehci_qh
*qh
= container_of(kref
, struct ehci_qh
, kref
);
621 struct oxu_hcd
*oxu
= qh
->oxu
;
623 /* clean qtds first, and know this is not linked */
624 if (!list_empty(&qh
->qtd_list
) || qh
->qh_next
.ptr
) {
625 oxu_dbg(oxu
, "unused qh not empty!\n");
629 oxu_qtd_free(oxu
, qh
->dummy
);
630 oxu_qh_free(oxu
, qh
);
633 static struct ehci_qh
*oxu_qh_alloc(struct oxu_hcd
*oxu
)
636 struct ehci_qh
*qh
= NULL
;
638 spin_lock(&oxu
->mem_lock
);
640 for (i
= 0; i
< QHEAD_NUM
; i
++)
641 if (!oxu
->qh_used
[i
])
645 qh
= (struct ehci_qh
*) &oxu
->mem
->qh_pool
[i
];
646 memset(qh
, 0, sizeof *qh
);
648 kref_init(&qh
->kref
);
650 qh
->qh_dma
= virt_to_phys(qh
);
651 INIT_LIST_HEAD(&qh
->qtd_list
);
653 /* dummy td enables safe urb queuing */
654 qh
->dummy
= ehci_qtd_alloc(oxu
);
655 if (qh
->dummy
== NULL
) {
656 oxu_dbg(oxu
, "no dummy td\n");
665 spin_unlock(&oxu
->mem_lock
);
670 /* to share a qh (cpu threads, or hc) */
671 static inline struct ehci_qh
*qh_get(struct ehci_qh
*qh
)
677 static inline void qh_put(struct ehci_qh
*qh
)
679 kref_put(&qh
->kref
, qh_destroy
);
682 static void oxu_murb_free(struct oxu_hcd
*oxu
, struct oxu_murb
*murb
)
686 spin_lock(&oxu
->mem_lock
);
688 index
= murb
- &oxu
->murb_pool
[0];
689 oxu
->murb_used
[index
] = 0;
691 spin_unlock(&oxu
->mem_lock
);
694 static struct oxu_murb
*oxu_murb_alloc(struct oxu_hcd
*oxu
)
698 struct oxu_murb
*murb
= NULL
;
700 spin_lock(&oxu
->mem_lock
);
702 for (i
= 0; i
< MURB_NUM
; i
++)
703 if (!oxu
->murb_used
[i
])
707 murb
= &(oxu
->murb_pool
)[i
];
709 oxu
->murb_used
[i
] = 1;
712 spin_unlock(&oxu
->mem_lock
);
717 /* The queue heads and transfer descriptors are managed from pools tied
718 * to each of the "per device" structures.
719 * This is the initialisation and cleanup code.
721 static void ehci_mem_cleanup(struct oxu_hcd
*oxu
)
723 kfree(oxu
->murb_pool
);
724 oxu
->murb_pool
= NULL
;
730 del_timer(&oxu
->urb_timer
);
732 oxu
->periodic
= NULL
;
734 /* shadow periodic table */
739 /* Remember to add cleanup code (above) if you add anything here.
741 static int ehci_mem_init(struct oxu_hcd
*oxu
, gfp_t flags
)
745 for (i
= 0; i
< oxu
->periodic_size
; i
++)
746 oxu
->mem
->frame_list
[i
] = EHCI_LIST_END
;
747 for (i
= 0; i
< QHEAD_NUM
; i
++)
749 for (i
= 0; i
< QTD_NUM
; i
++)
750 oxu
->qtd_used
[i
] = 0;
752 oxu
->murb_pool
= kcalloc(MURB_NUM
, sizeof(struct oxu_murb
), flags
);
756 for (i
= 0; i
< MURB_NUM
; i
++)
757 oxu
->murb_used
[i
] = 0;
759 oxu
->async
= oxu_qh_alloc(oxu
);
763 oxu
->periodic
= (__le32
*) &oxu
->mem
->frame_list
;
764 oxu
->periodic_dma
= virt_to_phys(oxu
->periodic
);
766 for (i
= 0; i
< oxu
->periodic_size
; i
++)
767 oxu
->periodic
[i
] = EHCI_LIST_END
;
769 /* software shadow of hardware table */
770 oxu
->pshadow
= kcalloc(oxu
->periodic_size
, sizeof(void *), flags
);
771 if (oxu
->pshadow
!= NULL
)
775 oxu_dbg(oxu
, "couldn't init memory\n");
776 ehci_mem_cleanup(oxu
);
780 /* Fill a qtd, returning how much of the buffer we were able to queue up.
782 static int qtd_fill(struct ehci_qtd
*qtd
, dma_addr_t buf
, size_t len
,
783 int token
, int maxpacket
)
788 /* one buffer entry per 4K ... first might be short or unaligned */
789 qtd
->hw_buf
[0] = cpu_to_le32((u32
)addr
);
790 qtd
->hw_buf_hi
[0] = cpu_to_le32((u32
)(addr
>> 32));
791 count
= 0x1000 - (buf
& 0x0fff); /* rest of that page */
792 if (likely(len
< count
)) /* ... iff needed */
798 /* per-qtd limit: from 16K to 20K (best alignment) */
799 for (i
= 1; count
< len
&& i
< 5; i
++) {
801 qtd
->hw_buf
[i
] = cpu_to_le32((u32
)addr
);
802 qtd
->hw_buf_hi
[i
] = cpu_to_le32((u32
)(addr
>> 32));
804 if ((count
+ 0x1000) < len
)
810 /* short packets may only terminate transfers */
812 count
-= (count
% maxpacket
);
814 qtd
->hw_token
= cpu_to_le32((count
<< 16) | token
);
820 static inline void qh_update(struct oxu_hcd
*oxu
,
821 struct ehci_qh
*qh
, struct ehci_qtd
*qtd
)
823 /* writes to an active overlay are unsafe */
824 BUG_ON(qh
->qh_state
!= QH_STATE_IDLE
);
826 qh
->hw_qtd_next
= QTD_NEXT(qtd
->qtd_dma
);
827 qh
->hw_alt_next
= EHCI_LIST_END
;
829 /* Except for control endpoints, we make hardware maintain data
830 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
831 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
834 if (!(qh
->hw_info1
& cpu_to_le32(1 << 14))) {
835 unsigned is_out
, epnum
;
837 is_out
= !(qtd
->hw_token
& cpu_to_le32(1 << 8));
838 epnum
= (le32_to_cpup(&qh
->hw_info1
) >> 8) & 0x0f;
839 if (unlikely(!usb_gettoggle(qh
->dev
, epnum
, is_out
))) {
840 qh
->hw_token
&= ~cpu_to_le32(QTD_TOGGLE
);
841 usb_settoggle(qh
->dev
, epnum
, is_out
, 1);
845 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
847 qh
->hw_token
&= cpu_to_le32(QTD_TOGGLE
| QTD_STS_PING
);
850 /* If it weren't for a common silicon quirk (writing the dummy into the qh
851 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
852 * recovery (including urb dequeue) would need software changes to a QH...
854 static void qh_refresh(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
856 struct ehci_qtd
*qtd
;
858 if (list_empty(&qh
->qtd_list
))
861 qtd
= list_entry(qh
->qtd_list
.next
,
862 struct ehci_qtd
, qtd_list
);
863 /* first qtd may already be partially processed */
864 if (cpu_to_le32(qtd
->qtd_dma
) == qh
->hw_current
)
869 qh_update(oxu
, qh
, qtd
);
872 static void qtd_copy_status(struct oxu_hcd
*oxu
, struct urb
*urb
,
873 size_t length
, u32 token
)
875 /* count IN/OUT bytes, not SETUP (even short packets) */
876 if (likely(QTD_PID(token
) != 2))
877 urb
->actual_length
+= length
- QTD_LENGTH(token
);
879 /* don't modify error codes */
880 if (unlikely(urb
->status
!= -EINPROGRESS
))
883 /* force cleanup after short read; not always an error */
884 if (unlikely(IS_SHORT_READ(token
)))
885 urb
->status
= -EREMOTEIO
;
887 /* serious "can't proceed" faults reported by the hardware */
888 if (token
& QTD_STS_HALT
) {
889 if (token
& QTD_STS_BABBLE
) {
890 /* FIXME "must" disable babbling device's port too */
891 urb
->status
= -EOVERFLOW
;
892 } else if (token
& QTD_STS_MMF
) {
893 /* fs/ls interrupt xfer missed the complete-split */
894 urb
->status
= -EPROTO
;
895 } else if (token
& QTD_STS_DBE
) {
896 urb
->status
= (QTD_PID(token
) == 1) /* IN ? */
897 ? -ENOSR
/* hc couldn't read data */
898 : -ECOMM
; /* hc couldn't write data */
899 } else if (token
& QTD_STS_XACT
) {
900 /* timeout, bad crc, wrong PID, etc; retried */
902 urb
->status
= -EPIPE
;
904 oxu_dbg(oxu
, "devpath %s ep%d%s 3strikes\n",
906 usb_pipeendpoint(urb
->pipe
),
907 usb_pipein(urb
->pipe
) ? "in" : "out");
908 urb
->status
= -EPROTO
;
910 /* CERR nonzero + no errors + halt --> stall */
911 } else if (QTD_CERR(token
))
912 urb
->status
= -EPIPE
;
914 urb
->status
= -EPROTO
;
916 oxu_vdbg(oxu
, "dev%d ep%d%s qtd token %08x --> status %d\n",
917 usb_pipedevice(urb
->pipe
),
918 usb_pipeendpoint(urb
->pipe
),
919 usb_pipein(urb
->pipe
) ? "in" : "out",
924 static void ehci_urb_done(struct oxu_hcd
*oxu
, struct urb
*urb
)
925 __releases(oxu
->lock
)
926 __acquires(oxu
->lock
)
928 if (likely(urb
->hcpriv
!= NULL
)) {
929 struct ehci_qh
*qh
= (struct ehci_qh
*) urb
->hcpriv
;
931 /* S-mask in a QH means it's an interrupt urb */
932 if ((qh
->hw_info2
& cpu_to_le32(QH_SMASK
)) != 0) {
934 /* ... update hc-wide periodic stats (for usbfs) */
935 oxu_to_hcd(oxu
)->self
.bandwidth_int_reqs
--;
941 switch (urb
->status
) {
942 case -EINPROGRESS
: /* success */
946 case -EREMOTEIO
: /* fault or normal */
947 if (!(urb
->transfer_flags
& URB_SHORT_NOT_OK
))
950 case -ECONNRESET
: /* canceled */
956 oxu_dbg(oxu
, "%s %s urb %p ep%d%s status %d len %d/%d\n",
957 __func__
, urb
->dev
->devpath
, urb
,
958 usb_pipeendpoint(urb
->pipe
),
959 usb_pipein(urb
->pipe
) ? "in" : "out",
961 urb
->actual_length
, urb
->transfer_buffer_length
);
964 /* complete() can reenter this HCD */
965 spin_unlock(&oxu
->lock
);
966 usb_hcd_giveback_urb(oxu_to_hcd(oxu
), urb
, urb
->status
);
967 spin_lock(&oxu
->lock
);
970 static void start_unlink_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
);
971 static void unlink_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
);
973 static void intr_deschedule(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
);
974 static int qh_schedule(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
);
976 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
978 /* Process and free completed qtds for a qh, returning URBs to drivers.
979 * Chases up to qh->hw_current. Returns number of completions called,
980 * indicating how much "real" work we did.
982 static unsigned qh_completions(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
984 struct ehci_qtd
*last
= NULL
, *end
= qh
->dummy
;
985 struct list_head
*entry
, *tmp
;
990 struct oxu_murb
*murb
= NULL
;
992 if (unlikely(list_empty(&qh
->qtd_list
)))
995 /* completions (or tasks on other cpus) must never clobber HALT
996 * till we've gone through and cleaned everything up, even when
997 * they add urbs to this qh's queue or mark them for unlinking.
999 * NOTE: unlinking expects to be done in queue order.
1001 state
= qh
->qh_state
;
1002 qh
->qh_state
= QH_STATE_COMPLETING
;
1003 stopped
= (state
== QH_STATE_IDLE
);
1005 /* remove de-activated QTDs from front of queue.
1006 * after faults (including short reads), cleanup this urb
1007 * then let the queue advance.
1008 * if queue is stopped, handles unlinks.
1010 list_for_each_safe(entry
, tmp
, &qh
->qtd_list
) {
1011 struct ehci_qtd
*qtd
;
1015 qtd
= list_entry(entry
, struct ehci_qtd
, qtd_list
);
1018 /* Clean up any state from previous QTD ...*/
1020 if (likely(last
->urb
!= urb
)) {
1021 if (last
->urb
->complete
== NULL
) {
1022 murb
= (struct oxu_murb
*) last
->urb
;
1023 last
->urb
= murb
->main
;
1025 ehci_urb_done(oxu
, last
->urb
);
1028 oxu_murb_free(oxu
, murb
);
1030 ehci_urb_done(oxu
, last
->urb
);
1034 oxu_qtd_free(oxu
, last
);
1038 /* ignore urbs submitted during completions we reported */
1042 /* hardware copies qtd out of qh overlay */
1044 token
= le32_to_cpu(qtd
->hw_token
);
1046 /* always clean up qtds the hc de-activated */
1047 if ((token
& QTD_STS_ACTIVE
) == 0) {
1049 if ((token
& QTD_STS_HALT
) != 0) {
1052 /* magic dummy for some short reads; qh won't advance.
1053 * that silicon quirk can kick in with this dummy too.
1055 } else if (IS_SHORT_READ(token
) &&
1056 !(qtd
->hw_alt_next
& EHCI_LIST_END
)) {
1061 /* stop scanning when we reach qtds the hc is using */
1062 } else if (likely(!stopped
&&
1063 HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))) {
1069 if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
)))
1070 urb
->status
= -ESHUTDOWN
;
1072 /* ignore active urbs unless some previous qtd
1073 * for the urb faulted (including short read) or
1074 * its urb was canceled. we may patch qh or qtds.
1076 if (likely(urb
->status
== -EINPROGRESS
))
1079 /* issue status after short control reads */
1080 if (unlikely(do_status
!= 0)
1081 && QTD_PID(token
) == 0 /* OUT */) {
1086 /* token in overlay may be most current */
1087 if (state
== QH_STATE_IDLE
1088 && cpu_to_le32(qtd
->qtd_dma
)
1090 token
= le32_to_cpu(qh
->hw_token
);
1092 /* force halt for unlinked or blocked qh, so we'll
1093 * patch the qh later and so that completions can't
1094 * activate it while we "know" it's stopped.
1096 if ((HALT_BIT
& qh
->hw_token
) == 0) {
1098 qh
->hw_token
|= HALT_BIT
;
1103 /* Remove it from the queue */
1104 qtd_copy_status(oxu
, urb
->complete
?
1105 urb
: ((struct oxu_murb
*) urb
)->main
,
1106 qtd
->length
, token
);
1107 if ((usb_pipein(qtd
->urb
->pipe
)) &&
1108 (NULL
!= qtd
->transfer_buffer
))
1109 memcpy(qtd
->transfer_buffer
, qtd
->buffer
, qtd
->length
);
1110 do_status
= (urb
->status
== -EREMOTEIO
)
1111 && usb_pipecontrol(urb
->pipe
);
1113 if (stopped
&& qtd
->qtd_list
.prev
!= &qh
->qtd_list
) {
1114 last
= list_entry(qtd
->qtd_list
.prev
,
1115 struct ehci_qtd
, qtd_list
);
1116 last
->hw_next
= qtd
->hw_next
;
1118 list_del(&qtd
->qtd_list
);
1122 /* last urb's completion might still need calling */
1123 if (likely(last
!= NULL
)) {
1124 if (last
->urb
->complete
== NULL
) {
1125 murb
= (struct oxu_murb
*) last
->urb
;
1126 last
->urb
= murb
->main
;
1128 ehci_urb_done(oxu
, last
->urb
);
1131 oxu_murb_free(oxu
, murb
);
1133 ehci_urb_done(oxu
, last
->urb
);
1136 oxu_qtd_free(oxu
, last
);
1139 /* restore original state; caller must unlink or relink */
1140 qh
->qh_state
= state
;
1142 /* be sure the hardware's done with the qh before refreshing
1143 * it after fault cleanup, or recovering from silicon wrongly
1144 * overlaying the dummy qtd (which reduces DMA chatter).
1146 if (stopped
!= 0 || qh
->hw_qtd_next
== EHCI_LIST_END
) {
1149 qh_refresh(oxu
, qh
);
1151 case QH_STATE_LINKED
:
1152 /* should be rare for periodic transfers,
1153 * except maybe high bandwidth ...
1155 if ((cpu_to_le32(QH_SMASK
)
1156 & qh
->hw_info2
) != 0) {
1157 intr_deschedule(oxu
, qh
);
1158 (void) qh_schedule(oxu
, qh
);
1160 unlink_async(oxu
, qh
);
1162 /* otherwise, unlink already started */
1169 /* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1170 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
1171 /* ... and packet size, for any kind of endpoint descriptor */
1172 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1174 /* Reverse of qh_urb_transaction: free a list of TDs.
1175 * used for cleanup after errors, before HC sees an URB's TDs.
1177 static void qtd_list_free(struct oxu_hcd
*oxu
,
1178 struct urb
*urb
, struct list_head
*qtd_list
)
1180 struct list_head
*entry
, *temp
;
1182 list_for_each_safe(entry
, temp
, qtd_list
) {
1183 struct ehci_qtd
*qtd
;
1185 qtd
= list_entry(entry
, struct ehci_qtd
, qtd_list
);
1186 list_del(&qtd
->qtd_list
);
1187 oxu_qtd_free(oxu
, qtd
);
1191 /* Create a list of filled qtds for this URB; won't link into qh.
1193 static struct list_head
*qh_urb_transaction(struct oxu_hcd
*oxu
,
1195 struct list_head
*head
,
1198 struct ehci_qtd
*qtd
, *qtd_prev
;
1203 void *transfer_buf
= NULL
;
1207 * URBs map to sequences of QTDs: one logical transaction
1209 qtd
= ehci_qtd_alloc(oxu
);
1212 list_add_tail(&qtd
->qtd_list
, head
);
1215 token
= QTD_STS_ACTIVE
;
1216 token
|= (EHCI_TUNE_CERR
<< 10);
1217 /* for split transactions, SplitXState initialized to zero */
1219 len
= urb
->transfer_buffer_length
;
1220 is_input
= usb_pipein(urb
->pipe
);
1221 if (!urb
->transfer_buffer
&& urb
->transfer_buffer_length
&& is_input
)
1222 urb
->transfer_buffer
= phys_to_virt(urb
->transfer_dma
);
1224 if (usb_pipecontrol(urb
->pipe
)) {
1226 ret
= oxu_buf_alloc(oxu
, qtd
, sizeof(struct usb_ctrlrequest
));
1230 qtd_fill(qtd
, qtd
->buffer_dma
, sizeof(struct usb_ctrlrequest
),
1231 token
| (2 /* "setup" */ << 8), 8);
1232 memcpy(qtd
->buffer
, qtd
->urb
->setup_packet
,
1233 sizeof(struct usb_ctrlrequest
));
1235 /* ... and always at least one more pid */
1236 token
^= QTD_TOGGLE
;
1238 qtd
= ehci_qtd_alloc(oxu
);
1242 qtd_prev
->hw_next
= QTD_NEXT(qtd
->qtd_dma
);
1243 list_add_tail(&qtd
->qtd_list
, head
);
1245 /* for zero length DATA stages, STATUS is always IN */
1247 token
|= (1 /* "in" */ << 8);
1251 * Data transfer stage: buffer setup
1254 ret
= oxu_buf_alloc(oxu
, qtd
, len
);
1258 buf
= qtd
->buffer_dma
;
1259 transfer_buf
= urb
->transfer_buffer
;
1262 memcpy(qtd
->buffer
, qtd
->urb
->transfer_buffer
, len
);
1265 token
|= (1 /* "in" */ << 8);
1266 /* else it's already initted to "out" pid (0 << 8) */
1268 maxpacket
= max_packet(usb_maxpacket(urb
->dev
, urb
->pipe
, !is_input
));
1271 * buffer gets wrapped in one or more qtds;
1272 * last one may be "short" (including zero len)
1273 * and may serve as a control status ack
1278 this_qtd_len
= qtd_fill(qtd
, buf
, len
, token
, maxpacket
);
1279 qtd
->transfer_buffer
= transfer_buf
;
1280 len
-= this_qtd_len
;
1281 buf
+= this_qtd_len
;
1282 transfer_buf
+= this_qtd_len
;
1284 qtd
->hw_alt_next
= oxu
->async
->hw_alt_next
;
1286 /* qh makes control packets use qtd toggle; maybe switch it */
1287 if ((maxpacket
& (this_qtd_len
+ (maxpacket
- 1))) == 0)
1288 token
^= QTD_TOGGLE
;
1290 if (likely(len
<= 0))
1294 qtd
= ehci_qtd_alloc(oxu
);
1297 if (likely(len
> 0)) {
1298 ret
= oxu_buf_alloc(oxu
, qtd
, len
);
1303 qtd_prev
->hw_next
= QTD_NEXT(qtd
->qtd_dma
);
1304 list_add_tail(&qtd
->qtd_list
, head
);
1307 /* unless the bulk/interrupt caller wants a chance to clean
1308 * up after short reads, hc should advance qh past this urb
1310 if (likely((urb
->transfer_flags
& URB_SHORT_NOT_OK
) == 0
1311 || usb_pipecontrol(urb
->pipe
)))
1312 qtd
->hw_alt_next
= EHCI_LIST_END
;
1315 * control requests may need a terminating data "status" ack;
1316 * bulk ones may need a terminating short packet (zero length).
1318 if (likely(urb
->transfer_buffer_length
!= 0)) {
1321 if (usb_pipecontrol(urb
->pipe
)) {
1323 token
^= 0x0100; /* "in" <--> "out" */
1324 token
|= QTD_TOGGLE
; /* force DATA1 */
1325 } else if (usb_pipebulk(urb
->pipe
)
1326 && (urb
->transfer_flags
& URB_ZERO_PACKET
)
1327 && !(urb
->transfer_buffer_length
% maxpacket
)) {
1332 qtd
= ehci_qtd_alloc(oxu
);
1336 qtd_prev
->hw_next
= QTD_NEXT(qtd
->qtd_dma
);
1337 list_add_tail(&qtd
->qtd_list
, head
);
1339 /* never any data in such packets */
1340 qtd_fill(qtd
, 0, 0, token
, 0);
1344 /* by default, enable interrupt on urb completion */
1345 qtd
->hw_token
|= cpu_to_le32(QTD_IOC
);
1349 qtd_list_free(oxu
, urb
, head
);
1353 /* Each QH holds a qtd list; a QH is used for everything except iso.
1355 * For interrupt urbs, the scheduler must set the microframe scheduling
1356 * mask(s) each time the QH gets scheduled. For highspeed, that's
1357 * just one microframe in the s-mask. For split interrupt transactions
1358 * there are additional complications: c-mask, maybe FSTNs.
1360 static struct ehci_qh
*qh_make(struct oxu_hcd
*oxu
,
1361 struct urb
*urb
, gfp_t flags
)
1363 struct ehci_qh
*qh
= oxu_qh_alloc(oxu
);
1364 u32 info1
= 0, info2
= 0;
1372 * init endpoint/device data for this QH
1374 info1
|= usb_pipeendpoint(urb
->pipe
) << 8;
1375 info1
|= usb_pipedevice(urb
->pipe
) << 0;
1377 is_input
= usb_pipein(urb
->pipe
);
1378 type
= usb_pipetype(urb
->pipe
);
1379 maxp
= usb_maxpacket(urb
->dev
, urb
->pipe
, !is_input
);
1381 /* Compute interrupt scheduling parameters just once, and save.
1382 * - allowing for high bandwidth, how many nsec/uframe are used?
1383 * - split transactions need a second CSPLIT uframe; same question
1384 * - splits also need a schedule gap (for full/low speed I/O)
1385 * - qh has a polling interval
1387 * For control/bulk requests, the HC or TT handles these.
1389 if (type
== PIPE_INTERRUPT
) {
1390 qh
->usecs
= NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH
,
1392 hb_mult(maxp
) * max_packet(maxp
)));
1393 qh
->start
= NO_FRAME
;
1395 if (urb
->dev
->speed
== USB_SPEED_HIGH
) {
1399 qh
->period
= urb
->interval
>> 3;
1400 if (qh
->period
== 0 && urb
->interval
!= 1) {
1401 /* NOTE interval 2 or 4 uframes could work.
1402 * But interval 1 scheduling is simpler, and
1403 * includes high bandwidth.
1405 oxu_dbg(oxu
, "intr period %d uframes, NYET!\n",
1410 struct usb_tt
*tt
= urb
->dev
->tt
;
1413 /* gap is f(FS/LS transfer times) */
1414 qh
->gap_uf
= 1 + usb_calc_bus_time(urb
->dev
->speed
,
1415 is_input
, 0, maxp
) / (125 * 1000);
1417 /* FIXME this just approximates SPLIT/CSPLIT times */
1418 if (is_input
) { /* SPLIT, gap, CSPLIT+DATA */
1419 qh
->c_usecs
= qh
->usecs
+ HS_USECS(0);
1420 qh
->usecs
= HS_USECS(1);
1421 } else { /* SPLIT+DATA, gap, CSPLIT */
1422 qh
->usecs
+= HS_USECS(1);
1423 qh
->c_usecs
= HS_USECS(0);
1426 think_time
= tt
? tt
->think_time
: 0;
1427 qh
->tt_usecs
= NS_TO_US(think_time
+
1428 usb_calc_bus_time(urb
->dev
->speed
,
1429 is_input
, 0, max_packet(maxp
)));
1430 qh
->period
= urb
->interval
;
1434 /* support for tt scheduling, and access to toggles */
1438 switch (urb
->dev
->speed
) {
1440 info1
|= (1 << 12); /* EPS "low" */
1443 case USB_SPEED_FULL
:
1444 /* EPS 0 means "full" */
1445 if (type
!= PIPE_INTERRUPT
)
1446 info1
|= (EHCI_TUNE_RL_TT
<< 28);
1447 if (type
== PIPE_CONTROL
) {
1448 info1
|= (1 << 27); /* for TT */
1449 info1
|= 1 << 14; /* toggle from qtd */
1451 info1
|= maxp
<< 16;
1453 info2
|= (EHCI_TUNE_MULT_TT
<< 30);
1454 info2
|= urb
->dev
->ttport
<< 23;
1456 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1460 case USB_SPEED_HIGH
: /* no TT involved */
1461 info1
|= (2 << 12); /* EPS "high" */
1462 if (type
== PIPE_CONTROL
) {
1463 info1
|= (EHCI_TUNE_RL_HS
<< 28);
1464 info1
|= 64 << 16; /* usb2 fixed maxpacket */
1465 info1
|= 1 << 14; /* toggle from qtd */
1466 info2
|= (EHCI_TUNE_MULT_HS
<< 30);
1467 } else if (type
== PIPE_BULK
) {
1468 info1
|= (EHCI_TUNE_RL_HS
<< 28);
1469 info1
|= 512 << 16; /* usb2 fixed maxpacket */
1470 info2
|= (EHCI_TUNE_MULT_HS
<< 30);
1471 } else { /* PIPE_INTERRUPT */
1472 info1
|= max_packet(maxp
) << 16;
1473 info2
|= hb_mult(maxp
) << 30;
1477 oxu_dbg(oxu
, "bogus dev %p speed %d\n", urb
->dev
, urb
->dev
->speed
);
1483 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1485 /* init as live, toggle clear, advance to dummy */
1486 qh
->qh_state
= QH_STATE_IDLE
;
1487 qh
->hw_info1
= cpu_to_le32(info1
);
1488 qh
->hw_info2
= cpu_to_le32(info2
);
1489 usb_settoggle(urb
->dev
, usb_pipeendpoint(urb
->pipe
), !is_input
, 1);
1490 qh_refresh(oxu
, qh
);
1494 /* Move qh (and its qtds) onto async queue; maybe enable queue.
1496 static void qh_link_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
1498 __le32 dma
= QH_NEXT(qh
->qh_dma
);
1499 struct ehci_qh
*head
;
1501 /* (re)start the async schedule? */
1503 timer_action_done(oxu
, TIMER_ASYNC_OFF
);
1504 if (!head
->qh_next
.qh
) {
1505 u32 cmd
= readl(&oxu
->regs
->command
);
1507 if (!(cmd
& CMD_ASE
)) {
1508 /* in case a clear of CMD_ASE didn't take yet */
1509 (void)handshake(oxu
, &oxu
->regs
->status
,
1511 cmd
|= CMD_ASE
| CMD_RUN
;
1512 writel(cmd
, &oxu
->regs
->command
);
1513 oxu_to_hcd(oxu
)->state
= HC_STATE_RUNNING
;
1514 /* posted write need not be known to HC yet ... */
1518 /* clear halt and/or toggle; and maybe recover from silicon quirk */
1519 if (qh
->qh_state
== QH_STATE_IDLE
)
1520 qh_refresh(oxu
, qh
);
1522 /* splice right after start */
1523 qh
->qh_next
= head
->qh_next
;
1524 qh
->hw_next
= head
->hw_next
;
1527 head
->qh_next
.qh
= qh
;
1528 head
->hw_next
= dma
;
1530 qh
->qh_state
= QH_STATE_LINKED
;
1531 /* qtd completions reported later by interrupt */
1534 #define QH_ADDR_MASK cpu_to_le32(0x7f)
1537 * For control/bulk/interrupt, return QH with these TDs appended.
1538 * Allocates and initializes the QH if necessary.
1539 * Returns null if it can't allocate a QH it needs to.
1540 * If the QH has TDs (urbs) already, that's great.
1542 static struct ehci_qh
*qh_append_tds(struct oxu_hcd
*oxu
,
1543 struct urb
*urb
, struct list_head
*qtd_list
,
1544 int epnum
, void **ptr
)
1546 struct ehci_qh
*qh
= NULL
;
1548 qh
= (struct ehci_qh
*) *ptr
;
1549 if (unlikely(qh
== NULL
)) {
1550 /* can't sleep here, we have oxu->lock... */
1551 qh
= qh_make(oxu
, urb
, GFP_ATOMIC
);
1554 if (likely(qh
!= NULL
)) {
1555 struct ehci_qtd
*qtd
;
1557 if (unlikely(list_empty(qtd_list
)))
1560 qtd
= list_entry(qtd_list
->next
, struct ehci_qtd
,
1563 /* control qh may need patching ... */
1564 if (unlikely(epnum
== 0)) {
1566 /* usb_reset_device() briefly reverts to address 0 */
1567 if (usb_pipedevice(urb
->pipe
) == 0)
1568 qh
->hw_info1
&= ~QH_ADDR_MASK
;
1571 /* just one way to queue requests: swap with the dummy qtd.
1572 * only hc or qh_refresh() ever modify the overlay.
1574 if (likely(qtd
!= NULL
)) {
1575 struct ehci_qtd
*dummy
;
1579 /* to avoid racing the HC, use the dummy td instead of
1580 * the first td of our list (becomes new dummy). both
1581 * tds stay deactivated until we're done, when the
1582 * HC is allowed to fetch the old dummy (4.10.2).
1584 token
= qtd
->hw_token
;
1585 qtd
->hw_token
= HALT_BIT
;
1589 dma
= dummy
->qtd_dma
;
1591 dummy
->qtd_dma
= dma
;
1593 list_del(&qtd
->qtd_list
);
1594 list_add(&dummy
->qtd_list
, qtd_list
);
1595 list_splice(qtd_list
, qh
->qtd_list
.prev
);
1597 ehci_qtd_init(qtd
, qtd
->qtd_dma
);
1600 /* hc must see the new dummy at list end */
1602 qtd
= list_entry(qh
->qtd_list
.prev
,
1603 struct ehci_qtd
, qtd_list
);
1604 qtd
->hw_next
= QTD_NEXT(dma
);
1606 /* let the hc process these next qtds */
1607 dummy
->hw_token
= (token
& ~(0x80));
1609 dummy
->hw_token
= token
;
1611 urb
->hcpriv
= qh_get(qh
);
1617 static int submit_async(struct oxu_hcd
*oxu
, struct urb
*urb
,
1618 struct list_head
*qtd_list
, gfp_t mem_flags
)
1620 struct ehci_qtd
*qtd
;
1622 unsigned long flags
;
1623 struct ehci_qh
*qh
= NULL
;
1626 qtd
= list_entry(qtd_list
->next
, struct ehci_qtd
, qtd_list
);
1627 epnum
= urb
->ep
->desc
.bEndpointAddress
;
1629 #ifdef OXU_URB_TRACE
1630 oxu_dbg(oxu
, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1631 __func__
, urb
->dev
->devpath
, urb
,
1632 epnum
& 0x0f, (epnum
& USB_DIR_IN
) ? "in" : "out",
1633 urb
->transfer_buffer_length
,
1634 qtd
, urb
->ep
->hcpriv
);
1637 spin_lock_irqsave(&oxu
->lock
, flags
);
1638 if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu
)))) {
1643 qh
= qh_append_tds(oxu
, urb
, qtd_list
, epnum
, &urb
->ep
->hcpriv
);
1644 if (unlikely(qh
== NULL
)) {
1649 /* Control/bulk operations through TTs don't need scheduling,
1650 * the HC and TT handle it when the TT has a buffer ready.
1652 if (likely(qh
->qh_state
== QH_STATE_IDLE
))
1653 qh_link_async(oxu
, qh_get(qh
));
1655 spin_unlock_irqrestore(&oxu
->lock
, flags
);
1656 if (unlikely(qh
== NULL
))
1657 qtd_list_free(oxu
, urb
, qtd_list
);
1661 /* The async qh for the qtds being reclaimed are now unlinked from the HC */
1663 static void end_unlink_async(struct oxu_hcd
*oxu
)
1665 struct ehci_qh
*qh
= oxu
->reclaim
;
1666 struct ehci_qh
*next
;
1668 timer_action_done(oxu
, TIMER_IAA_WATCHDOG
);
1670 qh
->qh_state
= QH_STATE_IDLE
;
1671 qh
->qh_next
.qh
= NULL
;
1672 qh_put(qh
); /* refcount from reclaim */
1674 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1676 oxu
->reclaim
= next
;
1677 oxu
->reclaim_ready
= 0;
1680 qh_completions(oxu
, qh
);
1682 if (!list_empty(&qh
->qtd_list
)
1683 && HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))
1684 qh_link_async(oxu
, qh
);
1686 qh_put(qh
); /* refcount from async list */
1688 /* it's not free to turn the async schedule on/off; leave it
1689 * active but idle for a while once it empties.
1691 if (HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
)
1692 && oxu
->async
->qh_next
.qh
== NULL
)
1693 timer_action(oxu
, TIMER_ASYNC_OFF
);
1697 oxu
->reclaim
= NULL
;
1698 start_unlink_async(oxu
, next
);
1702 /* makes sure the async qh will become idle */
1703 /* caller must own oxu->lock */
1705 static void start_unlink_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
1707 int cmd
= readl(&oxu
->regs
->command
);
1708 struct ehci_qh
*prev
;
1711 assert_spin_locked(&oxu
->lock
);
1712 if (oxu
->reclaim
|| (qh
->qh_state
!= QH_STATE_LINKED
1713 && qh
->qh_state
!= QH_STATE_UNLINK_WAIT
))
1717 /* stop async schedule right now? */
1718 if (unlikely(qh
== oxu
->async
)) {
1719 /* can't get here without STS_ASS set */
1720 if (oxu_to_hcd(oxu
)->state
!= HC_STATE_HALT
1722 /* ... and CMD_IAAD clear */
1723 writel(cmd
& ~CMD_ASE
, &oxu
->regs
->command
);
1725 /* handshake later, if we need to */
1726 timer_action_done(oxu
, TIMER_ASYNC_OFF
);
1731 qh
->qh_state
= QH_STATE_UNLINK
;
1732 oxu
->reclaim
= qh
= qh_get(qh
);
1735 while (prev
->qh_next
.qh
!= qh
)
1736 prev
= prev
->qh_next
.qh
;
1738 prev
->hw_next
= qh
->hw_next
;
1739 prev
->qh_next
= qh
->qh_next
;
1742 if (unlikely(oxu_to_hcd(oxu
)->state
== HC_STATE_HALT
)) {
1743 /* if (unlikely(qh->reclaim != 0))
1744 * this will recurse, probably not much
1746 end_unlink_async(oxu
);
1750 oxu
->reclaim_ready
= 0;
1752 writel(cmd
, &oxu
->regs
->command
);
1753 (void) readl(&oxu
->regs
->command
);
1754 timer_action(oxu
, TIMER_IAA_WATCHDOG
);
1757 static void scan_async(struct oxu_hcd
*oxu
)
1760 enum ehci_timer_action action
= TIMER_IO_WATCHDOG
;
1762 if (!++(oxu
->stamp
))
1764 timer_action_done(oxu
, TIMER_ASYNC_SHRINK
);
1766 qh
= oxu
->async
->qh_next
.qh
;
1767 if (likely(qh
!= NULL
)) {
1769 /* clean any finished work for this qh */
1770 if (!list_empty(&qh
->qtd_list
)
1771 && qh
->stamp
!= oxu
->stamp
) {
1774 /* unlinks could happen here; completion
1775 * reporting drops the lock. rescan using
1776 * the latest schedule, but don't rescan
1777 * qhs we already finished (no looping).
1780 qh
->stamp
= oxu
->stamp
;
1781 temp
= qh_completions(oxu
, qh
);
1787 /* unlink idle entries, reducing HC PCI usage as well
1788 * as HCD schedule-scanning costs. delay for any qh
1789 * we just scanned, there's a not-unusual case that it
1790 * doesn't stay idle for long.
1791 * (plus, avoids some kind of re-activation race.)
1793 if (list_empty(&qh
->qtd_list
)) {
1794 if (qh
->stamp
== oxu
->stamp
)
1795 action
= TIMER_ASYNC_SHRINK
;
1796 else if (!oxu
->reclaim
1797 && qh
->qh_state
== QH_STATE_LINKED
)
1798 start_unlink_async(oxu
, qh
);
1801 qh
= qh
->qh_next
.qh
;
1804 if (action
== TIMER_ASYNC_SHRINK
)
1805 timer_action(oxu
, TIMER_ASYNC_SHRINK
);
1809 * periodic_next_shadow - return "next" pointer on shadow list
1810 * @periodic: host pointer to qh/itd/sitd
1811 * @tag: hardware tag for type of this record
1813 static union ehci_shadow
*periodic_next_shadow(union ehci_shadow
*periodic
,
1819 return &periodic
->qh
->qh_next
;
1823 /* caller must hold oxu->lock */
1824 static void periodic_unlink(struct oxu_hcd
*oxu
, unsigned frame
, void *ptr
)
1826 union ehci_shadow
*prev_p
= &oxu
->pshadow
[frame
];
1827 __le32
*hw_p
= &oxu
->periodic
[frame
];
1828 union ehci_shadow here
= *prev_p
;
1830 /* find predecessor of "ptr"; hw and shadow lists are in sync */
1831 while (here
.ptr
&& here
.ptr
!= ptr
) {
1832 prev_p
= periodic_next_shadow(prev_p
, Q_NEXT_TYPE(*hw_p
));
1833 hw_p
= here
.hw_next
;
1836 /* an interrupt entry (at list end) could have been shared */
1840 /* update shadow and hardware lists ... the old "next" pointers
1841 * from ptr may still be in use, the caller updates them.
1843 *prev_p
= *periodic_next_shadow(&here
, Q_NEXT_TYPE(*hw_p
));
1844 *hw_p
= *here
.hw_next
;
1847 /* how many of the uframe's 125 usecs are allocated? */
1848 static unsigned short periodic_usecs(struct oxu_hcd
*oxu
,
1849 unsigned frame
, unsigned uframe
)
1851 __le32
*hw_p
= &oxu
->periodic
[frame
];
1852 union ehci_shadow
*q
= &oxu
->pshadow
[frame
];
1856 switch (Q_NEXT_TYPE(*hw_p
)) {
1859 /* is it in the S-mask? */
1860 if (q
->qh
->hw_info2
& cpu_to_le32(1 << uframe
))
1861 usecs
+= q
->qh
->usecs
;
1862 /* ... or C-mask? */
1863 if (q
->qh
->hw_info2
& cpu_to_le32(1 << (8 + uframe
)))
1864 usecs
+= q
->qh
->c_usecs
;
1865 hw_p
= &q
->qh
->hw_next
;
1866 q
= &q
->qh
->qh_next
;
1872 oxu_err(oxu
, "uframe %d sched overrun: %d usecs\n",
1873 frame
* 8 + uframe
, usecs
);
1878 static int enable_periodic(struct oxu_hcd
*oxu
)
1883 /* did clearing PSE did take effect yet?
1884 * takes effect only at frame boundaries...
1886 status
= handshake(oxu
, &oxu
->regs
->status
, STS_PSS
, 0, 9 * 125);
1888 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
1889 usb_hc_died(oxu_to_hcd(oxu
));
1893 cmd
= readl(&oxu
->regs
->command
) | CMD_PSE
;
1894 writel(cmd
, &oxu
->regs
->command
);
1895 /* posted write ... PSS happens later */
1896 oxu_to_hcd(oxu
)->state
= HC_STATE_RUNNING
;
1898 /* make sure ehci_work scans these */
1899 oxu
->next_uframe
= readl(&oxu
->regs
->frame_index
)
1900 % (oxu
->periodic_size
<< 3);
1904 static int disable_periodic(struct oxu_hcd
*oxu
)
1909 /* did setting PSE not take effect yet?
1910 * takes effect only at frame boundaries...
1912 status
= handshake(oxu
, &oxu
->regs
->status
, STS_PSS
, STS_PSS
, 9 * 125);
1914 oxu_to_hcd(oxu
)->state
= HC_STATE_HALT
;
1915 usb_hc_died(oxu_to_hcd(oxu
));
1919 cmd
= readl(&oxu
->regs
->command
) & ~CMD_PSE
;
1920 writel(cmd
, &oxu
->regs
->command
);
1921 /* posted write ... */
1923 oxu
->next_uframe
= -1;
1927 /* periodic schedule slots have iso tds (normal or split) first, then a
1928 * sparse tree for active interrupt transfers.
1930 * this just links in a qh; caller guarantees uframe masks are set right.
1931 * no FSTN support (yet; oxu 0.96+)
1933 static int qh_link_periodic(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
1936 unsigned period
= qh
->period
;
1938 dev_dbg(&qh
->dev
->dev
,
1939 "link qh%d-%04x/%p start %d [%d/%d us]\n",
1940 period
, le32_to_cpup(&qh
->hw_info2
) & (QH_CMASK
| QH_SMASK
),
1941 qh
, qh
->start
, qh
->usecs
, qh
->c_usecs
);
1943 /* high bandwidth, or otherwise every microframe */
1947 for (i
= qh
->start
; i
< oxu
->periodic_size
; i
+= period
) {
1948 union ehci_shadow
*prev
= &oxu
->pshadow
[i
];
1949 __le32
*hw_p
= &oxu
->periodic
[i
];
1950 union ehci_shadow here
= *prev
;
1953 /* skip the iso nodes at list head */
1955 type
= Q_NEXT_TYPE(*hw_p
);
1956 if (type
== Q_TYPE_QH
)
1958 prev
= periodic_next_shadow(prev
, type
);
1959 hw_p
= &here
.qh
->hw_next
;
1963 /* sorting each branch by period (slow-->fast)
1964 * enables sharing interior tree nodes
1966 while (here
.ptr
&& qh
!= here
.qh
) {
1967 if (qh
->period
> here
.qh
->period
)
1969 prev
= &here
.qh
->qh_next
;
1970 hw_p
= &here
.qh
->hw_next
;
1973 /* link in this qh, unless some earlier pass did that */
1974 if (qh
!= here
.qh
) {
1977 qh
->hw_next
= *hw_p
;
1980 *hw_p
= QH_NEXT(qh
->qh_dma
);
1983 qh
->qh_state
= QH_STATE_LINKED
;
1986 /* update per-qh bandwidth for usbfs */
1987 oxu_to_hcd(oxu
)->self
.bandwidth_allocated
+= qh
->period
1988 ? ((qh
->usecs
+ qh
->c_usecs
) / qh
->period
)
1991 /* maybe enable periodic schedule processing */
1992 if (!oxu
->periodic_sched
++)
1993 return enable_periodic(oxu
);
1998 static void qh_unlink_periodic(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
2004 * IF this isn't high speed
2005 * and this qh is active in the current uframe
2006 * (and overlay token SplitXstate is false?)
2008 * qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2011 /* high bandwidth, or otherwise part of every microframe */
2012 period
= qh
->period
;
2016 for (i
= qh
->start
; i
< oxu
->periodic_size
; i
+= period
)
2017 periodic_unlink(oxu
, i
, qh
);
2019 /* update per-qh bandwidth for usbfs */
2020 oxu_to_hcd(oxu
)->self
.bandwidth_allocated
-= qh
->period
2021 ? ((qh
->usecs
+ qh
->c_usecs
) / qh
->period
)
2024 dev_dbg(&qh
->dev
->dev
,
2025 "unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2027 le32_to_cpup(&qh
->hw_info2
) & (QH_CMASK
| QH_SMASK
),
2028 qh
, qh
->start
, qh
->usecs
, qh
->c_usecs
);
2030 /* qh->qh_next still "live" to HC */
2031 qh
->qh_state
= QH_STATE_UNLINK
;
2032 qh
->qh_next
.ptr
= NULL
;
2035 /* maybe turn off periodic schedule */
2036 oxu
->periodic_sched
--;
2037 if (!oxu
->periodic_sched
)
2038 (void) disable_periodic(oxu
);
2041 static void intr_deschedule(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
2045 qh_unlink_periodic(oxu
, qh
);
2047 /* simple/paranoid: always delay, expecting the HC needs to read
2048 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2049 * expect khubd to clean up after any CSPLITs we won't issue.
2050 * active high speed queues may need bigger delays...
2052 if (list_empty(&qh
->qtd_list
)
2053 || (cpu_to_le32(QH_CMASK
) & qh
->hw_info2
) != 0)
2056 wait
= 55; /* worst case: 3 * 1024 */
2059 qh
->qh_state
= QH_STATE_IDLE
;
2060 qh
->hw_next
= EHCI_LIST_END
;
2064 static int check_period(struct oxu_hcd
*oxu
,
2065 unsigned frame
, unsigned uframe
,
2066 unsigned period
, unsigned usecs
)
2070 /* complete split running into next frame?
2071 * given FSTN support, we could sometimes check...
2077 * 80% periodic == 100 usec/uframe available
2078 * convert "usecs we need" to "max already claimed"
2080 usecs
= 100 - usecs
;
2082 /* we "know" 2 and 4 uframe intervals were rejected; so
2083 * for period 0, check _every_ microframe in the schedule.
2085 if (unlikely(period
== 0)) {
2087 for (uframe
= 0; uframe
< 7; uframe
++) {
2088 claimed
= periodic_usecs(oxu
, frame
, uframe
);
2089 if (claimed
> usecs
)
2092 } while ((frame
+= 1) < oxu
->periodic_size
);
2094 /* just check the specified uframe, at that period */
2097 claimed
= periodic_usecs(oxu
, frame
, uframe
);
2098 if (claimed
> usecs
)
2100 } while ((frame
+= period
) < oxu
->periodic_size
);
2106 static int check_intr_schedule(struct oxu_hcd
*oxu
,
2107 unsigned frame
, unsigned uframe
,
2108 const struct ehci_qh
*qh
, __le32
*c_maskp
)
2110 int retval
= -ENOSPC
;
2112 if (qh
->c_usecs
&& uframe
>= 6) /* FSTN territory? */
2115 if (!check_period(oxu
, frame
, uframe
, qh
->period
, qh
->usecs
))
2127 /* "first fit" scheduling policy used the first time through,
2128 * or when the previous schedule slot can't be re-used.
2130 static int qh_schedule(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
2135 unsigned frame
; /* 0..(qh->period - 1), or NO_FRAME */
2137 qh_refresh(oxu
, qh
);
2138 qh
->hw_next
= EHCI_LIST_END
;
2141 /* reuse the previous schedule slots, if we can */
2142 if (frame
< qh
->period
) {
2143 uframe
= ffs(le32_to_cpup(&qh
->hw_info2
) & QH_SMASK
);
2144 status
= check_intr_schedule(oxu
, frame
, --uframe
,
2152 /* else scan the schedule to find a group of slots such that all
2153 * uframes have enough periodic bandwidth available.
2156 /* "normal" case, uframing flexible except with splits */
2158 frame
= qh
->period
- 1;
2160 for (uframe
= 0; uframe
< 8; uframe
++) {
2161 status
= check_intr_schedule(oxu
,
2167 } while (status
&& frame
--);
2169 /* qh->period == 0 means every uframe */
2172 status
= check_intr_schedule(oxu
, 0, 0, qh
, &c_mask
);
2178 /* reset S-frame and (maybe) C-frame masks */
2179 qh
->hw_info2
&= cpu_to_le32(~(QH_CMASK
| QH_SMASK
));
2180 qh
->hw_info2
|= qh
->period
2181 ? cpu_to_le32(1 << uframe
)
2182 : cpu_to_le32(QH_SMASK
);
2183 qh
->hw_info2
|= c_mask
;
2185 oxu_dbg(oxu
, "reused qh %p schedule\n", qh
);
2187 /* stuff into the periodic schedule */
2188 status
= qh_link_periodic(oxu
, qh
);
2193 static int intr_submit(struct oxu_hcd
*oxu
, struct urb
*urb
,
2194 struct list_head
*qtd_list
, gfp_t mem_flags
)
2197 unsigned long flags
;
2200 struct list_head empty
;
2202 /* get endpoint and transfer/schedule data */
2203 epnum
= urb
->ep
->desc
.bEndpointAddress
;
2205 spin_lock_irqsave(&oxu
->lock
, flags
);
2207 if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu
)))) {
2208 status
= -ESHUTDOWN
;
2212 /* get qh and force any scheduling errors */
2213 INIT_LIST_HEAD(&empty
);
2214 qh
= qh_append_tds(oxu
, urb
, &empty
, epnum
, &urb
->ep
->hcpriv
);
2219 if (qh
->qh_state
== QH_STATE_IDLE
) {
2220 status
= qh_schedule(oxu
, qh
);
2225 /* then queue the urb's tds to the qh */
2226 qh
= qh_append_tds(oxu
, urb
, qtd_list
, epnum
, &urb
->ep
->hcpriv
);
2229 /* ... update usbfs periodic stats */
2230 oxu_to_hcd(oxu
)->self
.bandwidth_int_reqs
++;
2233 spin_unlock_irqrestore(&oxu
->lock
, flags
);
2235 qtd_list_free(oxu
, urb
, qtd_list
);
2240 static inline int itd_submit(struct oxu_hcd
*oxu
, struct urb
*urb
,
2243 oxu_dbg(oxu
, "iso support is missing!\n");
2247 static inline int sitd_submit(struct oxu_hcd
*oxu
, struct urb
*urb
,
2250 oxu_dbg(oxu
, "split iso support is missing!\n");
2254 static void scan_periodic(struct oxu_hcd
*oxu
)
2256 unsigned frame
, clock
, now_uframe
, mod
;
2259 mod
= oxu
->periodic_size
<< 3;
2262 * When running, scan from last scan point up to "now"
2263 * else clean up by scanning everything that's left.
2264 * Touches as few pages as possible: cache-friendly.
2266 now_uframe
= oxu
->next_uframe
;
2267 if (HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))
2268 clock
= readl(&oxu
->regs
->frame_index
);
2270 clock
= now_uframe
+ mod
- 1;
2274 union ehci_shadow q
, *q_p
;
2278 /* don't scan past the live uframe */
2279 frame
= now_uframe
>> 3;
2280 if (frame
== (clock
>> 3))
2281 uframes
= now_uframe
& 0x07;
2283 /* safe to scan the whole frame at once */
2289 /* scan each element in frame's queue for completions */
2290 q_p
= &oxu
->pshadow
[frame
];
2291 hw_p
= &oxu
->periodic
[frame
];
2293 type
= Q_NEXT_TYPE(*hw_p
);
2296 while (q
.ptr
!= NULL
) {
2297 union ehci_shadow temp
;
2300 live
= HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
);
2303 /* handle any completions */
2304 temp
.qh
= qh_get(q
.qh
);
2305 type
= Q_NEXT_TYPE(q
.qh
->hw_next
);
2307 modified
= qh_completions(oxu
, temp
.qh
);
2308 if (unlikely(list_empty(&temp
.qh
->qtd_list
)))
2309 intr_deschedule(oxu
, temp
.qh
);
2313 oxu_dbg(oxu
, "corrupt type %d frame %d shadow %p\n",
2314 type
, frame
, q
.ptr
);
2318 /* assume completion callbacks modify the queue */
2319 if (unlikely(modified
))
2323 /* Stop when we catch up to the HC */
2325 /* FIXME: this assumes we won't get lapped when
2326 * latencies climb; that should be rare, but...
2327 * detect it, and just go all the way around.
2328 * FLR might help detect this case, so long as latencies
2329 * don't exceed periodic_size msec (default 1.024 sec).
2332 /* FIXME: likewise assumes HC doesn't halt mid-scan */
2334 if (now_uframe
== clock
) {
2337 if (!HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
))
2339 oxu
->next_uframe
= now_uframe
;
2340 now
= readl(&oxu
->regs
->frame_index
) % mod
;
2341 if (now_uframe
== now
)
2344 /* rescan the rest of this frame, then ... */
2353 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
2354 * The firmware seems to think that powering off is a wakeup event!
2355 * This routine turns off remote wakeup and everything else, on all ports.
2357 static void ehci_turn_off_all_ports(struct oxu_hcd
*oxu
)
2359 int port
= HCS_N_PORTS(oxu
->hcs_params
);
2362 writel(PORT_RWC_BITS
, &oxu
->regs
->port_status
[port
]);
2365 static void ehci_port_power(struct oxu_hcd
*oxu
, int is_on
)
2369 if (!HCS_PPC(oxu
->hcs_params
))
2372 oxu_dbg(oxu
, "...power%s ports...\n", is_on
? "up" : "down");
2373 for (port
= HCS_N_PORTS(oxu
->hcs_params
); port
> 0; )
2374 (void) oxu_hub_control(oxu_to_hcd(oxu
),
2375 is_on
? SetPortFeature
: ClearPortFeature
,
2376 USB_PORT_FEAT_POWER
,
2381 /* Called from some interrupts, timers, and so on.
2382 * It calls driver completion functions, after dropping oxu->lock.
2384 static void ehci_work(struct oxu_hcd
*oxu
)
2386 timer_action_done(oxu
, TIMER_IO_WATCHDOG
);
2387 if (oxu
->reclaim_ready
)
2388 end_unlink_async(oxu
);
2390 /* another CPU may drop oxu->lock during a schedule scan while
2391 * it reports urb completions. this flag guards against bogus
2392 * attempts at re-entrant schedule scanning.
2398 if (oxu
->next_uframe
!= -1)
2402 /* the IO watchdog guards against hardware or driver bugs that
2403 * misplace IRQs, and should let us run completely without IRQs.
2404 * such lossage has been observed on both VT6202 and VT8235.
2406 if (HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
) &&
2407 (oxu
->async
->qh_next
.ptr
!= NULL
||
2408 oxu
->periodic_sched
!= 0))
2409 timer_action(oxu
, TIMER_IO_WATCHDOG
);
2412 static void unlink_async(struct oxu_hcd
*oxu
, struct ehci_qh
*qh
)
2414 /* if we need to use IAA and it's busy, defer */
2415 if (qh
->qh_state
== QH_STATE_LINKED
2417 && HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
)) {
2418 struct ehci_qh
*last
;
2420 for (last
= oxu
->reclaim
;
2422 last
= last
->reclaim
)
2424 qh
->qh_state
= QH_STATE_UNLINK_WAIT
;
2427 /* bypass IAA if the hc can't care */
2428 } else if (!HC_IS_RUNNING(oxu_to_hcd(oxu
)->state
) && oxu
->reclaim
)
2429 end_unlink_async(oxu
);
2431 /* something else might have unlinked the qh by now */
2432 if (qh
->qh_state
== QH_STATE_LINKED
)
2433 start_unlink_async(oxu
, qh
);
2437 * USB host controller methods
2440 static irqreturn_t
oxu210_hcd_irq(struct usb_hcd
*hcd
)
2442 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2443 u32 status
, pcd_status
= 0;
2446 spin_lock(&oxu
->lock
);
2448 status
= readl(&oxu
->regs
->status
);
2450 /* e.g. cardbus physical eject */
2451 if (status
== ~(u32
) 0) {
2452 oxu_dbg(oxu
, "device removed\n");
2457 status
&= INTR_MASK
;
2458 if (!status
|| unlikely(hcd
->state
== HC_STATE_HALT
)) {
2459 spin_unlock(&oxu
->lock
);
2463 /* clear (just) interrupts */
2464 writel(status
, &oxu
->regs
->status
);
2465 readl(&oxu
->regs
->command
); /* unblock posted write */
2468 #ifdef OXU_VERBOSE_DEBUG
2469 /* unrequested/ignored: Frame List Rollover */
2470 dbg_status(oxu
, "irq", status
);
2473 /* INT, ERR, and IAA interrupt rates can be throttled */
2475 /* normal [4.15.1.2] or error [4.15.1.1] completion */
2476 if (likely((status
& (STS_INT
|STS_ERR
)) != 0))
2479 /* complete the unlinking of some qh [4.15.2.3] */
2480 if (status
& STS_IAA
) {
2481 oxu
->reclaim_ready
= 1;
2485 /* remote wakeup [4.3.1] */
2486 if (status
& STS_PCD
) {
2487 unsigned i
= HCS_N_PORTS(oxu
->hcs_params
);
2488 pcd_status
= status
;
2490 /* resume root hub? */
2491 if (!(readl(&oxu
->regs
->command
) & CMD_RUN
))
2492 usb_hcd_resume_root_hub(hcd
);
2495 int pstatus
= readl(&oxu
->regs
->port_status
[i
]);
2497 if (pstatus
& PORT_OWNER
)
2499 if (!(pstatus
& PORT_RESUME
)
2500 || oxu
->reset_done
[i
] != 0)
2503 /* start USB_RESUME_TIMEOUT resume signaling from this
2504 * port, and make khubd collect PORT_STAT_C_SUSPEND to
2505 * stop that signaling.
2507 oxu
->reset_done
[i
] = jiffies
+
2508 msecs_to_jiffies(USB_RESUME_TIMEOUT
);
2509 oxu_dbg(oxu
, "port %d remote wakeup\n", i
+ 1);
2510 mod_timer(&hcd
->rh_timer
, oxu
->reset_done
[i
]);
2514 /* PCI errors [4.15.2.4] */
2515 if (unlikely((status
& STS_FATAL
) != 0)) {
2516 /* bogus "fatal" IRQs appear on some chips... why? */
2517 status
= readl(&oxu
->regs
->status
);
2518 dbg_cmd(oxu
, "fatal", readl(&oxu
->regs
->command
));
2519 dbg_status(oxu
, "fatal", status
);
2520 if (status
& STS_HALT
) {
2521 oxu_err(oxu
, "fatal error\n");
2524 writel(0, &oxu
->regs
->configured_flag
);
2526 /* generic layer kills/unlinks all urbs, then
2527 * uses oxu_stop to clean up the rest
2535 spin_unlock(&oxu
->lock
);
2536 if (pcd_status
& STS_PCD
)
2537 usb_hcd_poll_rh_status(hcd
);
2541 static irqreturn_t
oxu_irq(struct usb_hcd
*hcd
)
2543 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2544 int ret
= IRQ_HANDLED
;
2546 u32 status
= oxu_readl(hcd
->regs
, OXU_CHIPIRQSTATUS
);
2547 u32 enable
= oxu_readl(hcd
->regs
, OXU_CHIPIRQEN_SET
);
2549 /* Disable all interrupt */
2550 oxu_writel(hcd
->regs
, OXU_CHIPIRQEN_CLR
, enable
);
2552 if ((oxu
->is_otg
&& (status
& OXU_USBOTGI
)) ||
2553 (!oxu
->is_otg
&& (status
& OXU_USBSPHI
)))
2554 oxu210_hcd_irq(hcd
);
2558 /* Enable all interrupt back */
2559 oxu_writel(hcd
->regs
, OXU_CHIPIRQEN_SET
, enable
);
2564 static void oxu_watchdog(unsigned long param
)
2566 struct oxu_hcd
*oxu
= (struct oxu_hcd
*) param
;
2567 unsigned long flags
;
2569 spin_lock_irqsave(&oxu
->lock
, flags
);
2571 /* lost IAA irqs wedge things badly; seen with a vt8235 */
2573 u32 status
= readl(&oxu
->regs
->status
);
2574 if (status
& STS_IAA
) {
2575 oxu_vdbg(oxu
, "lost IAA\n");
2576 writel(STS_IAA
, &oxu
->regs
->status
);
2577 oxu
->reclaim_ready
= 1;
2581 /* stop async processing after it's idled a bit */
2582 if (test_bit(TIMER_ASYNC_OFF
, &oxu
->actions
))
2583 start_unlink_async(oxu
, oxu
->async
);
2585 /* oxu could run by timer, without IRQs ... */
2588 spin_unlock_irqrestore(&oxu
->lock
, flags
);
2591 /* One-time init, only for memory state.
2593 static int oxu_hcd_init(struct usb_hcd
*hcd
)
2595 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2600 spin_lock_init(&oxu
->lock
);
2602 init_timer(&oxu
->watchdog
);
2603 oxu
->watchdog
.function
= oxu_watchdog
;
2604 oxu
->watchdog
.data
= (unsigned long) oxu
;
2607 * hw default: 1K periodic list heads, one per frame.
2608 * periodic_size can shrink by USBCMD update if hcc_params allows.
2610 oxu
->periodic_size
= DEFAULT_I_TDPS
;
2611 retval
= ehci_mem_init(oxu
, GFP_KERNEL
);
2615 /* controllers may cache some of the periodic schedule ... */
2616 hcc_params
= readl(&oxu
->caps
->hcc_params
);
2617 if (HCC_ISOC_CACHE(hcc_params
)) /* full frame cache */
2619 else /* N microframes cached */
2620 oxu
->i_thresh
= 2 + HCC_ISOC_THRES(hcc_params
);
2622 oxu
->reclaim
= NULL
;
2623 oxu
->reclaim_ready
= 0;
2624 oxu
->next_uframe
= -1;
2627 * dedicate a qh for the async ring head, since we couldn't unlink
2628 * a 'real' qh without stopping the async schedule [4.8]. use it
2629 * as the 'reclamation list head' too.
2630 * its dummy is used in hw_alt_next of many tds, to prevent the qh
2631 * from automatically advancing to the next td after short reads.
2633 oxu
->async
->qh_next
.qh
= NULL
;
2634 oxu
->async
->hw_next
= QH_NEXT(oxu
->async
->qh_dma
);
2635 oxu
->async
->hw_info1
= cpu_to_le32(QH_HEAD
);
2636 oxu
->async
->hw_token
= cpu_to_le32(QTD_STS_HALT
);
2637 oxu
->async
->hw_qtd_next
= EHCI_LIST_END
;
2638 oxu
->async
->qh_state
= QH_STATE_LINKED
;
2639 oxu
->async
->hw_alt_next
= QTD_NEXT(oxu
->async
->dummy
->qtd_dma
);
2641 /* clear interrupt enables, set irq latency */
2642 if (log2_irq_thresh
< 0 || log2_irq_thresh
> 6)
2643 log2_irq_thresh
= 0;
2644 temp
= 1 << (16 + log2_irq_thresh
);
2645 if (HCC_CANPARK(hcc_params
)) {
2646 /* HW default park == 3, on hardware that supports it (like
2647 * NVidia and ALI silicon), maximizes throughput on the async
2648 * schedule by avoiding QH fetches between transfers.
2650 * With fast usb storage devices and NForce2, "park" seems to
2651 * make problems: throughput reduction (!), data errors...
2654 park
= min(park
, (unsigned) 3);
2658 oxu_dbg(oxu
, "park %d\n", park
);
2660 if (HCC_PGM_FRAMELISTLEN(hcc_params
)) {
2661 /* periodic schedule size can be smaller than default */
2663 temp
|= (EHCI_TUNE_FLS
<< 2);
2665 oxu
->command
= temp
;
2670 /* Called during probe() after chip reset completes.
2672 static int oxu_reset(struct usb_hcd
*hcd
)
2674 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2677 spin_lock_init(&oxu
->mem_lock
);
2678 INIT_LIST_HEAD(&oxu
->urb_list
);
2682 hcd
->self
.controller
->dma_mask
= NULL
;
2685 oxu
->caps
= hcd
->regs
+ OXU_OTG_CAP_OFFSET
;
2686 oxu
->regs
= hcd
->regs
+ OXU_OTG_CAP_OFFSET
+ \
2687 HC_LENGTH(readl(&oxu
->caps
->hc_capbase
));
2689 oxu
->mem
= hcd
->regs
+ OXU_SPH_MEM
;
2691 oxu
->caps
= hcd
->regs
+ OXU_SPH_CAP_OFFSET
;
2692 oxu
->regs
= hcd
->regs
+ OXU_SPH_CAP_OFFSET
+ \
2693 HC_LENGTH(readl(&oxu
->caps
->hc_capbase
));
2695 oxu
->mem
= hcd
->regs
+ OXU_OTG_MEM
;
2698 oxu
->hcs_params
= readl(&oxu
->caps
->hcs_params
);
2701 ret
= oxu_hcd_init(hcd
);
2708 static int oxu_run(struct usb_hcd
*hcd
)
2710 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2712 u32 temp
, hcc_params
;
2714 hcd
->uses_new_polling
= 1;
2716 /* EHCI spec section 4.1 */
2717 retval
= ehci_reset(oxu
);
2719 ehci_mem_cleanup(oxu
);
2722 writel(oxu
->periodic_dma
, &oxu
->regs
->frame_list
);
2723 writel((u32
) oxu
->async
->qh_dma
, &oxu
->regs
->async_next
);
2725 /* hcc_params controls whether oxu->regs->segment must (!!!)
2726 * be used; it constrains QH/ITD/SITD and QTD locations.
2727 * pci_pool consistent memory always uses segment zero.
2728 * streaming mappings for I/O buffers, like pci_map_single(),
2729 * can return segments above 4GB, if the device allows.
2731 * NOTE: the dma mask is visible through dma_supported(), so
2732 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2733 * Scsi_Host.highmem_io, and so forth. It's readonly to all
2734 * host side drivers though.
2736 hcc_params
= readl(&oxu
->caps
->hcc_params
);
2737 if (HCC_64BIT_ADDR(hcc_params
))
2738 writel(0, &oxu
->regs
->segment
);
2740 oxu
->command
&= ~(CMD_LRESET
| CMD_IAAD
| CMD_PSE
|
2741 CMD_ASE
| CMD_RESET
);
2742 oxu
->command
|= CMD_RUN
;
2743 writel(oxu
->command
, &oxu
->regs
->command
);
2744 dbg_cmd(oxu
, "init", oxu
->command
);
2747 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2748 * are explicitly handed to companion controller(s), so no TT is
2749 * involved with the root hub. (Except where one is integrated,
2750 * and there's no companion controller unless maybe for USB OTG.)
2752 hcd
->state
= HC_STATE_RUNNING
;
2753 writel(FLAG_CF
, &oxu
->regs
->configured_flag
);
2754 readl(&oxu
->regs
->command
); /* unblock posted writes */
2756 temp
= HC_VERSION(readl(&oxu
->caps
->hc_capbase
));
2757 oxu_info(oxu
, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2758 ((oxu
->sbrn
& 0xf0)>>4), (oxu
->sbrn
& 0x0f),
2759 temp
>> 8, temp
& 0xff, DRIVER_VERSION
,
2760 ignore_oc
? ", overcurrent ignored" : "");
2762 writel(INTR_MASK
, &oxu
->regs
->intr_enable
); /* Turn On Interrupts */
2767 static void oxu_stop(struct usb_hcd
*hcd
)
2769 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2771 /* Turn off port power on all root hub ports. */
2772 ehci_port_power(oxu
, 0);
2774 /* no more interrupts ... */
2775 del_timer_sync(&oxu
->watchdog
);
2777 spin_lock_irq(&oxu
->lock
);
2778 if (HC_IS_RUNNING(hcd
->state
))
2782 writel(0, &oxu
->regs
->intr_enable
);
2783 spin_unlock_irq(&oxu
->lock
);
2785 /* let companion controllers work when we aren't */
2786 writel(0, &oxu
->regs
->configured_flag
);
2788 /* root hub is shut down separately (first, when possible) */
2789 spin_lock_irq(&oxu
->lock
);
2792 spin_unlock_irq(&oxu
->lock
);
2793 ehci_mem_cleanup(oxu
);
2795 dbg_status(oxu
, "oxu_stop completed", readl(&oxu
->regs
->status
));
2798 /* Kick in for silicon on any bus (not just pci, etc).
2799 * This forcibly disables dma and IRQs, helping kexec and other cases
2800 * where the next system software may expect clean state.
2802 static void oxu_shutdown(struct usb_hcd
*hcd
)
2804 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2806 (void) ehci_halt(oxu
);
2807 ehci_turn_off_all_ports(oxu
);
2809 /* make BIOS/etc use companion controller during reboot */
2810 writel(0, &oxu
->regs
->configured_flag
);
2812 /* unblock posted writes */
2813 readl(&oxu
->regs
->configured_flag
);
2816 /* Non-error returns are a promise to giveback() the urb later
2817 * we drop ownership so next owner (or urb unlink) can get it
2819 * urb + dev is in hcd.self.controller.urb_list
2820 * we're queueing TDs onto software and hardware lists
2822 * hcd-specific init for hcpriv hasn't been done yet
2824 * NOTE: control, bulk, and interrupt share the same code to append TDs
2825 * to a (possibly active) QH, and the same QH scanning code.
2827 static int __oxu_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
,
2830 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2831 struct list_head qtd_list
;
2833 INIT_LIST_HEAD(&qtd_list
);
2835 switch (usb_pipetype(urb
->pipe
)) {
2839 if (!qh_urb_transaction(oxu
, urb
, &qtd_list
, mem_flags
))
2841 return submit_async(oxu
, urb
, &qtd_list
, mem_flags
);
2843 case PIPE_INTERRUPT
:
2844 if (!qh_urb_transaction(oxu
, urb
, &qtd_list
, mem_flags
))
2846 return intr_submit(oxu
, urb
, &qtd_list
, mem_flags
);
2848 case PIPE_ISOCHRONOUS
:
2849 if (urb
->dev
->speed
== USB_SPEED_HIGH
)
2850 return itd_submit(oxu
, urb
, mem_flags
);
2852 return sitd_submit(oxu
, urb
, mem_flags
);
2856 /* This function is responsible for breaking URBs with big data size
2857 * into smaller size and processing small urbs in sequence.
2859 static int oxu_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
,
2862 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2864 int transfer_buffer_length
;
2865 void *transfer_buffer
;
2869 /* If not bulk pipe just enqueue the URB */
2870 if (!usb_pipebulk(urb
->pipe
))
2871 return __oxu_urb_enqueue(hcd
, urb
, mem_flags
);
2873 /* Otherwise we should verify the USB transfer buffer size! */
2874 transfer_buffer
= urb
->transfer_buffer
;
2875 transfer_buffer_length
= urb
->transfer_buffer_length
;
2877 num
= urb
->transfer_buffer_length
/ 4096;
2878 rem
= urb
->transfer_buffer_length
% 4096;
2882 /* If URB is smaller than 4096 bytes just enqueue it! */
2884 return __oxu_urb_enqueue(hcd
, urb
, mem_flags
);
2886 /* Ok, we have more job to do! :) */
2888 for (i
= 0; i
< num
- 1; i
++) {
2889 /* Get free micro URB poll till a free urb is received */
2892 murb
= (struct urb
*) oxu_murb_alloc(oxu
);
2897 /* Coping the urb */
2898 memcpy(murb
, urb
, sizeof(struct urb
));
2900 murb
->transfer_buffer_length
= 4096;
2901 murb
->transfer_buffer
= transfer_buffer
+ i
* 4096;
2903 /* Null pointer for the encodes that this is a micro urb */
2904 murb
->complete
= NULL
;
2906 ((struct oxu_murb
*) murb
)->main
= urb
;
2907 ((struct oxu_murb
*) murb
)->last
= 0;
2909 /* This loop is to guarantee urb to be processed when there's
2910 * not enough resources at a particular time by retrying.
2913 ret
= __oxu_urb_enqueue(hcd
, murb
, mem_flags
);
2919 /* Last urb requires special handling */
2921 /* Get free micro URB poll till a free urb is received */
2923 murb
= (struct urb
*) oxu_murb_alloc(oxu
);
2928 /* Coping the urb */
2929 memcpy(murb
, urb
, sizeof(struct urb
));
2931 murb
->transfer_buffer_length
= rem
> 0 ? rem
: 4096;
2932 murb
->transfer_buffer
= transfer_buffer
+ (num
- 1) * 4096;
2934 /* Null pointer for the encodes that this is a micro urb */
2935 murb
->complete
= NULL
;
2937 ((struct oxu_murb
*) murb
)->main
= urb
;
2938 ((struct oxu_murb
*) murb
)->last
= 1;
2941 ret
= __oxu_urb_enqueue(hcd
, murb
, mem_flags
);
2949 /* Remove from hardware lists.
2950 * Completions normally happen asynchronously
2952 static int oxu_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
2954 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
2956 unsigned long flags
;
2958 spin_lock_irqsave(&oxu
->lock
, flags
);
2959 switch (usb_pipetype(urb
->pipe
)) {
2963 qh
= (struct ehci_qh
*) urb
->hcpriv
;
2966 unlink_async(oxu
, qh
);
2969 case PIPE_INTERRUPT
:
2970 qh
= (struct ehci_qh
*) urb
->hcpriv
;
2973 switch (qh
->qh_state
) {
2974 case QH_STATE_LINKED
:
2975 intr_deschedule(oxu
, qh
);
2978 qh_completions(oxu
, qh
);
2981 oxu_dbg(oxu
, "bogus qh %p state %d\n",
2986 /* reschedule QH iff another request is queued */
2987 if (!list_empty(&qh
->qtd_list
)
2988 && HC_IS_RUNNING(hcd
->state
)) {
2991 status
= qh_schedule(oxu
, qh
);
2992 spin_unlock_irqrestore(&oxu
->lock
, flags
);
2995 /* shouldn't happen often, but ...
2996 * FIXME kill those tds' urbs
2998 dev_err(hcd
->self
.controller
,
2999 "can't reschedule qh %p, err %d\n", qh
,
3007 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3011 /* Bulk qh holds the data toggle */
3012 static void oxu_endpoint_disable(struct usb_hcd
*hcd
,
3013 struct usb_host_endpoint
*ep
)
3015 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3016 unsigned long flags
;
3017 struct ehci_qh
*qh
, *tmp
;
3019 /* ASSERT: any requests/urbs are being unlinked */
3020 /* ASSERT: nobody can be submitting urbs for this any more */
3023 spin_lock_irqsave(&oxu
->lock
, flags
);
3028 /* endpoints can be iso streams. for now, we don't
3029 * accelerate iso completions ... so spin a while.
3031 if (qh
->hw_info1
== 0) {
3032 oxu_vdbg(oxu
, "iso delay\n");
3036 if (!HC_IS_RUNNING(hcd
->state
))
3037 qh
->qh_state
= QH_STATE_IDLE
;
3038 switch (qh
->qh_state
) {
3039 case QH_STATE_LINKED
:
3040 for (tmp
= oxu
->async
->qh_next
.qh
;
3042 tmp
= tmp
->qh_next
.qh
)
3044 /* periodic qh self-unlinks on empty */
3047 unlink_async(oxu
, qh
);
3049 case QH_STATE_UNLINK
: /* wait for hw to finish? */
3051 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3052 schedule_timeout_uninterruptible(1);
3054 case QH_STATE_IDLE
: /* fully unlinked */
3055 if (list_empty(&qh
->qtd_list
)) {
3059 /* else FALL THROUGH */
3062 /* caller was supposed to have unlinked any requests;
3063 * that's not our job. just leak this memory.
3065 oxu_err(oxu
, "qh %p (#%02x) state %d%s\n",
3066 qh
, ep
->desc
.bEndpointAddress
, qh
->qh_state
,
3067 list_empty(&qh
->qtd_list
) ? "" : "(has tds)");
3072 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3075 static int oxu_get_frame(struct usb_hcd
*hcd
)
3077 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3079 return (readl(&oxu
->regs
->frame_index
) >> 3) %
3083 /* Build "status change" packet (one or two bytes) from HC registers */
3084 static int oxu_hub_status_data(struct usb_hcd
*hcd
, char *buf
)
3086 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3087 u32 temp
, mask
, status
= 0;
3088 int ports
, i
, retval
= 1;
3089 unsigned long flags
;
3091 /* if !PM_RUNTIME, root hub timers won't get shut down ... */
3092 if (!HC_IS_RUNNING(hcd
->state
))
3095 /* init status to no-changes */
3097 ports
= HCS_N_PORTS(oxu
->hcs_params
);
3103 /* Some boards (mostly VIA?) report bogus overcurrent indications,
3104 * causing massive log spam unless we completely ignore them. It
3105 * may be relevant that VIA VT8235 controllers, where PORT_POWER is
3106 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3107 * PORT_POWER; that's surprising, but maybe within-spec.
3110 mask
= PORT_CSC
| PORT_PEC
| PORT_OCC
;
3112 mask
= PORT_CSC
| PORT_PEC
;
3114 /* no hub change reports (bit 0) for now (power, ...) */
3116 /* port N changes (bit N)? */
3117 spin_lock_irqsave(&oxu
->lock
, flags
);
3118 for (i
= 0; i
< ports
; i
++) {
3119 temp
= readl(&oxu
->regs
->port_status
[i
]);
3122 * Return status information even for ports with OWNER set.
3123 * Otherwise khubd wouldn't see the disconnect event when a
3124 * high-speed device is switched over to the companion
3125 * controller by the user.
3128 if (!(temp
& PORT_CONNECT
))
3129 oxu
->reset_done
[i
] = 0;
3130 if ((temp
& mask
) != 0 || ((temp
& PORT_RESUME
) != 0 &&
3131 time_after_eq(jiffies
, oxu
->reset_done
[i
]))) {
3133 buf
[0] |= 1 << (i
+ 1);
3135 buf
[1] |= 1 << (i
- 7);
3139 /* FIXME autosuspend idle root hubs */
3140 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3141 return status
? retval
: 0;
3144 /* Returns the speed of a device attached to a port on the root hub. */
3145 static inline unsigned int oxu_port_speed(struct oxu_hcd
*oxu
,
3146 unsigned int portsc
)
3148 switch ((portsc
>> 26) & 3) {
3152 return USB_PORT_STAT_LOW_SPEED
;
3155 return USB_PORT_STAT_HIGH_SPEED
;
3159 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3160 static int oxu_hub_control(struct usb_hcd
*hcd
, u16 typeReq
,
3161 u16 wValue
, u16 wIndex
, char *buf
, u16 wLength
)
3163 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3164 int ports
= HCS_N_PORTS(oxu
->hcs_params
);
3165 u32 __iomem
*status_reg
= &oxu
->regs
->port_status
[wIndex
- 1];
3167 unsigned long flags
;
3172 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3173 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3174 * (track current state ourselves) ... blink for diagnostics,
3175 * power, "this is the one", etc. EHCI spec supports this.
3178 spin_lock_irqsave(&oxu
->lock
, flags
);
3180 case ClearHubFeature
:
3182 case C_HUB_LOCAL_POWER
:
3183 case C_HUB_OVER_CURRENT
:
3184 /* no hub-wide feature/status flags */
3190 case ClearPortFeature
:
3191 if (!wIndex
|| wIndex
> ports
)
3194 temp
= readl(status_reg
);
3197 * Even if OWNER is set, so the port is owned by the
3198 * companion controller, khubd needs to be able to clear
3199 * the port-change status bits (especially
3200 * USB_PORT_STAT_C_CONNECTION).
3204 case USB_PORT_FEAT_ENABLE
:
3205 writel(temp
& ~PORT_PE
, status_reg
);
3207 case USB_PORT_FEAT_C_ENABLE
:
3208 writel((temp
& ~PORT_RWC_BITS
) | PORT_PEC
, status_reg
);
3210 case USB_PORT_FEAT_SUSPEND
:
3211 if (temp
& PORT_RESET
)
3213 if (temp
& PORT_SUSPEND
) {
3214 if ((temp
& PORT_PE
) == 0)
3216 /* resume signaling for 20 msec */
3217 temp
&= ~(PORT_RWC_BITS
| PORT_WAKE_BITS
);
3218 writel(temp
| PORT_RESUME
, status_reg
);
3219 oxu
->reset_done
[wIndex
] = jiffies
3220 + msecs_to_jiffies(20);
3223 case USB_PORT_FEAT_C_SUSPEND
:
3224 /* we auto-clear this feature */
3226 case USB_PORT_FEAT_POWER
:
3227 if (HCS_PPC(oxu
->hcs_params
))
3228 writel(temp
& ~(PORT_RWC_BITS
| PORT_POWER
),
3231 case USB_PORT_FEAT_C_CONNECTION
:
3232 writel((temp
& ~PORT_RWC_BITS
) | PORT_CSC
, status_reg
);
3234 case USB_PORT_FEAT_C_OVER_CURRENT
:
3235 writel((temp
& ~PORT_RWC_BITS
) | PORT_OCC
, status_reg
);
3237 case USB_PORT_FEAT_C_RESET
:
3238 /* GetPortStatus clears reset */
3243 readl(&oxu
->regs
->command
); /* unblock posted write */
3245 case GetHubDescriptor
:
3246 ehci_hub_descriptor(oxu
, (struct usb_hub_descriptor
*)
3250 /* no hub-wide feature/status flags */
3254 if (!wIndex
|| wIndex
> ports
)
3258 temp
= readl(status_reg
);
3260 /* wPortChange bits */
3261 if (temp
& PORT_CSC
)
3262 status
|= USB_PORT_STAT_C_CONNECTION
<< 16;
3263 if (temp
& PORT_PEC
)
3264 status
|= USB_PORT_STAT_C_ENABLE
<< 16;
3265 if ((temp
& PORT_OCC
) && !ignore_oc
)
3266 status
|= USB_PORT_STAT_C_OVERCURRENT
<< 16;
3268 /* whoever resumes must GetPortStatus to complete it!! */
3269 if (temp
& PORT_RESUME
) {
3271 /* Remote Wakeup received? */
3272 if (!oxu
->reset_done
[wIndex
]) {
3273 /* resume signaling for 20 msec */
3274 oxu
->reset_done
[wIndex
] = jiffies
3275 + msecs_to_jiffies(20);
3276 /* check the port again */
3277 mod_timer(&oxu_to_hcd(oxu
)->rh_timer
,
3278 oxu
->reset_done
[wIndex
]);
3281 /* resume completed? */
3282 else if (time_after_eq(jiffies
,
3283 oxu
->reset_done
[wIndex
])) {
3284 status
|= USB_PORT_STAT_C_SUSPEND
<< 16;
3285 oxu
->reset_done
[wIndex
] = 0;
3287 /* stop resume signaling */
3288 temp
= readl(status_reg
);
3289 writel(temp
& ~(PORT_RWC_BITS
| PORT_RESUME
),
3291 retval
= handshake(oxu
, status_reg
,
3292 PORT_RESUME
, 0, 2000 /* 2msec */);
3295 "port %d resume error %d\n",
3296 wIndex
+ 1, retval
);
3299 temp
&= ~(PORT_SUSPEND
|PORT_RESUME
|(3<<10));
3303 /* whoever resets must GetPortStatus to complete it!! */
3304 if ((temp
& PORT_RESET
)
3305 && time_after_eq(jiffies
,
3306 oxu
->reset_done
[wIndex
])) {
3307 status
|= USB_PORT_STAT_C_RESET
<< 16;
3308 oxu
->reset_done
[wIndex
] = 0;
3310 /* force reset to complete */
3311 writel(temp
& ~(PORT_RWC_BITS
| PORT_RESET
),
3313 /* REVISIT: some hardware needs 550+ usec to clear
3314 * this bit; seems too long to spin routinely...
3316 retval
= handshake(oxu
, status_reg
,
3317 PORT_RESET
, 0, 750);
3319 oxu_err(oxu
, "port %d reset error %d\n",
3320 wIndex
+ 1, retval
);
3324 /* see what we found out */
3325 temp
= check_reset_complete(oxu
, wIndex
, status_reg
,
3329 /* transfer dedicated ports to the companion hc */
3330 if ((temp
& PORT_CONNECT
) &&
3331 test_bit(wIndex
, &oxu
->companion_ports
)) {
3332 temp
&= ~PORT_RWC_BITS
;
3334 writel(temp
, status_reg
);
3335 oxu_dbg(oxu
, "port %d --> companion\n", wIndex
+ 1);
3336 temp
= readl(status_reg
);
3340 * Even if OWNER is set, there's no harm letting khubd
3341 * see the wPortStatus values (they should all be 0 except
3342 * for PORT_POWER anyway).
3345 if (temp
& PORT_CONNECT
) {
3346 status
|= USB_PORT_STAT_CONNECTION
;
3347 /* status may be from integrated TT */
3348 status
|= oxu_port_speed(oxu
, temp
);
3351 status
|= USB_PORT_STAT_ENABLE
;
3352 if (temp
& (PORT_SUSPEND
|PORT_RESUME
))
3353 status
|= USB_PORT_STAT_SUSPEND
;
3355 status
|= USB_PORT_STAT_OVERCURRENT
;
3356 if (temp
& PORT_RESET
)
3357 status
|= USB_PORT_STAT_RESET
;
3358 if (temp
& PORT_POWER
)
3359 status
|= USB_PORT_STAT_POWER
;
3361 #ifndef OXU_VERBOSE_DEBUG
3362 if (status
& ~0xffff) /* only if wPortChange is interesting */
3364 dbg_port(oxu
, "GetStatus", wIndex
+ 1, temp
);
3365 put_unaligned(cpu_to_le32(status
), (__le32
*) buf
);
3369 case C_HUB_LOCAL_POWER
:
3370 case C_HUB_OVER_CURRENT
:
3371 /* no hub-wide feature/status flags */
3377 case SetPortFeature
:
3378 selector
= wIndex
>> 8;
3380 if (!wIndex
|| wIndex
> ports
)
3383 temp
= readl(status_reg
);
3384 if (temp
& PORT_OWNER
)
3387 temp
&= ~PORT_RWC_BITS
;
3389 case USB_PORT_FEAT_SUSPEND
:
3390 if ((temp
& PORT_PE
) == 0
3391 || (temp
& PORT_RESET
) != 0)
3393 if (device_may_wakeup(&hcd
->self
.root_hub
->dev
))
3394 temp
|= PORT_WAKE_BITS
;
3395 writel(temp
| PORT_SUSPEND
, status_reg
);
3397 case USB_PORT_FEAT_POWER
:
3398 if (HCS_PPC(oxu
->hcs_params
))
3399 writel(temp
| PORT_POWER
, status_reg
);
3401 case USB_PORT_FEAT_RESET
:
3402 if (temp
& PORT_RESUME
)
3404 /* line status bits may report this as low speed,
3405 * which can be fine if this root hub has a
3406 * transaction translator built in.
3408 oxu_vdbg(oxu
, "port %d reset\n", wIndex
+ 1);
3413 * caller must wait, then call GetPortStatus
3414 * usb 2.0 spec says 50 ms resets on root
3416 oxu
->reset_done
[wIndex
] = jiffies
3417 + msecs_to_jiffies(50);
3418 writel(temp
, status_reg
);
3421 /* For downstream facing ports (these): one hub port is put
3422 * into test mode according to USB2 11.24.2.13, then the hub
3423 * must be reset (which for root hub now means rmmod+modprobe,
3424 * or else system reboot). See EHCI 2.3.9 and 4.14 for info
3425 * about the EHCI-specific stuff.
3427 case USB_PORT_FEAT_TEST
:
3428 if (!selector
|| selector
> 5)
3432 temp
|= selector
<< 16;
3433 writel(temp
, status_reg
);
3439 readl(&oxu
->regs
->command
); /* unblock posted writes */
3444 /* "stall" on error */
3447 spin_unlock_irqrestore(&oxu
->lock
, flags
);
3453 static int oxu_bus_suspend(struct usb_hcd
*hcd
)
3455 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3459 oxu_dbg(oxu
, "suspend root hub\n");
3461 if (time_before(jiffies
, oxu
->next_statechange
))
3464 port
= HCS_N_PORTS(oxu
->hcs_params
);
3465 spin_lock_irq(&oxu
->lock
);
3467 /* stop schedules, clean any completed work */
3468 if (HC_IS_RUNNING(hcd
->state
)) {
3470 hcd
->state
= HC_STATE_QUIESCING
;
3472 oxu
->command
= readl(&oxu
->regs
->command
);
3474 oxu
->reclaim_ready
= 1;
3477 /* Unlike other USB host controller types, EHCI doesn't have
3478 * any notion of "global" or bus-wide suspend. The driver has
3479 * to manually suspend all the active unsuspended ports, and
3480 * then manually resume them in the bus_resume() routine.
3482 oxu
->bus_suspended
= 0;
3484 u32 __iomem
*reg
= &oxu
->regs
->port_status
[port
];
3485 u32 t1
= readl(reg
) & ~PORT_RWC_BITS
;
3488 /* keep track of which ports we suspend */
3489 if ((t1
& PORT_PE
) && !(t1
& PORT_OWNER
) &&
3490 !(t1
& PORT_SUSPEND
)) {
3492 set_bit(port
, &oxu
->bus_suspended
);
3495 /* enable remote wakeup on all ports */
3496 if (device_may_wakeup(&hcd
->self
.root_hub
->dev
))
3497 t2
|= PORT_WKOC_E
|PORT_WKDISC_E
|PORT_WKCONN_E
;
3499 t2
&= ~(PORT_WKOC_E
|PORT_WKDISC_E
|PORT_WKCONN_E
);
3502 oxu_vdbg(oxu
, "port %d, %08x -> %08x\n",
3508 /* turn off now-idle HC */
3509 del_timer_sync(&oxu
->watchdog
);
3511 hcd
->state
= HC_STATE_SUSPENDED
;
3513 /* allow remote wakeup */
3515 if (!device_may_wakeup(&hcd
->self
.root_hub
->dev
))
3517 writel(mask
, &oxu
->regs
->intr_enable
);
3518 readl(&oxu
->regs
->intr_enable
);
3520 oxu
->next_statechange
= jiffies
+ msecs_to_jiffies(10);
3521 spin_unlock_irq(&oxu
->lock
);
3525 /* Caller has locked the root hub, and should reset/reinit on error */
3526 static int oxu_bus_resume(struct usb_hcd
*hcd
)
3528 struct oxu_hcd
*oxu
= hcd_to_oxu(hcd
);
3532 if (time_before(jiffies
, oxu
->next_statechange
))
3534 spin_lock_irq(&oxu
->lock
);
3536 /* Ideally and we've got a real resume here, and no port's power
3537 * was lost. (For PCI, that means Vaux was maintained.) But we
3538 * could instead be restoring a swsusp snapshot -- so that BIOS was
3539 * the last user of the controller, not reset/pm hardware keeping
3540 * state we gave to it.
3542 temp
= readl(&oxu
->regs
->intr_enable
);
3543 oxu_dbg(oxu
, "resume root hub%s\n", temp
? "" : " after power loss");
3545 /* at least some APM implementations will try to deliver
3546 * IRQs right away, so delay them until we're ready.
3548 writel(0, &oxu
->regs
->intr_enable
);
3550 /* re-init operational registers */
3551 writel(0, &oxu
->regs
->segment
);
3552 writel(oxu
->periodic_dma
, &oxu
->regs
->frame_list
);
3553 writel((u32
) oxu
->async
->qh_dma
, &oxu
->regs
->async_next
);
3555 /* restore CMD_RUN, framelist size, and irq threshold */
3556 writel(oxu
->command
, &oxu
->regs
->command
);
3558 /* Some controller/firmware combinations need a delay during which
3559 * they set up the port statuses. See Bugzilla #8190. */
3562 /* manually resume the ports we suspended during bus_suspend() */
3563 i
= HCS_N_PORTS(oxu
->hcs_params
);
3565 temp
= readl(&oxu
->regs
->port_status
[i
]);
3566 temp
&= ~(PORT_RWC_BITS
3567 | PORT_WKOC_E
| PORT_WKDISC_E
| PORT_WKCONN_E
);
3568 if (test_bit(i
, &oxu
->bus_suspended
) && (temp
& PORT_SUSPEND
)) {
3569 oxu
->reset_done
[i
] = jiffies
+ msecs_to_jiffies(20);
3570 temp
|= PORT_RESUME
;
3572 writel(temp
, &oxu
->regs
->port_status
[i
]);
3574 i
= HCS_N_PORTS(oxu
->hcs_params
);
3577 temp
= readl(&oxu
->regs
->port_status
[i
]);
3578 if (test_bit(i
, &oxu
->bus_suspended
) && (temp
& PORT_SUSPEND
)) {
3579 temp
&= ~(PORT_RWC_BITS
| PORT_RESUME
);
3580 writel(temp
, &oxu
->regs
->port_status
[i
]);
3581 oxu_vdbg(oxu
, "resumed port %d\n", i
+ 1);
3584 (void) readl(&oxu
->regs
->command
);
3586 /* maybe re-activate the schedule(s) */
3588 if (oxu
->async
->qh_next
.qh
)
3590 if (oxu
->periodic_sched
)
3593 oxu
->command
|= temp
;
3594 writel(oxu
->command
, &oxu
->regs
->command
);
3597 oxu
->next_statechange
= jiffies
+ msecs_to_jiffies(5);
3598 hcd
->state
= HC_STATE_RUNNING
;
3600 /* Now we can safely re-enable irqs */
3601 writel(INTR_MASK
, &oxu
->regs
->intr_enable
);
3603 spin_unlock_irq(&oxu
->lock
);
3609 static int oxu_bus_suspend(struct usb_hcd
*hcd
)
3614 static int oxu_bus_resume(struct usb_hcd
*hcd
)
3619 #endif /* CONFIG_PM */
3621 static const struct hc_driver oxu_hc_driver
= {
3622 .description
= "oxu210hp_hcd",
3623 .product_desc
= "oxu210hp HCD",
3624 .hcd_priv_size
= sizeof(struct oxu_hcd
),
3627 * Generic hardware linkage
3630 .flags
= HCD_MEMORY
| HCD_USB2
,
3633 * Basic lifecycle operations
3638 .shutdown
= oxu_shutdown
,
3641 * Managing i/o requests and associated device resources
3643 .urb_enqueue
= oxu_urb_enqueue
,
3644 .urb_dequeue
= oxu_urb_dequeue
,
3645 .endpoint_disable
= oxu_endpoint_disable
,
3648 * Scheduling support
3650 .get_frame_number
= oxu_get_frame
,
3655 .hub_status_data
= oxu_hub_status_data
,
3656 .hub_control
= oxu_hub_control
,
3657 .bus_suspend
= oxu_bus_suspend
,
3658 .bus_resume
= oxu_bus_resume
,
3665 static void oxu_configuration(struct platform_device
*pdev
, void *base
)
3669 /* Initialize top level registers.
3672 oxu_writel(base
, OXU_HOSTIFCONFIG
, 0x0000037D);
3673 oxu_writel(base
, OXU_SOFTRESET
, OXU_SRESET
);
3674 oxu_writel(base
, OXU_HOSTIFCONFIG
, 0x0000037D);
3676 tmp
= oxu_readl(base
, OXU_PIOBURSTREADCTRL
);
3677 oxu_writel(base
, OXU_PIOBURSTREADCTRL
, tmp
| 0x0040);
3679 oxu_writel(base
, OXU_ASO
, OXU_SPHPOEN
| OXU_OVRCCURPUPDEN
|
3680 OXU_COMPARATOR
| OXU_ASO_OP
);
3682 tmp
= oxu_readl(base
, OXU_CLKCTRL_SET
);
3683 oxu_writel(base
, OXU_CLKCTRL_SET
, tmp
| OXU_SYSCLKEN
| OXU_USBOTGCLKEN
);
3685 /* Clear all top interrupt enable */
3686 oxu_writel(base
, OXU_CHIPIRQEN_CLR
, 0xff);
3688 /* Clear all top interrupt status */
3689 oxu_writel(base
, OXU_CHIPIRQSTATUS
, 0xff);
3691 /* Enable all needed top interrupt except OTG SPH core */
3692 oxu_writel(base
, OXU_CHIPIRQEN_SET
, OXU_USBSPHLPWUI
| OXU_USBOTGLPWUI
);
3695 static int oxu_verify_id(struct platform_device
*pdev
, void *base
)
3698 static const char * const bo
[] = {
3705 /* Read controller signature register to find a match */
3706 id
= oxu_readl(base
, OXU_DEVICEID
);
3707 dev_info(&pdev
->dev
, "device ID %x\n", id
);
3708 if ((id
& OXU_REV_MASK
) != (OXU_REV_2100
<< OXU_REV_SHIFT
))
3711 dev_info(&pdev
->dev
, "found device %x %s (%04x:%04x)\n",
3712 id
>> OXU_REV_SHIFT
,
3713 bo
[(id
& OXU_BO_MASK
) >> OXU_BO_SHIFT
],
3714 (id
& OXU_MAJ_REV_MASK
) >> OXU_MAJ_REV_SHIFT
,
3715 (id
& OXU_MIN_REV_MASK
) >> OXU_MIN_REV_SHIFT
);
3720 static const struct hc_driver oxu_hc_driver
;
3721 static struct usb_hcd
*oxu_create(struct platform_device
*pdev
,
3722 unsigned long memstart
, unsigned long memlen
,
3723 void *base
, int irq
, int otg
)
3725 struct device
*dev
= &pdev
->dev
;
3727 struct usb_hcd
*hcd
;
3728 struct oxu_hcd
*oxu
;
3731 /* Set endian mode and host mode */
3732 oxu_writel(base
+ (otg
? OXU_OTG_CORE_OFFSET
: OXU_SPH_CORE_OFFSET
),
3734 OXU_CM_HOST_ONLY
| OXU_ES_LITTLE
| OXU_VBPS
);
3736 hcd
= usb_create_hcd(&oxu_hc_driver
, dev
,
3737 otg
? "oxu210hp_otg" : "oxu210hp_sph");
3739 return ERR_PTR(-ENOMEM
);
3741 hcd
->rsrc_start
= memstart
;
3742 hcd
->rsrc_len
= memlen
;
3745 hcd
->state
= HC_STATE_HALT
;
3747 oxu
= hcd_to_oxu(hcd
);
3750 ret
= usb_add_hcd(hcd
, irq
, IRQF_SHARED
);
3752 return ERR_PTR(ret
);
3754 device_wakeup_enable(hcd
->self
.controller
);
3758 static int oxu_init(struct platform_device
*pdev
,
3759 unsigned long memstart
, unsigned long memlen
,
3760 void *base
, int irq
)
3762 struct oxu_info
*info
= platform_get_drvdata(pdev
);
3763 struct usb_hcd
*hcd
;
3766 /* First time configuration at start up */
3767 oxu_configuration(pdev
, base
);
3769 ret
= oxu_verify_id(pdev
, base
);
3771 dev_err(&pdev
->dev
, "no devices found!\n");
3775 /* Create the OTG controller */
3776 hcd
= oxu_create(pdev
, memstart
, memlen
, base
, irq
, 1);
3778 dev_err(&pdev
->dev
, "cannot create OTG controller!\n");
3780 goto error_create_otg
;
3784 /* Create the SPH host controller */
3785 hcd
= oxu_create(pdev
, memstart
, memlen
, base
, irq
, 0);
3787 dev_err(&pdev
->dev
, "cannot create SPH controller!\n");
3789 goto error_create_sph
;
3793 oxu_writel(base
, OXU_CHIPIRQEN_SET
,
3794 oxu_readl(base
, OXU_CHIPIRQEN_SET
) | 3);
3799 usb_remove_hcd(info
->hcd
[0]);
3800 usb_put_hcd(info
->hcd
[0]);
3806 static int oxu_drv_probe(struct platform_device
*pdev
)
3808 struct resource
*res
;
3810 unsigned long memstart
, memlen
;
3812 struct oxu_info
*info
;
3818 * Get the platform resources
3820 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
3823 "no IRQ! Check %s setup!\n", dev_name(&pdev
->dev
));
3827 dev_dbg(&pdev
->dev
, "IRQ resource %d\n", irq
);
3829 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
3831 dev_err(&pdev
->dev
, "no registers address! Check %s setup!\n",
3832 dev_name(&pdev
->dev
));
3835 memstart
= res
->start
;
3836 memlen
= resource_size(res
);
3837 dev_dbg(&pdev
->dev
, "MEM resource %lx-%lx\n", memstart
, memlen
);
3838 if (!request_mem_region(memstart
, memlen
,
3839 oxu_hc_driver
.description
)) {
3840 dev_dbg(&pdev
->dev
, "memory area already in use\n");
3844 ret
= irq_set_irq_type(irq
, IRQF_TRIGGER_FALLING
);
3846 dev_err(&pdev
->dev
, "error setting irq type\n");
3848 goto error_set_irq_type
;
3851 base
= ioremap(memstart
, memlen
);
3853 dev_dbg(&pdev
->dev
, "error mapping memory\n");
3858 /* Allocate a driver data struct to hold useful info for both
3861 info
= kzalloc(sizeof(struct oxu_info
), GFP_KERNEL
);
3863 dev_dbg(&pdev
->dev
, "error allocating memory\n");
3867 platform_set_drvdata(pdev
, info
);
3869 ret
= oxu_init(pdev
, memstart
, memlen
, base
, irq
);
3871 dev_dbg(&pdev
->dev
, "cannot init USB devices\n");
3875 dev_info(&pdev
->dev
, "devices enabled and running\n");
3876 platform_set_drvdata(pdev
, info
);
3888 release_mem_region(memstart
, memlen
);
3890 dev_err(&pdev
->dev
, "init %s fail, %d\n", dev_name(&pdev
->dev
), ret
);
3894 static void oxu_remove(struct platform_device
*pdev
, struct usb_hcd
*hcd
)
3896 usb_remove_hcd(hcd
);
3900 static int oxu_drv_remove(struct platform_device
*pdev
)
3902 struct oxu_info
*info
= platform_get_drvdata(pdev
);
3903 unsigned long memstart
= info
->hcd
[0]->rsrc_start
,
3904 memlen
= info
->hcd
[0]->rsrc_len
;
3905 void *base
= info
->hcd
[0]->regs
;
3907 oxu_remove(pdev
, info
->hcd
[0]);
3908 oxu_remove(pdev
, info
->hcd
[1]);
3911 release_mem_region(memstart
, memlen
);
3918 static void oxu_drv_shutdown(struct platform_device
*pdev
)
3920 oxu_drv_remove(pdev
);
3925 static int oxu_drv_suspend(struct device
*dev
)
3927 struct platform_device
*pdev
= to_platform_device(dev
);
3928 struct usb_hcd
*hcd
= dev_get_drvdata(dev
);
3933 static int oxu_drv_resume(struct device
*dev
)
3935 struct platform_device
*pdev
= to_platform_device(dev
);
3936 struct usb_hcd
*hcd
= dev_get_drvdata(dev
);
3941 #define oxu_drv_suspend NULL
3942 #define oxu_drv_resume NULL
3945 static struct platform_driver oxu_driver
= {
3946 .probe
= oxu_drv_probe
,
3947 .remove
= oxu_drv_remove
,
3948 .shutdown
= oxu_drv_shutdown
,
3949 .suspend
= oxu_drv_suspend
,
3950 .resume
= oxu_drv_resume
,
3952 .name
= "oxu210hp-hcd",
3953 .bus
= &platform_bus_type
3957 module_platform_driver(oxu_driver
);
3959 MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION
);
3960 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3961 MODULE_LICENSE("GPL");