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usb: dwc3: keystone: drop dma_mask configuration
[linux/fpc-iii.git] / drivers / usb / renesas_usbhs / fifo.c
blob50763ebff015947bedf73f677f26848105de3616
1 /*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17 #include <linux/delay.h>
18 #include <linux/io.h>
19 #include <linux/scatterlist.h>
20 #include "common.h"
21 #include "pipe.h"
22
23 #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
24 #define usbhsf_get_d0fifo(p) (&((p)->fifo_info.d0fifo))
25 #define usbhsf_get_d1fifo(p) (&((p)->fifo_info.d1fifo))
26 #define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f)
27
28 #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
29
30 /*
31 * packet initialize
32 */
33 void usbhs_pkt_init(struct usbhs_pkt *pkt)
34 {
35 INIT_LIST_HEAD(&pkt->node);
36 }
37
38 /*
39 * packet control function
40 */
41 static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
42 {
43 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
44 struct device *dev = usbhs_priv_to_dev(priv);
45
46 dev_err(dev, "null handler\n");
47
48 return -EINVAL;
49 }
50
51 static struct usbhs_pkt_handle usbhsf_null_handler = {
52 .prepare = usbhsf_null_handle,
53 .try_run = usbhsf_null_handle,
54 };
55
56 void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
57 void (*done)(struct usbhs_priv *priv,
58 struct usbhs_pkt *pkt),
59 void *buf, int len, int zero, int sequence)
60 {
61 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
62 struct device *dev = usbhs_priv_to_dev(priv);
63 unsigned long flags;
64
65 if (!done) {
66 dev_err(dev, "no done function\n");
67 return;
68 }
69
70 /******************** spin lock ********************/
71 usbhs_lock(priv, flags);
72
73 if (!pipe->handler) {
74 dev_err(dev, "no handler function\n");
75 pipe->handler = &usbhsf_null_handler;
76 }
77
78 list_move_tail(&pkt->node, &pipe->list);
79
80 /*
81 * each pkt must hold own handler.
82 * because handler might be changed by its situation.
83 * dma handler -> pio handler.
84 */
85 pkt->pipe = pipe;
86 pkt->buf = buf;
87 pkt->handler = pipe->handler;
88 pkt->length = len;
89 pkt->zero = zero;
90 pkt->actual = 0;
91 pkt->done = done;
92 pkt->sequence = sequence;
93
94 usbhs_unlock(priv, flags);
95 /******************** spin unlock ******************/
96 }
97
98 static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
99 {
100 list_del_init(&pkt->node);
101 }
102
103 static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
104 {
105 if (list_empty(&pipe->list))
106 return NULL;
107
108 return list_first_entry(&pipe->list, struct usbhs_pkt, node);
109 }
110
111 struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
112 {
113 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
114 unsigned long flags;
115
116 /******************** spin lock ********************/
117 usbhs_lock(priv, flags);
118
119 if (!pkt)
120 pkt = __usbhsf_pkt_get(pipe);
121
122 if (pkt)
123 __usbhsf_pkt_del(pkt);
124
125 usbhs_unlock(priv, flags);
126 /******************** spin unlock ******************/
127
128 return pkt;
129 }
130
131 enum {
132 USBHSF_PKT_PREPARE,
133 USBHSF_PKT_TRY_RUN,
134 USBHSF_PKT_DMA_DONE,
135 };
136
137 static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
138 {
139 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
140 struct usbhs_pkt *pkt;
141 struct device *dev = usbhs_priv_to_dev(priv);
142 int (*func)(struct usbhs_pkt *pkt, int *is_done);
143 unsigned long flags;
144 int ret = 0;
145 int is_done = 0;
146
147 /******************** spin lock ********************/
148 usbhs_lock(priv, flags);
149
150 pkt = __usbhsf_pkt_get(pipe);
151 if (!pkt)
152 goto __usbhs_pkt_handler_end;
153
154 switch (type) {
155 case USBHSF_PKT_PREPARE:
156 func = pkt->handler->prepare;
157 break;
158 case USBHSF_PKT_TRY_RUN:
159 func = pkt->handler->try_run;
160 break;
161 case USBHSF_PKT_DMA_DONE:
162 func = pkt->handler->dma_done;
163 break;
164 default:
165 dev_err(dev, "unknown pkt handler\n");
166 goto __usbhs_pkt_handler_end;
167 }
168
169 if (likely(func))
170 ret = func(pkt, &is_done);
171
172 if (is_done)
173 __usbhsf_pkt_del(pkt);
174
175 __usbhs_pkt_handler_end:
176 usbhs_unlock(priv, flags);
177 /******************** spin unlock ******************/
178
179 if (is_done) {
180 pkt->done(priv, pkt);
181 usbhs_pkt_start(pipe);
182 }
183
184 return ret;
185 }
186
187 void usbhs_pkt_start(struct usbhs_pipe *pipe)
188 {
189 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
190 }
191
192 /*
193 * irq enable/disable function
194 */
195 #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
196 #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
197 #define usbhsf_irq_callback_ctrl(pipe, status, enable) \
198 ({ \
199 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
200 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
201 u16 status = (1 << usbhs_pipe_number(pipe)); \
202 if (!mod) \
203 return; \
204 if (enable) \
205 mod->status |= status; \
206 else \
207 mod->status &= ~status; \
208 usbhs_irq_callback_update(priv, mod); \
209 })
210
211 static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
212 {
213 /*
214 * And DCP pipe can NOT use "ready interrupt" for "send"
215 * it should use "empty" interrupt.
216 * see
217 * "Operation" - "Interrupt Function" - "BRDY Interrupt"
218 *
219 * on the other hand, normal pipe can use "ready interrupt" for "send"
220 * even though it is single/double buffer
221 */
222 if (usbhs_pipe_is_dcp(pipe))
223 usbhsf_irq_empty_ctrl(pipe, enable);
224 else
225 usbhsf_irq_ready_ctrl(pipe, enable);
226 }
227
228 static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
229 {
230 usbhsf_irq_ready_ctrl(pipe, enable);
231 }
232
233 /*
234 * FIFO ctrl
235 */
236 static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
237 struct usbhs_fifo *fifo)
238 {
239 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
240
241 usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
242 }
243
244 static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
245 struct usbhs_fifo *fifo)
246 {
247 int timeout = 1024;
248
249 do {
250 /* The FIFO port is accessible */
251 if (usbhs_read(priv, fifo->ctr) & FRDY)
252 return 0;
253
254 udelay(10);
255 } while (timeout--);
256
257 return -EBUSY;
258 }
259
260 static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
261 struct usbhs_fifo *fifo)
262 {
263 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
264
265 if (!usbhs_pipe_is_dcp(pipe))
266 usbhsf_fifo_barrier(priv, fifo);
267
268 usbhs_write(priv, fifo->ctr, BCLR);
269 }
270
271 static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
272 struct usbhs_fifo *fifo)
273 {
274 return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
275 }
276
277 static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
278 struct usbhs_fifo *fifo)
279 {
280 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
281
282 usbhs_pipe_select_fifo(pipe, NULL);
283 usbhs_write(priv, fifo->sel, 0);
284 }
285
286 static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
287 struct usbhs_fifo *fifo,
288 int write)
289 {
290 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
291 struct device *dev = usbhs_priv_to_dev(priv);
292 int timeout = 1024;
293 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
294 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
295
296 if (usbhs_pipe_is_busy(pipe) ||
297 usbhsf_fifo_is_busy(fifo))
298 return -EBUSY;
299
300 if (usbhs_pipe_is_dcp(pipe)) {
301 base |= (1 == write) << 5; /* ISEL */
302
303 if (usbhs_mod_is_host(priv))
304 usbhs_dcp_dir_for_host(pipe, write);
305 }
306
307 /* "base" will be used below */
308 if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo))
309 usbhs_write(priv, fifo->sel, base);
310 else
311 usbhs_write(priv, fifo->sel, base | MBW_32);
312
313 /* check ISEL and CURPIPE value */
314 while (timeout--) {
315 if (base == (mask & usbhs_read(priv, fifo->sel))) {
316 usbhs_pipe_select_fifo(pipe, fifo);
317 return 0;
318 }
319 udelay(10);
320 }
321
322 dev_err(dev, "fifo select error\n");
323
324 return -EIO;
325 }
326
327 /*
328 * DCP status stage
329 */
330 static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
331 {
332 struct usbhs_pipe *pipe = pkt->pipe;
333 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
334 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
335 struct device *dev = usbhs_priv_to_dev(priv);
336 int ret;
337
338 usbhs_pipe_disable(pipe);
339
340 ret = usbhsf_fifo_select(pipe, fifo, 1);
341 if (ret < 0) {
342 dev_err(dev, "%s() faile\n", __func__);
343 return ret;
344 }
345
346 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
347
348 usbhsf_fifo_clear(pipe, fifo);
349 usbhsf_send_terminator(pipe, fifo);
350
351 usbhsf_fifo_unselect(pipe, fifo);
352
353 usbhsf_tx_irq_ctrl(pipe, 1);
354 usbhs_pipe_enable(pipe);
355
356 return ret;
357 }
358
359 static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
360 {
361 struct usbhs_pipe *pipe = pkt->pipe;
362 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
363 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
364 struct device *dev = usbhs_priv_to_dev(priv);
365 int ret;
366
367 usbhs_pipe_disable(pipe);
368
369 ret = usbhsf_fifo_select(pipe, fifo, 0);
370 if (ret < 0) {
371 dev_err(dev, "%s() fail\n", __func__);
372 return ret;
373 }
374
375 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
376 usbhsf_fifo_clear(pipe, fifo);
377
378 usbhsf_fifo_unselect(pipe, fifo);
379
380 usbhsf_rx_irq_ctrl(pipe, 1);
381 usbhs_pipe_enable(pipe);
382
383 return ret;
384
385 }
386
387 static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
388 {
389 struct usbhs_pipe *pipe = pkt->pipe;
390
391 if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
392 usbhsf_tx_irq_ctrl(pipe, 0);
393 else
394 usbhsf_rx_irq_ctrl(pipe, 0);
395
396 pkt->actual = pkt->length;
397 *is_done = 1;
398
399 return 0;
400 }
401
402 struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
403 .prepare = usbhs_dcp_dir_switch_to_write,
404 .try_run = usbhs_dcp_dir_switch_done,
405 };
406
407 struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
408 .prepare = usbhs_dcp_dir_switch_to_read,
409 .try_run = usbhs_dcp_dir_switch_done,
410 };
411
412 /*
413 * DCP data stage (push)
414 */
415 static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
416 {
417 struct usbhs_pipe *pipe = pkt->pipe;
418
419 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
420
421 /*
422 * change handler to PIO push
423 */
424 pkt->handler = &usbhs_fifo_pio_push_handler;
425
426 return pkt->handler->prepare(pkt, is_done);
427 }
428
429 struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
430 .prepare = usbhsf_dcp_data_stage_try_push,
431 };
432
433 /*
434 * DCP data stage (pop)
435 */
436 static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
437 int *is_done)
438 {
439 struct usbhs_pipe *pipe = pkt->pipe;
440 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
441 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
442
443 if (usbhs_pipe_is_busy(pipe))
444 return 0;
445
446 /*
447 * prepare pop for DCP should
448 * - change DCP direction,
449 * - clear fifo
450 * - DATA1
451 */
452 usbhs_pipe_disable(pipe);
453
454 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
455
456 usbhsf_fifo_select(pipe, fifo, 0);
457 usbhsf_fifo_clear(pipe, fifo);
458 usbhsf_fifo_unselect(pipe, fifo);
459
460 /*
461 * change handler to PIO pop
462 */
463 pkt->handler = &usbhs_fifo_pio_pop_handler;
464
465 return pkt->handler->prepare(pkt, is_done);
466 }
467
468 struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
469 .prepare = usbhsf_dcp_data_stage_prepare_pop,
470 };
471
472 /*
473 * PIO push handler
474 */
475 static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
476 {
477 struct usbhs_pipe *pipe = pkt->pipe;
478 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
479 struct device *dev = usbhs_priv_to_dev(priv);
480 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
481 void __iomem *addr = priv->base + fifo->port;
482 u8 *buf;
483 int maxp = usbhs_pipe_get_maxpacket(pipe);
484 int total_len;
485 int i, ret, len;
486 int is_short;
487
488 usbhs_pipe_data_sequence(pipe, pkt->sequence);
489 pkt->sequence = -1; /* -1 sequence will be ignored */
490
491 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
492
493 ret = usbhsf_fifo_select(pipe, fifo, 1);
494 if (ret < 0)
495 return 0;
496
497 ret = usbhs_pipe_is_accessible(pipe);
498 if (ret < 0) {
499 /* inaccessible pipe is not an error */
500 ret = 0;
501 goto usbhs_fifo_write_busy;
502 }
503
504 ret = usbhsf_fifo_barrier(priv, fifo);
505 if (ret < 0)
506 goto usbhs_fifo_write_busy;
507
508 buf = pkt->buf + pkt->actual;
509 len = pkt->length - pkt->actual;
510 len = min(len, maxp);
511 total_len = len;
512 is_short = total_len < maxp;
513
514 /*
515 * FIXME
516 *
517 * 32-bit access only
518 */
519 if (len >= 4 && !((unsigned long)buf & 0x03)) {
520 iowrite32_rep(addr, buf, len / 4);
521 len %= 4;
522 buf += total_len - len;
523 }
524
525 /* the rest operation */
526 for (i = 0; i < len; i++)
527 iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
528
529 /*
530 * variable update
531 */
532 pkt->actual += total_len;
533
534 if (pkt->actual < pkt->length)
535 *is_done = 0; /* there are remainder data */
536 else if (is_short)
537 *is_done = 1; /* short packet */
538 else
539 *is_done = !pkt->zero; /* send zero packet ? */
540
541 /*
542 * pipe/irq handling
543 */
544 if (is_short)
545 usbhsf_send_terminator(pipe, fifo);
546
547 usbhsf_tx_irq_ctrl(pipe, !*is_done);
548 usbhs_pipe_enable(pipe);
549
550 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
551 usbhs_pipe_number(pipe),
552 pkt->length, pkt->actual, *is_done, pkt->zero);
553
554 /*
555 * Transmission end
556 */
557 if (*is_done) {
558 if (usbhs_pipe_is_dcp(pipe))
559 usbhs_dcp_control_transfer_done(pipe);
560 }
561
562 usbhsf_fifo_unselect(pipe, fifo);
563
564 return 0;
565
566 usbhs_fifo_write_busy:
567 usbhsf_fifo_unselect(pipe, fifo);
568
569 /*
570 * pipe is busy.
571 * retry in interrupt
572 */
573 usbhsf_tx_irq_ctrl(pipe, 1);
574
575 return ret;
576 }
577
578 struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
579 .prepare = usbhsf_pio_try_push,
580 .try_run = usbhsf_pio_try_push,
581 };
582
583 /*
584 * PIO pop handler
585 */
586 static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
587 {
588 struct usbhs_pipe *pipe = pkt->pipe;
589
590 if (usbhs_pipe_is_busy(pipe))
591 return 0;
592
593 /*
594 * pipe enable to prepare packet receive
595 */
596 usbhs_pipe_data_sequence(pipe, pkt->sequence);
597 pkt->sequence = -1; /* -1 sequence will be ignored */
598
599 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
600 usbhs_pipe_enable(pipe);
601 usbhsf_rx_irq_ctrl(pipe, 1);
602
603 return 0;
604 }
605
606 static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
607 {
608 struct usbhs_pipe *pipe = pkt->pipe;
609 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
610 struct device *dev = usbhs_priv_to_dev(priv);
611 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
612 void __iomem *addr = priv->base + fifo->port;
613 u8 *buf;
614 u32 data = 0;
615 int maxp = usbhs_pipe_get_maxpacket(pipe);
616 int rcv_len, len;
617 int i, ret;
618 int total_len = 0;
619
620 ret = usbhsf_fifo_select(pipe, fifo, 0);
621 if (ret < 0)
622 return 0;
623
624 ret = usbhsf_fifo_barrier(priv, fifo);
625 if (ret < 0)
626 goto usbhs_fifo_read_busy;
627
628 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
629
630 buf = pkt->buf + pkt->actual;
631 len = pkt->length - pkt->actual;
632 len = min(len, rcv_len);
633 total_len = len;
634
635 /*
636 * update actual length first here to decide disable pipe.
637 * if this pipe keeps BUF status and all data were popped,
638 * then, next interrupt/token will be issued again
639 */
640 pkt->actual += total_len;
641
642 if ((pkt->actual == pkt->length) || /* receive all data */
643 (total_len < maxp)) { /* short packet */
644 *is_done = 1;
645 usbhsf_rx_irq_ctrl(pipe, 0);
646 usbhs_pipe_disable(pipe); /* disable pipe first */
647 }
648
649 /*
650 * Buffer clear if Zero-Length packet
651 *
652 * see
653 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
654 */
655 if (0 == rcv_len) {
656 pkt->zero = 1;
657 usbhsf_fifo_clear(pipe, fifo);
658 goto usbhs_fifo_read_end;
659 }
660
661 /*
662 * FIXME
663 *
664 * 32-bit access only
665 */
666 if (len >= 4 && !((unsigned long)buf & 0x03)) {
667 ioread32_rep(addr, buf, len / 4);
668 len %= 4;
669 buf += total_len - len;
670 }
671
672 /* the rest operation */
673 for (i = 0; i < len; i++) {
674 if (!(i & 0x03))
675 data = ioread32(addr);
676
677 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
678 }
679
680 usbhs_fifo_read_end:
681 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
682 usbhs_pipe_number(pipe),
683 pkt->length, pkt->actual, *is_done, pkt->zero);
684
685 /*
686 * Transmission end
687 */
688 if (*is_done) {
689 if (usbhs_pipe_is_dcp(pipe))
690 usbhs_dcp_control_transfer_done(pipe);
691 }
692
693 usbhs_fifo_read_busy:
694 usbhsf_fifo_unselect(pipe, fifo);
695
696 return ret;
697 }
698
699 struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
700 .prepare = usbhsf_prepare_pop,
701 .try_run = usbhsf_pio_try_pop,
702 };
703
704 /*
705 * DCP ctrol statge handler
706 */
707 static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
708 {
709 usbhs_dcp_control_transfer_done(pkt->pipe);
710
711 *is_done = 1;
712
713 return 0;
714 }
715
716 struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
717 .prepare = usbhsf_ctrl_stage_end,
718 .try_run = usbhsf_ctrl_stage_end,
719 };
720
721 /*
722 * DMA fifo functions
723 */
724 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
725 struct usbhs_pkt *pkt)
726 {
727 if (&usbhs_fifo_dma_push_handler == pkt->handler)
728 return fifo->tx_chan;
729
730 if (&usbhs_fifo_dma_pop_handler == pkt->handler)
731 return fifo->rx_chan;
732
733 return NULL;
734 }
735
736 static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
737 struct usbhs_pkt *pkt)
738 {
739 struct usbhs_fifo *fifo;
740
741 /* DMA :: D0FIFO */
742 fifo = usbhsf_get_d0fifo(priv);
743 if (usbhsf_dma_chan_get(fifo, pkt) &&
744 !usbhsf_fifo_is_busy(fifo))
745 return fifo;
746
747 /* DMA :: D1FIFO */
748 fifo = usbhsf_get_d1fifo(priv);
749 if (usbhsf_dma_chan_get(fifo, pkt) &&
750 !usbhsf_fifo_is_busy(fifo))
751 return fifo;
752
753 return NULL;
754 }
755
756 #define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
757 #define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
758 static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
759 struct usbhs_fifo *fifo,
760 u16 dreqe)
761 {
762 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
763
764 usbhs_bset(priv, fifo->sel, DREQE, dreqe);
765 }
766
767 #define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
768 #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
769 static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
770 {
771 struct usbhs_pipe *pipe = pkt->pipe;
772 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
773 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
774
775 return info->dma_map_ctrl(pkt, map);
776 }
777
778 static void usbhsf_dma_complete(void *arg);
779 static void xfer_work(struct work_struct *work)
780 {
781 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
782 struct usbhs_pipe *pipe = pkt->pipe;
783 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
784 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
785 struct dma_async_tx_descriptor *desc;
786 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
787 struct device *dev = usbhs_priv_to_dev(priv);
788 enum dma_transfer_direction dir;
789
790 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
791
792 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
793 pkt->trans, dir,
794 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
795 if (!desc)
796 return;
797
798 desc->callback = usbhsf_dma_complete;
799 desc->callback_param = pipe;
800
801 if (dmaengine_submit(desc) < 0) {
802 dev_err(dev, "Failed to submit dma descriptor\n");
803 return;
804 }
805
806 dev_dbg(dev, " %s %d (%d/ %d)\n",
807 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
808
809 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
810 usbhs_pipe_enable(pipe);
811 usbhsf_dma_start(pipe, fifo);
812 dma_async_issue_pending(chan);
813 }
814
815 /*
816 * DMA push handler
817 */
818 static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
819 {
820 struct usbhs_pipe *pipe = pkt->pipe;
821 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
822 struct usbhs_fifo *fifo;
823 int len = pkt->length - pkt->actual;
824 int ret;
825
826 if (usbhs_pipe_is_busy(pipe))
827 return 0;
828
829 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
830 if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
831 usbhs_pipe_is_dcp(pipe))
832 goto usbhsf_pio_prepare_push;
833
834 if (len & 0x7) /* 8byte alignment */
835 goto usbhsf_pio_prepare_push;
836
837 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
838 goto usbhsf_pio_prepare_push;
839
840 /* get enable DMA fifo */
841 fifo = usbhsf_get_dma_fifo(priv, pkt);
842 if (!fifo)
843 goto usbhsf_pio_prepare_push;
844
845 if (usbhsf_dma_map(pkt) < 0)
846 goto usbhsf_pio_prepare_push;
847
848 ret = usbhsf_fifo_select(pipe, fifo, 0);
849 if (ret < 0)
850 goto usbhsf_pio_prepare_push_unmap;
851
852 pkt->trans = len;
853
854 usbhsf_tx_irq_ctrl(pipe, 0);
855 INIT_WORK(&pkt->work, xfer_work);
856 schedule_work(&pkt->work);
857
858 return 0;
859
860 usbhsf_pio_prepare_push_unmap:
861 usbhsf_dma_unmap(pkt);
862 usbhsf_pio_prepare_push:
863 /*
864 * change handler to PIO
865 */
866 pkt->handler = &usbhs_fifo_pio_push_handler;
867
868 return pkt->handler->prepare(pkt, is_done);
869 }
870
871 static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
872 {
873 struct usbhs_pipe *pipe = pkt->pipe;
874
875 pkt->actual = pkt->trans;
876
877 *is_done = !pkt->zero; /* send zero packet ? */
878
879 usbhsf_dma_stop(pipe, pipe->fifo);
880 usbhsf_dma_unmap(pkt);
881 usbhsf_fifo_unselect(pipe, pipe->fifo);
882
883 return 0;
884 }
885
886 struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
887 .prepare = usbhsf_dma_prepare_push,
888 .dma_done = usbhsf_dma_push_done,
889 };
890
891 /*
892 * DMA pop handler
893 */
894 static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
895 {
896 struct usbhs_pipe *pipe = pkt->pipe;
897 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
898 struct usbhs_fifo *fifo;
899 int len, ret;
900
901 if (usbhs_pipe_is_busy(pipe))
902 return 0;
903
904 if (usbhs_pipe_is_dcp(pipe))
905 goto usbhsf_pio_prepare_pop;
906
907 /* get enable DMA fifo */
908 fifo = usbhsf_get_dma_fifo(priv, pkt);
909 if (!fifo)
910 goto usbhsf_pio_prepare_pop;
911
912 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
913 goto usbhsf_pio_prepare_pop;
914
915 ret = usbhsf_fifo_select(pipe, fifo, 0);
916 if (ret < 0)
917 goto usbhsf_pio_prepare_pop;
918
919 /* use PIO if packet is less than pio_dma_border */
920 len = usbhsf_fifo_rcv_len(priv, fifo);
921 len = min(pkt->length - pkt->actual, len);
922 if (len & 0x7) /* 8byte alignment */
923 goto usbhsf_pio_prepare_pop_unselect;
924
925 if (len < usbhs_get_dparam(priv, pio_dma_border))
926 goto usbhsf_pio_prepare_pop_unselect;
927
928 ret = usbhsf_fifo_barrier(priv, fifo);
929 if (ret < 0)
930 goto usbhsf_pio_prepare_pop_unselect;
931
932 if (usbhsf_dma_map(pkt) < 0)
933 goto usbhsf_pio_prepare_pop_unselect;
934
935 /* DMA */
936
937 /*
938 * usbhs_fifo_dma_pop_handler :: prepare
939 * enabled irq to come here.
940 * but it is no longer needed for DMA. disable it.
941 */
942 usbhsf_rx_irq_ctrl(pipe, 0);
943
944 pkt->trans = len;
945
946 INIT_WORK(&pkt->work, xfer_work);
947 schedule_work(&pkt->work);
948
949 return 0;
950
951 usbhsf_pio_prepare_pop_unselect:
952 usbhsf_fifo_unselect(pipe, fifo);
953 usbhsf_pio_prepare_pop:
954
955 /*
956 * change handler to PIO
957 */
958 pkt->handler = &usbhs_fifo_pio_pop_handler;
959
960 return pkt->handler->try_run(pkt, is_done);
961 }
962
963 static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
964 {
965 struct usbhs_pipe *pipe = pkt->pipe;
966 int maxp = usbhs_pipe_get_maxpacket(pipe);
967
968 usbhsf_dma_stop(pipe, pipe->fifo);
969 usbhsf_dma_unmap(pkt);
970 usbhsf_fifo_unselect(pipe, pipe->fifo);
971
972 pkt->actual += pkt->trans;
973
974 if ((pkt->actual == pkt->length) || /* receive all data */
975 (pkt->trans < maxp)) { /* short packet */
976 *is_done = 1;
977 } else {
978 /* re-enable */
979 usbhsf_prepare_pop(pkt, is_done);
980 }
981
982 return 0;
983 }
984
985 struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
986 .prepare = usbhsf_prepare_pop,
987 .try_run = usbhsf_dma_try_pop,
988 .dma_done = usbhsf_dma_pop_done
989 };
990
991 /*
992 * DMA setting
993 */
994 static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
995 {
996 struct sh_dmae_slave *slave = param;
997
998 /*
999 * FIXME
1000 *
1001 * usbhs doesn't recognize id = 0 as valid DMA
1002 */
1003 if (0 == slave->shdma_slave.slave_id)
1004 return false;
1005
1006 chan->private = slave;
1007
1008 return true;
1009 }
1010
1011 static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
1012 {
1013 if (fifo->tx_chan)
1014 dma_release_channel(fifo->tx_chan);
1015 if (fifo->rx_chan)
1016 dma_release_channel(fifo->rx_chan);
1017
1018 fifo->tx_chan = NULL;
1019 fifo->rx_chan = NULL;
1020 }
1021
1022 static void usbhsf_dma_init(struct usbhs_priv *priv,
1023 struct usbhs_fifo *fifo)
1024 {
1025 struct device *dev = usbhs_priv_to_dev(priv);
1026 dma_cap_mask_t mask;
1027
1028 dma_cap_zero(mask);
1029 dma_cap_set(DMA_SLAVE, mask);
1030 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1031 &fifo->tx_slave);
1032
1033 dma_cap_zero(mask);
1034 dma_cap_set(DMA_SLAVE, mask);
1035 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1036 &fifo->rx_slave);
1037
1038 if (fifo->tx_chan || fifo->rx_chan)
1039 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
1040 fifo->name,
1041 fifo->tx_chan ? "[TX]" : " ",
1042 fifo->rx_chan ? "[RX]" : " ");
1043 }
1044
1045 /*
1046 * irq functions
1047 */
1048 static int usbhsf_irq_empty(struct usbhs_priv *priv,
1049 struct usbhs_irq_state *irq_state)
1050 {
1051 struct usbhs_pipe *pipe;
1052 struct device *dev = usbhs_priv_to_dev(priv);
1053 int i, ret;
1054
1055 if (!irq_state->bempsts) {
1056 dev_err(dev, "debug %s !!\n", __func__);
1057 return -EIO;
1058 }
1059
1060 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
1061
1062 /*
1063 * search interrupted "pipe"
1064 * not "uep".
1065 */
1066 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1067 if (!(irq_state->bempsts & (1 << i)))
1068 continue;
1069
1070 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1071 if (ret < 0)
1072 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
1073 }
1074
1075 return 0;
1076 }
1077
1078 static int usbhsf_irq_ready(struct usbhs_priv *priv,
1079 struct usbhs_irq_state *irq_state)
1080 {
1081 struct usbhs_pipe *pipe;
1082 struct device *dev = usbhs_priv_to_dev(priv);
1083 int i, ret;
1084
1085 if (!irq_state->brdysts) {
1086 dev_err(dev, "debug %s !!\n", __func__);
1087 return -EIO;
1088 }
1089
1090 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
1091
1092 /*
1093 * search interrupted "pipe"
1094 * not "uep".
1095 */
1096 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1097 if (!(irq_state->brdysts & (1 << i)))
1098 continue;
1099
1100 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1101 if (ret < 0)
1102 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
1103 }
1104
1105 return 0;
1106 }
1107
1108 static void usbhsf_dma_complete(void *arg)
1109 {
1110 struct usbhs_pipe *pipe = arg;
1111 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1112 struct device *dev = usbhs_priv_to_dev(priv);
1113 int ret;
1114
1115 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
1116 if (ret < 0)
1117 dev_err(dev, "dma_complete run_error %d : %d\n",
1118 usbhs_pipe_number(pipe), ret);
1119 }
1120
1121 /*
1122 * fifo init
1123 */
1124 void usbhs_fifo_init(struct usbhs_priv *priv)
1125 {
1126 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1127 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
1128 struct usbhs_fifo *d0fifo = usbhsf_get_d0fifo(priv);
1129 struct usbhs_fifo *d1fifo = usbhsf_get_d1fifo(priv);
1130
1131 mod->irq_empty = usbhsf_irq_empty;
1132 mod->irq_ready = usbhsf_irq_ready;
1133 mod->irq_bempsts = 0;
1134 mod->irq_brdysts = 0;
1135
1136 cfifo->pipe = NULL;
1137 d0fifo->pipe = NULL;
1138 d1fifo->pipe = NULL;
1139 }
1140
1141 void usbhs_fifo_quit(struct usbhs_priv *priv)
1142 {
1143 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1144
1145 mod->irq_empty = NULL;
1146 mod->irq_ready = NULL;
1147 mod->irq_bempsts = 0;
1148 mod->irq_brdysts = 0;
1149 }
1150
1151 int usbhs_fifo_probe(struct usbhs_priv *priv)
1152 {
1153 struct usbhs_fifo *fifo;
1154
1155 /* CFIFO */
1156 fifo = usbhsf_get_cfifo(priv);
1157 fifo->name = "CFIFO";
1158 fifo->port = CFIFO;
1159 fifo->sel = CFIFOSEL;
1160 fifo->ctr = CFIFOCTR;
1161
1162 /* D0FIFO */
1163 fifo = usbhsf_get_d0fifo(priv);
1164 fifo->name = "D0FIFO";
1165 fifo->port = D0FIFO;
1166 fifo->sel = D0FIFOSEL;
1167 fifo->ctr = D0FIFOCTR;
1168 fifo->tx_slave.shdma_slave.slave_id = usbhs_get_dparam(priv, d0_tx_id);
1169 fifo->rx_slave.shdma_slave.slave_id = usbhs_get_dparam(priv, d0_rx_id);
1170 usbhsf_dma_init(priv, fifo);
1171
1172 /* D1FIFO */
1173 fifo = usbhsf_get_d1fifo(priv);
1174 fifo->name = "D1FIFO";
1175 fifo->port = D1FIFO;
1176 fifo->sel = D1FIFOSEL;
1177 fifo->ctr = D1FIFOCTR;
1178 fifo->tx_slave.shdma_slave.slave_id = usbhs_get_dparam(priv, d1_tx_id);
1179 fifo->rx_slave.shdma_slave.slave_id = usbhs_get_dparam(priv, d1_rx_id);
1180 usbhsf_dma_init(priv, fifo);
1181
1182 return 0;
1183 }
1184
1185 void usbhs_fifo_remove(struct usbhs_priv *priv)
1186 {
1187 usbhsf_dma_quit(priv, usbhsf_get_d0fifo(priv));
1188 usbhsf_dma_quit(priv, usbhsf_get_d1fifo(priv));
1189 }
Linux with added FPC-III support