2 * reset AT91SAM9G20 as per errata
6 * unless the SDRAM is cleanly shutdown before we hit the
7 * reset register it can be left driving the data bus and
8 * killing the chance of a subsequent boot from NAND
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
16 #include <linux/linkage.h>
17 #include <mach/hardware.h>
18 #include <mach/at91_ramc.h>
19 #include "at91_rstc.h"
23 .globl at91sam9_alt_restart
25 at91sam9_alt_restart: ldr r0, =at91_ramc_base @ preload constants
27 ldr r4, =at91_rstc_base
31 mov r3, #AT91_SDRAMC_LPCB_POWER_DOWN
32 ldr r4, =AT91_RSTC_KEY | AT91_RSTC_PERRST | AT91_RSTC_PROCRST
34 .balign 32 @ align to cache line
36 str r2, [r0, #AT91_SDRAMC_TR] @ disable SDRAM access
37 str r3, [r0, #AT91_SDRAMC_LPR] @ power down SDRAM
38 str r4, [r1, #AT91_RSTC_CR] @ reset processor