arch/arm/mach-kirkwood/common.c

   1 /*
   2  * arch/arm/mach-kirkwood/common.c
   3  *
   4  * Core functions for Marvell Kirkwood SoCs
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/serial_8250.h>
  15 #include <linux/ata_platform.h>
  16 #include <linux/mtd/nand.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/clk-provider.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/mv643xx_i2c.h>
  21 #include <linux/timex.h>
  22 #include <linux/kexec.h>
  23 #include <net/dsa.h>
  24 #include <asm/page.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/time.h>
  27 #include <mach/kirkwood.h>
  28 #include <mach/bridge-regs.h>
  29 #include <linux/platform_data/asoc-kirkwood.h>
  30 #include <plat/cache-feroceon-l2.h>
  31 #include <linux/platform_data/mmc-mvsdio.h>
  32 #include <linux/platform_data/mtd-orion_nand.h>
  33 #include <linux/platform_data/usb-ehci-orion.h>
  34 #include <plat/common.h>
  35 #include <plat/time.h>
  36 #include <plat/addr-map.h>
  37 #include <linux/platform_data/dma-mv_xor.h>
  38 #include "common.h"
  39
  40 /*****************************************************************************
  41  * I/O Address Mapping
  42  ****************************************************************************/
  43 static struct map_desc kirkwood_io_desc[] __initdata = {
  44         {
  45                 .virtual        = (unsigned long) KIRKWOOD_REGS_VIRT_BASE,
  46                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  47                 .length         = KIRKWOOD_REGS_SIZE,
  48                 .type           = MT_DEVICE,
  49         },
  50 };
  51
  52 void __init kirkwood_map_io(void)
  53 {
  54         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  55 }
  56
  57 /*****************************************************************************
  58  * CLK tree
  59  ****************************************************************************/
  60
  61 static void enable_sata0(void)
  62 {
  63         /* Enable PLL and IVREF */
  64         writel(readl(SATA0_PHY_MODE_2) | 0xf, SATA0_PHY_MODE_2);
  65         /* Enable PHY */
  66         writel(readl(SATA0_IF_CTRL) & ~0x200, SATA0_IF_CTRL);
  67 }
  68
  69 static void disable_sata0(void)
  70 {
  71         /* Disable PLL and IVREF */
  72         writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
  73         /* Disable PHY */
  74         writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
  75 }
  76
  77 static void enable_sata1(void)
  78 {
  79         /* Enable PLL and IVREF */
  80         writel(readl(SATA1_PHY_MODE_2) | 0xf, SATA1_PHY_MODE_2);
  81         /* Enable PHY */
  82         writel(readl(SATA1_IF_CTRL) & ~0x200, SATA1_IF_CTRL);
  83 }
  84
  85 static void disable_sata1(void)
  86 {
  87         /* Disable PLL and IVREF */
  88         writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
  89         /* Disable PHY */
  90         writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
  91 }
  92
  93 static void disable_pcie0(void)
  94 {
  95         writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
  96         while (1)
  97                 if (readl(PCIE_STATUS) & 0x1)
  98                         break;
  99         writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
 100 }
 101
 102 static void disable_pcie1(void)
 103 {
 104         u32 dev, rev;
 105
 106         kirkwood_pcie_id(&dev, &rev);
 107
 108         if (dev == MV88F6282_DEV_ID) {
 109                 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
 110                 while (1)
 111                         if (readl(PCIE1_STATUS) & 0x1)
 112                                 break;
 113                 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
 114         }
 115 }
 116
 117 /* An extended version of the gated clk. This calls fn_en()/fn_dis
 118  * before enabling/disabling the clock.  We use this to turn on/off
 119  * PHYs etc.  */
 120 struct clk_gate_fn {
 121         struct clk_gate gate;
 122         void (*fn_en)(void);
 123         void (*fn_dis)(void);
 124 };
 125
 126 #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate)
 127 #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
 128
 129 static int clk_gate_fn_enable(struct clk_hw *hw)
 130 {
 131         struct clk_gate *gate = to_clk_gate(hw);
 132         struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
 133         int ret;
 134
 135         ret = clk_gate_ops.enable(hw);
 136         if (!ret && gate_fn->fn_en)
 137                 gate_fn->fn_en();
 138
 139         return ret;
 140 }
 141
 142 static void clk_gate_fn_disable(struct clk_hw *hw)
 143 {
 144         struct clk_gate *gate = to_clk_gate(hw);
 145         struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate);
 146
 147         if (gate_fn->fn_dis)
 148                 gate_fn->fn_dis();
 149
 150         clk_gate_ops.disable(hw);
 151 }
 152
 153 static struct clk_ops clk_gate_fn_ops;
 154
 155 static struct clk __init *clk_register_gate_fn(struct device *dev,
 156                 const char *name,
 157                 const char *parent_name, unsigned long flags,
 158                 void __iomem *reg, u8 bit_idx,
 159                 u8 clk_gate_flags, spinlock_t *lock,
 160                 void (*fn_en)(void), void (*fn_dis)(void))
 161 {
 162         struct clk_gate_fn *gate_fn;
 163         struct clk *clk;
 164         struct clk_init_data init;
 165
 166         gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL);
 167         if (!gate_fn) {
 168                 pr_err("%s: could not allocate gated clk\n", __func__);
 169                 return ERR_PTR(-ENOMEM);
 170         }
 171
 172         init.name = name;
 173         init.ops = &clk_gate_fn_ops;
 174         init.flags = flags;
 175         init.parent_names = (parent_name ? &parent_name : NULL);
 176         init.num_parents = (parent_name ? 1 : 0);
 177
 178         /* struct clk_gate assignments */
 179         gate_fn->gate.reg = reg;
 180         gate_fn->gate.bit_idx = bit_idx;
 181         gate_fn->gate.flags = clk_gate_flags;
 182         gate_fn->gate.lock = lock;
 183         gate_fn->gate.hw.init = &init;
 184         gate_fn->fn_en = fn_en;
 185         gate_fn->fn_dis = fn_dis;
 186
 187         /* ops is the gate ops, but with our enable/disable functions */
 188         if (clk_gate_fn_ops.enable != clk_gate_fn_enable ||
 189             clk_gate_fn_ops.disable != clk_gate_fn_disable) {
 190                 clk_gate_fn_ops = clk_gate_ops;
 191                 clk_gate_fn_ops.enable = clk_gate_fn_enable;
 192                 clk_gate_fn_ops.disable = clk_gate_fn_disable;
 193         }
 194
 195         clk = clk_register(dev, &gate_fn->gate.hw);
 196
 197         if (IS_ERR(clk))
 198                 kfree(gate_fn);
 199
 200         return clk;
 201 }
 202
 203 static DEFINE_SPINLOCK(gating_lock);
 204 static struct clk *tclk;
 205
 206 static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
 207 {
 208         return clk_register_gate(NULL, name, "tclk", 0, CLOCK_GATING_CTRL,
 209                                  bit_idx, 0, &gating_lock);
 210 }
 211
 212 static struct clk __init *kirkwood_register_gate_fn(const char *name,
 213                                                     u8 bit_idx,
 214                                                     void (*fn_en)(void),
 215                                                     void (*fn_dis)(void))
 216 {
 217         return clk_register_gate_fn(NULL, name, "tclk", 0, CLOCK_GATING_CTRL,
 218                                     bit_idx, 0, &gating_lock, fn_en, fn_dis);
 219 }
 220
 221 static struct clk *ge0, *ge1;
 222
 223 void __init kirkwood_clk_init(void)
 224 {
 225         struct clk *runit, *sata0, *sata1, *usb0, *sdio;
 226         struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;
 227
 228         tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
 229                                        CLK_IS_ROOT, kirkwood_tclk);
 230
 231         runit = kirkwood_register_gate("runit",  CGC_BIT_RUNIT);
 232         ge0 = kirkwood_register_gate("ge0",    CGC_BIT_GE0);
 233         ge1 = kirkwood_register_gate("ge1",    CGC_BIT_GE1);
 234         sata0 = kirkwood_register_gate_fn("sata0",  CGC_BIT_SATA0,
 235                                           enable_sata0, disable_sata0);
 236         sata1 = kirkwood_register_gate_fn("sata1",  CGC_BIT_SATA1,
 237                                           enable_sata1, disable_sata1);
 238         usb0 = kirkwood_register_gate("usb0",   CGC_BIT_USB0);
 239         sdio = kirkwood_register_gate("sdio",   CGC_BIT_SDIO);
 240         crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
 241         xor0 = kirkwood_register_gate("xor0",   CGC_BIT_XOR0);
 242         xor1 = kirkwood_register_gate("xor1",   CGC_BIT_XOR1);
 243         pex0 = kirkwood_register_gate_fn("pex0",   CGC_BIT_PEX0,
 244                                          NULL, disable_pcie0);
 245         pex1 = kirkwood_register_gate_fn("pex1",   CGC_BIT_PEX1,
 246                                          NULL, disable_pcie1);
 247         audio = kirkwood_register_gate("audio",  CGC_BIT_AUDIO);
 248         kirkwood_register_gate("tdm",    CGC_BIT_TDM);
 249         kirkwood_register_gate("tsu",    CGC_BIT_TSU);
 250
 251         /* clkdev entries, mapping clks to devices */
 252         orion_clkdev_add(NULL, "orion_spi.0", runit);
 253         orion_clkdev_add(NULL, "orion_spi.1", runit);
 254         orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0);
 255         orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1);
 256         orion_clkdev_add(NULL, "orion_wdt", tclk);
 257         orion_clkdev_add("0", "sata_mv.0", sata0);
 258         orion_clkdev_add("1", "sata_mv.0", sata1);
 259         orion_clkdev_add(NULL, "orion-ehci.0", usb0);
 260         orion_clkdev_add(NULL, "orion_nand", runit);
 261         orion_clkdev_add(NULL, "mvsdio", sdio);
 262         orion_clkdev_add(NULL, "mv_crypto", crypto);
 263         orion_clkdev_add(NULL, MV_XOR_NAME ".0", xor0);
 264         orion_clkdev_add(NULL, MV_XOR_NAME ".1", xor1);
 265         orion_clkdev_add("0", "pcie", pex0);
 266         orion_clkdev_add("1", "pcie", pex1);
 267         orion_clkdev_add(NULL, "kirkwood-i2s", audio);
 268         orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit);
 269         orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".1", runit);
 270
 271         /* Marvell says runit is used by SPI, UART, NAND, TWSI, ...,
 272          * so should never be gated.
 273          */
 274         clk_prepare_enable(runit);
 275 }
 276
 277 /*****************************************************************************
 278  * EHCI0
 279  ****************************************************************************/
 280 void __init kirkwood_ehci_init(void)
 281 {
 282         orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA);
 283 }
 284
 285
 286 /*****************************************************************************
 287  * GE00
 288  ****************************************************************************/
 289 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 290 {
 291         orion_ge00_init(eth_data,
 292                         GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
 293                         IRQ_KIRKWOOD_GE00_ERR, 1600);
 294         /* The interface forgets the MAC address assigned by u-boot if
 295         the clock is turned off, so claim the clk now. */
 296         clk_prepare_enable(ge0);
 297 }
 298
 299
 300 /*****************************************************************************
 301  * GE01
 302  ****************************************************************************/
 303 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 304 {
 305         orion_ge01_init(eth_data,
 306                         GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
 307                         IRQ_KIRKWOOD_GE01_ERR, 1600);
 308         clk_prepare_enable(ge1);
 309 }
 310
 311
 312 /*****************************************************************************
 313  * Ethernet switch
 314  ****************************************************************************/
 315 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 316 {
 317         orion_ge00_switch_init(d, irq);
 318 }
 319
 320
 321 /*****************************************************************************
 322  * NAND flash
 323  ****************************************************************************/
 324 static struct resource kirkwood_nand_resource = {
 325         .flags          = IORESOURCE_MEM,
 326         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
 327         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
 328                                 KIRKWOOD_NAND_MEM_SIZE - 1,
 329 };
 330
 331 static struct orion_nand_data kirkwood_nand_data = {
 332         .cle            = 0,
 333         .ale            = 1,
 334         .width          = 8,
 335 };
 336
 337 static struct platform_device kirkwood_nand_flash = {
 338         .name           = "orion_nand",
 339         .id             = -1,
 340         .dev            = {
 341                 .platform_data  = &kirkwood_nand_data,
 342         },
 343         .resource       = &kirkwood_nand_resource,
 344         .num_resources  = 1,
 345 };
 346
 347 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
 348                                int chip_delay)
 349 {
 350         kirkwood_nand_data.parts = parts;
 351         kirkwood_nand_data.nr_parts = nr_parts;
 352         kirkwood_nand_data.chip_delay = chip_delay;
 353         platform_device_register(&kirkwood_nand_flash);
 354 }
 355
 356 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
 357                                    int (*dev_ready)(struct mtd_info *))
 358 {
 359         kirkwood_nand_data.parts = parts;
 360         kirkwood_nand_data.nr_parts = nr_parts;
 361         kirkwood_nand_data.dev_ready = dev_ready;
 362         platform_device_register(&kirkwood_nand_flash);
 363 }
 364
 365 /*****************************************************************************
 366  * SoC RTC
 367  ****************************************************************************/
 368 static void __init kirkwood_rtc_init(void)
 369 {
 370         orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
 371 }
 372
 373
 374 /*****************************************************************************
 375  * SATA
 376  ****************************************************************************/
 377 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 378 {
 379         orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 380 }
 381
 382
 383 /*****************************************************************************
 384  * SD/SDIO/MMC
 385  ****************************************************************************/
 386 static struct resource mvsdio_resources[] = {
 387         [0] = {
 388                 .start  = SDIO_PHYS_BASE,
 389                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
 390                 .flags  = IORESOURCE_MEM,
 391         },
 392         [1] = {
 393                 .start  = IRQ_KIRKWOOD_SDIO,
 394                 .end    = IRQ_KIRKWOOD_SDIO,
 395                 .flags  = IORESOURCE_IRQ,
 396         },
 397 };
 398
 399 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
 400
 401 static struct platform_device kirkwood_sdio = {
 402         .name           = "mvsdio",
 403         .id             = -1,
 404         .dev            = {
 405                 .dma_mask = &mvsdio_dmamask,
 406                 .coherent_dma_mask = DMA_BIT_MASK(32),
 407         },
 408         .num_resources  = ARRAY_SIZE(mvsdio_resources),
 409         .resource       = mvsdio_resources,
 410 };
 411
 412 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 413 {
 414         u32 dev, rev;
 415
 416         kirkwood_pcie_id(&dev, &rev);
 417         if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
 418                 mvsdio_data->clock = 100000000;
 419         else
 420                 mvsdio_data->clock = 200000000;
 421         kirkwood_sdio.dev.platform_data = mvsdio_data;
 422         platform_device_register(&kirkwood_sdio);
 423 }
 424
 425
 426 /*****************************************************************************
 427  * SPI
 428  ****************************************************************************/
 429 void __init kirkwood_spi_init(void)
 430 {
 431         orion_spi_init(SPI_PHYS_BASE);
 432 }
 433
 434
 435 /*****************************************************************************
 436  * I2C
 437  ****************************************************************************/
 438 void __init kirkwood_i2c_init(void)
 439 {
 440         orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
 441 }
 442
 443
 444 /*****************************************************************************
 445  * UART0
 446  ****************************************************************************/
 447
 448 void __init kirkwood_uart0_init(void)
 449 {
 450         orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
 451                          IRQ_KIRKWOOD_UART_0, tclk);
 452 }
 453
 454
 455 /*****************************************************************************
 456  * UART1
 457  ****************************************************************************/
 458 void __init kirkwood_uart1_init(void)
 459 {
 460         orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
 461                          IRQ_KIRKWOOD_UART_1, tclk);
 462 }
 463
 464 /*****************************************************************************
 465  * Cryptographic Engines and Security Accelerator (CESA)
 466  ****************************************************************************/
 467 void __init kirkwood_crypto_init(void)
 468 {
 469         orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
 470                           KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
 471 }
 472
 473
 474 /*****************************************************************************
 475  * XOR0
 476  ****************************************************************************/
 477 void __init kirkwood_xor0_init(void)
 478 {
 479         orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
 480                         IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
 481 }
 482
 483
 484 /*****************************************************************************
 485  * XOR1
 486  ****************************************************************************/
 487 void __init kirkwood_xor1_init(void)
 488 {
 489         orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
 490                         IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
 491 }
 492
 493
 494 /*****************************************************************************
 495  * Watchdog
 496  ****************************************************************************/
 497 void __init kirkwood_wdt_init(void)
 498 {
 499         orion_wdt_init();
 500 }
 501
 502
 503 /*****************************************************************************
 504  * Time handling
 505  ****************************************************************************/
 506 void __init kirkwood_init_early(void)
 507 {
 508         orion_time_set_base(TIMER_VIRT_BASE);
 509
 510         /*
 511          * Some Kirkwood devices allocate their coherent buffers from atomic
 512          * context. Increase size of atomic coherent pool to make sure such
 513          * the allocations won't fail.
 514          */
 515         init_dma_coherent_pool_size(SZ_1M);
 516 }
 517
 518 int kirkwood_tclk;
 519
 520 static int __init kirkwood_find_tclk(void)
 521 {
 522         u32 dev, rev;
 523
 524         kirkwood_pcie_id(&dev, &rev);
 525
 526         if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
 527                 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
 528                         return 200000000;
 529
 530         return 166666667;
 531 }
 532
 533 static void __init kirkwood_timer_init(void)
 534 {
 535         kirkwood_tclk = kirkwood_find_tclk();
 536
 537         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 538                         IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
 539 }
 540
 541 struct sys_timer kirkwood_timer = {
 542         .init = kirkwood_timer_init,
 543 };
 544
 545 /*****************************************************************************
 546  * Audio
 547  ****************************************************************************/
 548 static struct resource kirkwood_i2s_resources[] = {
 549         [0] = {
 550                 .start  = AUDIO_PHYS_BASE,
 551                 .end    = AUDIO_PHYS_BASE + SZ_16K - 1,
 552                 .flags  = IORESOURCE_MEM,
 553         },
 554         [1] = {
 555                 .start  = IRQ_KIRKWOOD_I2S,
 556                 .end    = IRQ_KIRKWOOD_I2S,
 557                 .flags  = IORESOURCE_IRQ,
 558         },
 559 };
 560
 561 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
 562         .burst       = 128,
 563 };
 564
 565 static struct platform_device kirkwood_i2s_device = {
 566         .name           = "kirkwood-i2s",
 567         .id             = -1,
 568         .num_resources  = ARRAY_SIZE(kirkwood_i2s_resources),
 569         .resource       = kirkwood_i2s_resources,
 570         .dev            = {
 571                 .platform_data  = &kirkwood_i2s_data,
 572         },
 573 };
 574
 575 static struct platform_device kirkwood_pcm_device = {
 576         .name           = "kirkwood-pcm-audio",
 577         .id             = -1,
 578 };
 579
 580 void __init kirkwood_audio_init(void)
 581 {
 582         platform_device_register(&kirkwood_i2s_device);
 583         platform_device_register(&kirkwood_pcm_device);
 584 }
 585
 586 /*****************************************************************************
 587  * General
 588  ****************************************************************************/
 589 /*
 590  * Identify device ID and revision.
 591  */
 592 char * __init kirkwood_id(void)
 593 {
 594         u32 dev, rev;
 595
 596         kirkwood_pcie_id(&dev, &rev);
 597
 598         if (dev == MV88F6281_DEV_ID) {
 599                 if (rev == MV88F6281_REV_Z0)
 600                         return "MV88F6281-Z0";
 601                 else if (rev == MV88F6281_REV_A0)
 602                         return "MV88F6281-A0";
 603                 else if (rev == MV88F6281_REV_A1)
 604                         return "MV88F6281-A1";
 605                 else
 606                         return "MV88F6281-Rev-Unsupported";
 607         } else if (dev == MV88F6192_DEV_ID) {
 608                 if (rev == MV88F6192_REV_Z0)
 609                         return "MV88F6192-Z0";
 610                 else if (rev == MV88F6192_REV_A0)
 611                         return "MV88F6192-A0";
 612                 else if (rev == MV88F6192_REV_A1)
 613                         return "MV88F6192-A1";
 614                 else
 615                         return "MV88F6192-Rev-Unsupported";
 616         } else if (dev == MV88F6180_DEV_ID) {
 617                 if (rev == MV88F6180_REV_A0)
 618                         return "MV88F6180-Rev-A0";
 619                 else if (rev == MV88F6180_REV_A1)
 620                         return "MV88F6180-Rev-A1";
 621                 else
 622                         return "MV88F6180-Rev-Unsupported";
 623         } else if (dev == MV88F6282_DEV_ID) {
 624                 if (rev == MV88F6282_REV_A0)
 625                         return "MV88F6282-Rev-A0";
 626                 else if (rev == MV88F6282_REV_A1)
 627                         return "MV88F6282-Rev-A1";
 628                 else
 629                         return "MV88F6282-Rev-Unsupported";
 630         } else {
 631                 return "Device-Unknown";
 632         }
 633 }
 634
 635 void __init kirkwood_l2_init(void)
 636 {
 637 #ifdef CONFIG_CACHE_FEROCEON_L2
 638 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
 639         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
 640         feroceon_l2_init(1);
 641 #else
 642         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
 643         feroceon_l2_init(0);
 644 #endif
 645 #endif
 646 }
 647
 648 void __init kirkwood_init(void)
 649 {
 650         pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk);
 651
 652         /*
 653          * Disable propagation of mbus errors to the CPU local bus,
 654          * as this causes mbus errors (which can occur for example
 655          * for PCI aborts) to throw CPU aborts, which we're not set
 656          * up to deal with.
 657          */
 658         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
 659
 660         kirkwood_setup_cpu_mbus();
 661
 662         kirkwood_l2_init();
 663
 664         /* Setup root of clk tree */
 665         kirkwood_clk_init();
 666
 667         /* internal devices that every board has */
 668         kirkwood_rtc_init();
 669         kirkwood_wdt_init();
 670         kirkwood_xor0_init();
 671         kirkwood_xor1_init();
 672         kirkwood_crypto_init();
 673
 674 #ifdef CONFIG_KEXEC
 675         kexec_reinit = kirkwood_enable_pcie;
 676 #endif
 677 }
 678
 679 void kirkwood_restart(char mode, const char *cmd)
 680 {
 681         /*
 682          * Enable soft reset to assert RSTOUTn.
 683          */
 684         writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
 685
 686         /*
 687          * Assert soft reset.
 688          */
 689         writel(SOFT_RESET, SYSTEM_SOFT_RESET);
 690
 691         while (1)
 692                 ;
 693 }