x86, efi: Set runtime_version to the EFI spec revision
[linux/fpc-iii.git] / arch / arm / mach-mmp / pxa910.c
blob8b1e16fbb7a561769cf3a11bdc414f9ce5e41207
1 /*
2 * linux/arch/arm/mach-mmp/pxa910.c
4 * Code specific to PXA910
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/list.h>
14 #include <linux/io.h>
15 #include <linux/platform_device.h>
17 #include <asm/hardware/cache-tauros2.h>
18 #include <asm/mach/time.h>
19 #include <mach/addr-map.h>
20 #include <mach/regs-apbc.h>
21 #include <mach/cputype.h>
22 #include <mach/irqs.h>
23 #include <mach/dma.h>
24 #include <mach/mfp.h>
25 #include <mach/devices.h>
27 #include "common.h"
29 #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
31 static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
33 MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
34 MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
35 MFP_ADDR_X(GPIO100, GPIO109, 0x238),
37 MFP_ADDR(GPIO123, 0xcc),
38 MFP_ADDR(GPIO124, 0xd0),
40 MFP_ADDR(DF_IO0, 0x40),
41 MFP_ADDR(DF_IO1, 0x3c),
42 MFP_ADDR(DF_IO2, 0x38),
43 MFP_ADDR(DF_IO3, 0x34),
44 MFP_ADDR(DF_IO4, 0x30),
45 MFP_ADDR(DF_IO5, 0x2c),
46 MFP_ADDR(DF_IO6, 0x28),
47 MFP_ADDR(DF_IO7, 0x24),
48 MFP_ADDR(DF_IO8, 0x20),
49 MFP_ADDR(DF_IO9, 0x1c),
50 MFP_ADDR(DF_IO10, 0x18),
51 MFP_ADDR(DF_IO11, 0x14),
52 MFP_ADDR(DF_IO12, 0x10),
53 MFP_ADDR(DF_IO13, 0xc),
54 MFP_ADDR(DF_IO14, 0x8),
55 MFP_ADDR(DF_IO15, 0x4),
57 MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
58 MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
59 MFP_ADDR(SM_nCS0, 0x4c),
60 MFP_ADDR(SM_nCS1, 0x50),
61 MFP_ADDR(DF_WEn, 0x54),
62 MFP_ADDR(DF_REn, 0x58),
63 MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
64 MFP_ADDR(DF_ALE_SM_WEn, 0x60),
65 MFP_ADDR(SM_SCLK, 0x64),
66 MFP_ADDR(DF_RDY0, 0x68),
67 MFP_ADDR(SM_BE0, 0x6c),
68 MFP_ADDR(SM_BE1, 0x70),
69 MFP_ADDR(SM_ADV, 0x74),
70 MFP_ADDR(DF_RDY1, 0x78),
71 MFP_ADDR(SM_ADVMUX, 0x7c),
72 MFP_ADDR(SM_RDY, 0x80),
74 MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
76 MFP_ADDR_END,
79 void __init pxa910_init_irq(void)
81 icu_init_irq();
84 static int __init pxa910_init(void)
86 if (cpu_is_pxa910()) {
87 #ifdef CONFIG_CACHE_TAUROS2
88 tauros2_init(0);
89 #endif
90 mfp_init_base(MFPR_VIRT_BASE);
91 mfp_init_addr(pxa910_mfp_addr_map);
92 pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
93 pxa910_clk_init();
96 return 0;
98 postcore_initcall(pxa910_init);
100 /* system timer - clock enabled, 3.25MHz */
101 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
102 #define APBC_TIMERS APBC_REG(0x34)
104 static void __init pxa910_timer_init(void)
106 /* reset and configure */
107 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
108 __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
110 timer_init(IRQ_PXA910_AP1_TIMER1);
113 struct sys_timer pxa910_timer = {
114 .init = pxa910_timer_init,
117 /* on-chip devices */
119 /* NOTE: there are totally 3 UARTs on PXA910:
121 * UART1 - Slow UART (can be used both by AP and CP)
122 * UART2/3 - Fast UART
124 * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
125 * they are re-ordered as:
127 * pxa910_device_uart1 - UART2 as FFUART
128 * pxa910_device_uart2 - UART3 as BTUART
130 * UART1 is not used by AP for the moment.
132 PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
133 PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
134 PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
135 PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
136 PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
137 PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
138 PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
139 PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
140 PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
142 struct resource pxa910_resource_gpio[] = {
144 .start = 0xd4019000,
145 .end = 0xd4019fff,
146 .flags = IORESOURCE_MEM,
147 }, {
148 .start = IRQ_PXA910_AP_GPIO,
149 .end = IRQ_PXA910_AP_GPIO,
150 .name = "gpio_mux",
151 .flags = IORESOURCE_IRQ,
155 struct platform_device pxa910_device_gpio = {
156 .name = "pxa-gpio",
157 .id = -1,
158 .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
159 .resource = pxa910_resource_gpio,
162 static struct resource pxa910_resource_rtc[] = {
164 .start = 0xd4010000,
165 .end = 0xd401003f,
166 .flags = IORESOURCE_MEM,
167 }, {
168 .start = IRQ_PXA910_RTC_INT,
169 .end = IRQ_PXA910_RTC_INT,
170 .name = "rtc 1Hz",
171 .flags = IORESOURCE_IRQ,
172 }, {
173 .start = IRQ_PXA910_RTC_ALARM,
174 .end = IRQ_PXA910_RTC_ALARM,
175 .name = "rtc alarm",
176 .flags = IORESOURCE_IRQ,
180 struct platform_device pxa910_device_rtc = {
181 .name = "sa1100-rtc",
182 .id = -1,
183 .num_resources = ARRAY_SIZE(pxa910_resource_rtc),
184 .resource = pxa910_resource_rtc,