1 /* linux/arch/arm/mach-s3c2440/irq.c
3 * Copyright (c) 2003-2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/interrupt.h>
25 #include <linux/ioport.h>
26 #include <linux/device.h>
29 #include <mach/hardware.h>
32 #include <asm/mach/irq.h>
34 #include <mach/regs-irq.h>
35 #include <mach/regs-gpio.h>
43 static void s3c_irq_demux_wdtac97(unsigned int irq
,
44 struct irq_desc
*desc
)
46 unsigned int subsrc
, submsk
;
48 /* read the current pending interrupts, and the mask
49 * for what it is available */
51 subsrc
= __raw_readl(S3C2410_SUBSRCPND
);
52 submsk
= __raw_readl(S3C2410_INTSUBMSK
);
60 generic_handle_irq(IRQ_S3C2440_WDT
);
63 generic_handle_irq(IRQ_S3C2440_AC97
);
69 #define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
72 s3c_irq_wdtac97_mask(struct irq_data
*data
)
74 s3c_irqsub_mask(data
->irq
, INTMSK_WDT
, 3 << 13);
78 s3c_irq_wdtac97_unmask(struct irq_data
*data
)
80 s3c_irqsub_unmask(data
->irq
, INTMSK_WDT
);
84 s3c_irq_wdtac97_ack(struct irq_data
*data
)
86 s3c_irqsub_maskack(data
->irq
, INTMSK_WDT
, 3 << 13);
89 static struct irq_chip s3c_irq_wdtac97
= {
90 .irq_mask
= s3c_irq_wdtac97_mask
,
91 .irq_unmask
= s3c_irq_wdtac97_unmask
,
92 .irq_ack
= s3c_irq_wdtac97_ack
,
95 static int s3c2440_irq_add(struct device
*dev
, struct subsys_interface
*sif
)
99 printk("S3C2440: IRQ Support\n");
101 /* add new chained handler for wdt, ac7 */
103 irq_set_chip_and_handler(IRQ_WDT
, &s3c_irq_level_chip
,
105 irq_set_chained_handler(IRQ_WDT
, s3c_irq_demux_wdtac97
);
107 for (irqno
= IRQ_S3C2440_WDT
; irqno
<= IRQ_S3C2440_AC97
; irqno
++) {
108 irq_set_chip_and_handler(irqno
, &s3c_irq_wdtac97
,
110 set_irq_flags(irqno
, IRQF_VALID
);
116 static struct subsys_interface s3c2440_irq_interface
= {
117 .name
= "s3c2440_irq",
118 .subsys
= &s3c2440_subsys
,
119 .add_dev
= s3c2440_irq_add
,
122 static int s3c2440_irq_init(void)
124 return subsys_interface_register(&s3c2440_irq_interface
);
127 arch_initcall(s3c2440_irq_init
);