x86, efi: Set runtime_version to the EFI spec revision
[linux/fpc-iii.git] / arch / arm / mach-s3c24xx / mach-at2440evb.c
blob00381fe5de32bfae95dfeaaeaff7f93345a20660
1 /* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
3 * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
4 * Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
5 * and modifications by SBZ <sbz@spgui.org> and
6 * Weibing <http://weibing.blogbus.com>
8 * For product information, visit http://www.arm.com/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/interrupt.h>
18 #include <linux/list.h>
19 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/io.h>
22 #include <linux/serial_core.h>
23 #include <linux/dm9000.h>
24 #include <linux/platform_device.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/irq.h>
30 #include <mach/hardware.h>
31 #include <mach/fb.h>
32 #include <asm/irq.h>
33 #include <asm/mach-types.h>
35 #include <plat/regs-serial.h>
36 #include <mach/regs-gpio.h>
37 #include <mach/regs-mem.h>
38 #include <mach/regs-lcd.h>
39 #include <linux/platform_data/mtd-nand-s3c2410.h>
40 #include <linux/platform_data/i2c-s3c2410.h>
42 #include <linux/mtd/mtd.h>
43 #include <linux/mtd/nand.h>
44 #include <linux/mtd/nand_ecc.h>
45 #include <linux/mtd/partitions.h>
47 #include <plat/clock.h>
48 #include <plat/devs.h>
49 #include <plat/cpu.h>
50 #include <linux/platform_data/mmc-s3cmci.h>
52 #include "common.h"
54 static struct map_desc at2440evb_iodesc[] __initdata = {
55 /* Nothing here */
58 #define UCON S3C2410_UCON_DEFAULT
59 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
60 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
62 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
63 [0] = {
64 .hwport = 0,
65 .flags = 0,
66 .ucon = UCON,
67 .ulcon = ULCON,
68 .ufcon = UFCON,
69 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
71 [1] = {
72 .hwport = 1,
73 .flags = 0,
74 .ucon = UCON,
75 .ulcon = ULCON,
76 .ufcon = UFCON,
77 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
81 /* NAND Flash on AT2440EVB board */
83 static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
84 [0] = {
85 .name = "Boot Agent",
86 .size = SZ_256K,
87 .offset = 0,
89 [1] = {
90 .name = "Kernel",
91 .size = SZ_2M,
92 .offset = SZ_256K,
94 [2] = {
95 .name = "Root",
96 .offset = SZ_256K + SZ_2M,
97 .size = MTDPART_SIZ_FULL,
101 static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
102 [0] = {
103 .name = "nand",
104 .nr_chips = 1,
105 .nr_partitions = ARRAY_SIZE(at2440evb_default_nand_part),
106 .partitions = at2440evb_default_nand_part,
110 static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
111 .tacls = 25,
112 .twrph0 = 55,
113 .twrph1 = 40,
114 .nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
115 .sets = at2440evb_nand_sets,
118 /* DM9000AEP 10/100 ethernet controller */
120 static struct resource at2440evb_dm9k_resource[] = {
121 [0] = DEFINE_RES_MEM(S3C2410_CS3, 4),
122 [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
123 [2] = DEFINE_RES_NAMED(IRQ_EINT7, 1, NULL, IORESOURCE_IRQ \
124 | IORESOURCE_IRQ_HIGHEDGE),
127 static struct dm9000_plat_data at2440evb_dm9k_pdata = {
128 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
131 static struct platform_device at2440evb_device_eth = {
132 .name = "dm9000",
133 .id = -1,
134 .num_resources = ARRAY_SIZE(at2440evb_dm9k_resource),
135 .resource = at2440evb_dm9k_resource,
136 .dev = {
137 .platform_data = &at2440evb_dm9k_pdata,
141 static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
142 .gpio_detect = S3C2410_GPG(10),
145 /* 7" LCD panel */
147 static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
149 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
150 S3C2410_LCDCON5_INVVLINE |
151 S3C2410_LCDCON5_INVVFRAME |
152 S3C2410_LCDCON5_PWREN |
153 S3C2410_LCDCON5_HWSWP,
155 .type = S3C2410_LCDCON1_TFT,
157 .width = 800,
158 .height = 480,
160 .pixclock = 33333, /* HCLK 60 MHz, divisor 2 */
161 .xres = 800,
162 .yres = 480,
163 .bpp = 16,
164 .left_margin = 88,
165 .right_margin = 40,
166 .hsync_len = 128,
167 .upper_margin = 32,
168 .lower_margin = 11,
169 .vsync_len = 2,
172 static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
173 .displays = &at2440evb_lcd_cfg,
174 .num_displays = 1,
175 .default_display = 0,
178 static struct platform_device *at2440evb_devices[] __initdata = {
179 &s3c_device_ohci,
180 &s3c_device_wdt,
181 &s3c_device_adc,
182 &s3c_device_i2c0,
183 &s3c_device_rtc,
184 &s3c_device_nand,
185 &s3c_device_sdi,
186 &s3c_device_lcd,
187 &at2440evb_device_eth,
190 static void __init at2440evb_map_io(void)
192 s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
193 s3c24xx_init_clocks(16934400);
194 s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
197 static void __init at2440evb_init(void)
199 s3c24xx_fb_set_platdata(&at2440evb_fb_info);
200 s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
201 s3c_nand_set_platdata(&at2440evb_nand_info);
202 s3c_i2c0_set_platdata(NULL);
204 platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
208 MACHINE_START(AT2440EVB, "AT2440EVB")
209 .atag_offset = 0x100,
210 .map_io = at2440evb_map_io,
211 .init_machine = at2440evb_init,
212 .init_irq = s3c24xx_init_irq,
213 .timer = &s3c24xx_timer,
214 .restart = s3c244x_restart,
215 MACHINE_END