x86, efi: Set runtime_version to the EFI spec revision
[linux/fpc-iii.git] / arch / arm / plat-samsung / s5p-irq-pm.c
blob7c1e3b7072fc37ff66f0968d533f819e7611e3bd
1 /*
2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * Based on arch/arm/plat-s3c24xx/irq-pm.c,
6 * Copyright (c) 2003,2004 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
19 #include <plat/cpu.h>
20 #include <plat/irqs.h>
21 #include <plat/pm.h>
22 #include <mach/map.h>
24 #include <mach/regs-gpio.h>
25 #include <mach/regs-irq.h>
27 /* state for IRQs over sleep */
29 /* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM,
30 * as wakeup sources
32 * set bit to 1 in allow bitfield to enable the wakeup settings on it
35 unsigned long s3c_irqwake_intallow = 0x00000006L;
36 unsigned long s3c_irqwake_eintallow = 0xffffffffL;
38 int s3c_irq_wake(struct irq_data *data, unsigned int state)
40 unsigned long irqbit;
41 unsigned int irq_rtc_tic, irq_rtc_alarm;
43 #ifdef CONFIG_ARCH_EXYNOS
44 if (soc_is_exynos5250()) {
45 irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
46 irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
47 } else {
48 irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
49 irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
51 #else
52 irq_rtc_tic = IRQ_RTC_TIC;
53 irq_rtc_alarm = IRQ_RTC_ALARM;
54 #endif
56 if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
57 irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
59 if (!state)
60 s3c_irqwake_intmask |= irqbit;
61 else
62 s3c_irqwake_intmask &= ~irqbit;
63 } else {
64 return -ENOENT;
67 return 0;
70 static struct sleep_save eint_save[] = {
71 SAVE_ITEM(S5P_EINT_CON(0)),
72 SAVE_ITEM(S5P_EINT_CON(1)),
73 SAVE_ITEM(S5P_EINT_CON(2)),
74 SAVE_ITEM(S5P_EINT_CON(3)),
76 SAVE_ITEM(S5P_EINT_FLTCON(0)),
77 SAVE_ITEM(S5P_EINT_FLTCON(1)),
78 SAVE_ITEM(S5P_EINT_FLTCON(2)),
79 SAVE_ITEM(S5P_EINT_FLTCON(3)),
80 SAVE_ITEM(S5P_EINT_FLTCON(4)),
81 SAVE_ITEM(S5P_EINT_FLTCON(5)),
82 SAVE_ITEM(S5P_EINT_FLTCON(6)),
83 SAVE_ITEM(S5P_EINT_FLTCON(7)),
85 SAVE_ITEM(S5P_EINT_MASK(0)),
86 SAVE_ITEM(S5P_EINT_MASK(1)),
87 SAVE_ITEM(S5P_EINT_MASK(2)),
88 SAVE_ITEM(S5P_EINT_MASK(3)),
91 int s3c24xx_irq_suspend(void)
93 s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));
95 return 0;
98 void s3c24xx_irq_resume(void)
100 s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));