arch/arm/plat-samsung/time.c

   1 /* linux/arch/arm/plat-samsung/time.c
   2  *
   3  * Copyright (C) 2003-2005 Simtec Electronics
   4  *      Ben Dooks, <ben@simtec.co.uk>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/sched.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/irq.h>
  26 #include <linux/err.h>
  27 #include <linux/clk.h>
  28 #include <linux/io.h>
  29 #include <linux/platform_device.h>
  30
  31 #include <asm/mach-types.h>
  32
  33 #include <asm/irq.h>
  34 #include <mach/map.h>
  35 #include <plat/regs-timer.h>
  36 #include <mach/regs-irq.h>
  37 #include <asm/mach/time.h>
  38 #include <mach/tick.h>
  39
  40 #include <plat/clock.h>
  41 #include <plat/cpu.h>
  42
  43 static unsigned long timer_startval;
  44 static unsigned long timer_usec_ticks;
  45
  46 #ifndef TICK_MAX
  47 #define TICK_MAX (0xffff)
  48 #endif
  49
  50 #define TIMER_USEC_SHIFT 16
  51
  52 /* we use the shifted arithmetic to work out the ratio of timer ticks
  53  * to usecs, as often the peripheral clock is not a nice even multiple
  54  * of 1MHz.
  55  *
  56  * shift of 14 and 15 are too low for the 12MHz, 16 seems to be ok
  57  * for the current HZ value of 200 without producing overflows.
  58  *
  59  * Original patch by Dimitry Andric, updated by Ben Dooks
  60 */
  61
  62
  63 /* timer_mask_usec_ticks
  64  *
  65  * given a clock and divisor, make the value to pass into timer_ticks_to_usec
  66  * to scale the ticks into usecs
  67 */
  68
  69 static inline unsigned long
  70 timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk)
  71 {
  72         unsigned long den = pclk / 1000;
  73
  74         return ((1000 << TIMER_USEC_SHIFT) * scaler + (den >> 1)) / den;
  75 }
  76
  77 /* timer_ticks_to_usec
  78  *
  79  * convert timer ticks to usec.
  80 */
  81
  82 static inline unsigned long timer_ticks_to_usec(unsigned long ticks)
  83 {
  84         unsigned long res;
  85
  86         res = ticks * timer_usec_ticks;
  87         res += 1 << (TIMER_USEC_SHIFT - 4);     /* round up slightly */
  88
  89         return res >> TIMER_USEC_SHIFT;
  90 }
  91
  92 /***
  93  * Returns microsecond  since last clock interrupt.  Note that interrupts
  94  * will have been disabled by do_gettimeoffset()
  95  * IRQs are disabled before entering here from do_gettimeofday()
  96  */
  97
  98 static unsigned long s3c2410_gettimeoffset (void)
  99 {
 100         unsigned long tdone;
 101         unsigned long tval;
 102
 103         /* work out how many ticks have gone since last timer interrupt */
 104
 105         tval =  __raw_readl(S3C2410_TCNTO(4));
 106         tdone = timer_startval - tval;
 107
 108         /* check to see if there is an interrupt pending */
 109
 110         if (s3c24xx_ostimer_pending()) {
 111                 /* re-read the timer, and try and fix up for the missed
 112                  * interrupt. Note, the interrupt may go off before the
 113                  * timer has re-loaded from wrapping.
 114                  */
 115
 116                 tval =  __raw_readl(S3C2410_TCNTO(4));
 117                 tdone = timer_startval - tval;
 118
 119                 if (tval != 0)
 120                         tdone += timer_startval;
 121         }
 122
 123         return timer_ticks_to_usec(tdone);
 124 }
 125
 126
 127 /*
 128  * IRQ handler for the timer
 129  */
 130 static irqreturn_t
 131 s3c2410_timer_interrupt(int irq, void *dev_id)
 132 {
 133         timer_tick();
 134         return IRQ_HANDLED;
 135 }
 136
 137 static struct irqaction s3c2410_timer_irq = {
 138         .name           = "S3C2410 Timer Tick",
 139         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
 140         .handler        = s3c2410_timer_interrupt,
 141 };
 142
 143 #define use_tclk1_12() ( \
 144         machine_is_bast()       || \
 145         machine_is_vr1000()     || \
 146         machine_is_anubis()     || \
 147         machine_is_osiris())
 148
 149 static struct clk *tin;
 150 static struct clk *tdiv;
 151 static struct clk *timerclk;
 152
 153 /*
 154  * Set up timer interrupt, and return the current time in seconds.
 155  *
 156  * Currently we only use timer4, as it is the only timer which has no
 157  * other function that can be exploited externally
 158  */
 159 static void s3c2410_timer_setup (void)
 160 {
 161         unsigned long tcon;
 162         unsigned long tcnt;
 163         unsigned long tcfg1;
 164         unsigned long tcfg0;
 165
 166         tcnt = TICK_MAX;  /* default value for tcnt */
 167
 168         /* configure the system for whichever machine is in use */
 169
 170         if (use_tclk1_12()) {
 171                 /* timer is at 12MHz, scaler is 1 */
 172                 timer_usec_ticks = timer_mask_usec_ticks(1, 12000000);
 173                 tcnt = 12000000 / HZ;
 174
 175                 tcfg1 = __raw_readl(S3C2410_TCFG1);
 176                 tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK;
 177                 tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1;
 178                 __raw_writel(tcfg1, S3C2410_TCFG1);
 179         } else {
 180                 unsigned long pclk;
 181                 struct clk *tscaler;
 182
 183                 /* for the h1940 (and others), we use the pclk from the core
 184                  * to generate the timer values. since values around 50 to
 185                  * 70MHz are not values we can directly generate the timer
 186                  * value from, we need to pre-scale and divide before using it.
 187                  *
 188                  * for instance, using 50.7MHz and dividing by 6 gives 8.45MHz
 189                  * (8.45 ticks per usec)
 190                  */
 191
 192                 pclk = clk_get_rate(timerclk);
 193
 194                 /* configure clock tick */
 195
 196                 timer_usec_ticks = timer_mask_usec_ticks(6, pclk);
 197
 198                 tscaler = clk_get_parent(tdiv);
 199
 200                 clk_set_rate(tscaler, pclk / 3);
 201                 clk_set_rate(tdiv, pclk / 6);
 202                 clk_set_parent(tin, tdiv);
 203
 204                 tcnt = clk_get_rate(tin) / HZ;
 205         }
 206
 207         tcon = __raw_readl(S3C2410_TCON);
 208         tcfg0 = __raw_readl(S3C2410_TCFG0);
 209         tcfg1 = __raw_readl(S3C2410_TCFG1);
 210
 211         /* timers reload after counting zero, so reduce the count by 1 */
 212
 213         tcnt--;
 214
 215         printk(KERN_DEBUG "timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n",
 216                tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks);
 217
 218         /* check to see if timer is within 16bit range... */
 219         if (tcnt > TICK_MAX) {
 220                 panic("setup_timer: HZ is too small, cannot configure timer!");
 221                 return;
 222         }
 223
 224         __raw_writel(tcfg1, S3C2410_TCFG1);
 225         __raw_writel(tcfg0, S3C2410_TCFG0);
 226
 227         timer_startval = tcnt;
 228         __raw_writel(tcnt, S3C2410_TCNTB(4));
 229
 230         /* ensure timer is stopped... */
 231
 232         tcon &= ~(7<<20);
 233         tcon |= S3C2410_TCON_T4RELOAD;
 234         tcon |= S3C2410_TCON_T4MANUALUPD;
 235
 236         __raw_writel(tcon, S3C2410_TCON);
 237         __raw_writel(tcnt, S3C2410_TCNTB(4));
 238         __raw_writel(tcnt, S3C2410_TCMPB(4));
 239
 240         /* start the timer running */
 241         tcon |= S3C2410_TCON_T4START;
 242         tcon &= ~S3C2410_TCON_T4MANUALUPD;
 243         __raw_writel(tcon, S3C2410_TCON);
 244 }
 245
 246 static void __init s3c2410_timer_resources(void)
 247 {
 248         struct platform_device tmpdev;
 249
 250         tmpdev.dev.bus = &platform_bus_type;
 251         tmpdev.id = 4;
 252
 253         timerclk = clk_get(NULL, "timers");
 254         if (IS_ERR(timerclk))
 255                 panic("failed to get clock for system timer");
 256
 257         clk_enable(timerclk);
 258
 259         if (!use_tclk1_12()) {
 260                 tmpdev.id = 4;
 261                 tmpdev.dev.init_name = "s3c24xx-pwm.4";
 262                 tin = clk_get(&tmpdev.dev, "pwm-tin");
 263                 if (IS_ERR(tin))
 264                         panic("failed to get pwm-tin clock for system timer");
 265
 266                 tdiv = clk_get(&tmpdev.dev, "pwm-tdiv");
 267                 if (IS_ERR(tdiv))
 268                         panic("failed to get pwm-tdiv clock for system timer");
 269         }
 270
 271         clk_enable(tin);
 272 }
 273
 274 static void __init s3c2410_timer_init(void)
 275 {
 276         s3c2410_timer_resources();
 277         s3c2410_timer_setup();
 278         setup_irq(IRQ_TIMER4, &s3c2410_timer_irq);
 279 }
 280
 281 struct sys_timer s3c24xx_timer = {
 282         .init           = s3c2410_timer_init,
 283         .offset         = s3c2410_gettimeoffset,
 284         .resume         = s3c2410_timer_setup
 285 };