1 /*****************************************************************************/
4 * head.S -- common startup code for ColdFire CPUs.
6 * (C) Copyright 1999-2011, Greg Ungerer <gerg@snapgear.com>.
9 /*****************************************************************************/
11 #include <linux/linkage.h>
12 #include <linux/init.h>
13 #include <asm/asm-offsets.h>
14 #include <asm/coldfire.h>
15 #include <asm/mcfsim.h>
16 #include <asm/mcfmmu.h>
17 #include <asm/thread_info.h>
19 /*****************************************************************************/
22 * If we don't have a fixed memory size, then lets build in code
23 * to auto detect the DRAM size. Obviously this is the preferred
24 * method, and should work for most boards. It won't work for those
25 * that do not have their RAM starting at address 0, and it only
26 * works on SDRAM (not boards fitted with SRAM).
28 #if CONFIG_RAMSIZE != 0
30 movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */
33 #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
34 defined(CONFIG_M5249) || defined(CONFIG_M525x) || \
35 defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
36 defined(CONFIG_M5307) || defined(CONFIG_M5407)
38 * Not all these devices have exactly the same DRAM controller,
39 * but the DCMR register is virtually identical - give or take
40 * a couple of bits. The only exception is the 5272 devices, their
41 * DRAM controller is quite different.
44 movel MCFSIM_DMR0,%d0 /* get mask for 1st bank */
45 btst #0,%d0 /* check if region enabled */
49 addl #0x00040000,%d0 /* convert mask to size */
51 movel MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
52 btst #0,%d1 /* check if region enabled */
57 addl %d1,%d0 /* total mem size in d0 */
61 #elif defined(CONFIG_M5272)
63 movel MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
64 andil #0xfffff000,%d0 /* mask out chip select options */
65 negl %d0 /* negate bits */
68 #elif defined(CONFIG_M520x)
71 movel MCFSIM_SDCS0, %d2 /* Get SDRAM chip select 0 config */
72 andl #0x1f, %d2 /* Get only the chip select size */
73 beq 3f /* Check if it is enabled */
74 addql #1, %d2 /* Form exponent */
76 lsll %d2, %d0 /* 2 ^ exponent */
78 movel MCFSIM_SDCS1, %d2 /* Get SDRAM chip select 1 config */
79 andl #0x1f, %d2 /* Get only the chip select size */
80 beq 4f /* Check if it is enabled */
81 addql #1, %d2 /* Form exponent */
83 lsll %d2, %d1 /* 2 ^ exponent */
84 addl %d1, %d0 /* Total size of SDRAM in d0 */
89 #error "ERROR: I don't know how to probe your boards memory size?"
92 /*****************************************************************************/
95 * Boards and platforms can do specific early hardware setup if
96 * they need to. Most don't need this, define away if not required.
98 #ifndef PLATFORM_SETUP
99 #define PLATFORM_SETUP
102 /*****************************************************************************/
109 #if defined(CONFIG_UBOOT)
113 /*****************************************************************************/
118 * During startup we store away the RAM setup. These are not in the
119 * bss, since their values are determined and written before the bss
130 #if defined(CONFIG_UBOOT)
135 /*****************************************************************************/
142 .global kernel_pg_dir
143 .equ kernel_pg_dir,_start0
144 .equ .,_start0+0x1000
148 * This is the codes first entry point. This is where it all
154 movew #0x2700, %sr /* no interrupts */
155 movel #CACHE_INIT,%d0 /* disable cache */
158 #if defined(CONFIG_UBOOT)
159 movel %sp,_init_sp /* save initial stack pointer */
162 movel #CONFIG_MBAR+1,%d0 /* configured MBAR address */
163 movec %d0,%MBAR /* set it */
167 * Do any platform or board specific setup now. Most boards
168 * don't need anything. Those exceptions are define this in
169 * their board specific includes.
174 * Create basic memory configuration. Set VBR accordingly,
177 movel #CONFIG_VECTORBASE,%a7
178 movec %a7,%VBR /* set vectors addr */
181 movel #CONFIG_RAMBASE,%a7 /* mark the base of RAM */
184 GET_MEM_SIZE /* macro code determines size */
186 movel %d0,_ramend /* set end ram addr */
189 * Now that we know what the memory is, lets enable cache
190 * and get things moving. This is Coldfire CPU specific. Not
191 * all version cores have identical cache register setup. But
192 * it is very similar. Define the exact settings in the headers
193 * then the code here is the same for all.
195 movel #ACR0_MODE,%d0 /* set RAM region for caching */
197 movel #ACR1_MODE,%d0 /* anything else to cache? */
205 movel #CACHE_MODE,%d0 /* enable cache */
211 * Identity mapping for the kernel region.
213 movel #(MMUBASE+1),%d0 /* enable MMUBAR registers */
215 movel #MMUOR_CA,%d0 /* clear TLB entries */
217 movel #0,%d0 /* set ASID to 0 */
220 movel #MMUCR_EN,%d0 /* Enable the identity map */
222 nop /* sync i-pipeline */
224 movel #_vstart,%a0 /* jump to "virtual" space */
227 #endif /* CONFIG_MMU */
229 #ifdef CONFIG_ROMFS_FS
231 * Move ROM filesystem above bss :-)
233 lea __bss_start,%a0 /* get start of bss */
234 lea __bss_stop,%a1 /* set up destination */
235 movel %a0,%a2 /* copy of bss start */
237 movel 8(%a0),%d0 /* get size of ROMFS */
238 addql #8,%d0 /* allow for rounding */
239 andl #0xfffffffc, %d0 /* whole words */
241 addl %d0,%a0 /* copy from end */
242 addl %d0,%a1 /* copy from end */
243 movel %a1,_ramstart /* set start of ram */
246 movel -(%a0),%d0 /* copy dword */
248 cmpl %a0,%a2 /* check if at end */
251 #else /* CONFIG_ROMFS_FS */
254 #endif /* CONFIG_ROMFS_FS */
258 * Zero out the bss region.
260 lea __bss_start,%a0 /* get start of bss */
261 lea __bss_stop,%a1 /* get end of bss */
262 clrl %d0 /* set value */
264 movel %d0,(%a0)+ /* clear each word */
265 cmpl %a0,%a1 /* check if at end */
269 * Load the current task pointer and stack.
271 lea init_thread_union,%a0
272 lea THREAD_SIZE(%a0),%sp
278 .global m68k_machtype
279 movel #CPU_COLDFIRE,%d0
280 movel %d0,m68k_cputype /* Mark us as a ColdFire */
281 movel #MMU_COLDFIRE,%d0
282 movel %d0,m68k_mmutype
283 movel #FPU_COLDFIRE,%d0
284 movel %d0,m68k_fputype
285 movel #MACH_M54XX,%d0
286 movel %d0,m68k_machtype /* Mark us as a 54xx machine */
287 lea init_task,%a2 /* Set "current" init task */
291 * Assember start up done, start code proper.
293 jsr start_kernel /* start Linux kernel */
296 jmp _exit /* should never get here */
298 /*****************************************************************************/