x86, efi: Set runtime_version to the EFI spec revision
[linux/fpc-iii.git] / arch / m68k / platform / coldfire / m5249.c
blobc80b5e51d29afb9c264fa2963cebb34e6f2dc3c7
1 /***************************************************************************/
3 /*
4 * linux/arch/m68knommu/platform/5249/config.c
6 * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
7 */
9 /***************************************************************************/
11 #include <linux/kernel.h>
12 #include <linux/param.h>
13 #include <linux/init.h>
14 #include <linux/io.h>
15 #include <linux/platform_device.h>
16 #include <asm/machdep.h>
17 #include <asm/coldfire.h>
18 #include <asm/mcfsim.h>
19 #include <asm/mcfclk.h>
21 /***************************************************************************/
23 DEFINE_CLK(pll, "pll.0", MCF_CLK);
24 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
25 DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
26 DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
27 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
28 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
30 struct clk *mcf_clks[] = {
31 &clk_pll,
32 &clk_sys,
33 &clk_mcftmr0,
34 &clk_mcftmr1,
35 &clk_mcfuart0,
36 &clk_mcfuart1,
37 NULL
40 /***************************************************************************/
42 #ifdef CONFIG_M5249C3
44 static struct resource m5249_smc91x_resources[] = {
46 .start = 0xe0000300,
47 .end = 0xe0000300 + 0x100,
48 .flags = IORESOURCE_MEM,
51 .start = MCF_IRQ_GPIO6,
52 .end = MCF_IRQ_GPIO6,
53 .flags = IORESOURCE_IRQ,
57 static struct platform_device m5249_smc91x = {
58 .name = "smc91x",
59 .id = 0,
60 .num_resources = ARRAY_SIZE(m5249_smc91x_resources),
61 .resource = m5249_smc91x_resources,
64 #endif /* CONFIG_M5249C3 */
66 static struct platform_device *m5249_devices[] __initdata = {
67 #ifdef CONFIG_M5249C3
68 &m5249_smc91x,
69 #endif
72 /***************************************************************************/
74 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
76 static void __init m5249_qspi_init(void)
78 /* QSPI irq setup */
79 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
80 MCFSIM_QSPIICR);
81 mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
84 #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
86 /***************************************************************************/
88 #ifdef CONFIG_M5249C3
90 static void __init m5249_smc91x_init(void)
92 u32 gpio;
94 /* Set the GPIO line as interrupt source for smc91x device */
95 gpio = readl(MCFSIM2_GPIOINTENABLE);
96 writel(gpio | 0x40, MCFSIM2_GPIOINTENABLE);
98 gpio = readl(MCFINTC2_INTPRI5);
99 writel(gpio | 0x04000000, MCFINTC2_INTPRI5);
102 #endif /* CONFIG_M5249C3 */
104 /***************************************************************************/
106 void __init config_BSP(char *commandp, int size)
108 mach_sched_init = hw_timer_init;
110 #ifdef CONFIG_M5249C3
111 m5249_smc91x_init();
112 #endif
113 #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
114 m5249_qspi_init();
115 #endif
118 /***************************************************************************/
120 static int __init init_BSP(void)
122 platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
123 return 0;
126 arch_initcall(init_BSP);
128 /***************************************************************************/