b43: silence a bogus gcc warning
[linux/fpc-iii.git] / drivers / mtd / maps / ck804xrom.c
blob688ef495888a6ba1efeef5ccff6f9a9646c4a102
1 /*
2 * ck804xrom.c
4 * Normal mappings of chips in physical memory
6 * Dave Olsen <dolsen@lnxi.com>
7 * Ryan Jackson <rjackson@lnxi.com>
8 */
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/version.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <asm/io.h>
16 #include <linux/mtd/mtd.h>
17 #include <linux/mtd/map.h>
18 #include <linux/mtd/cfi.h>
19 #include <linux/mtd/flashchip.h>
20 #include <linux/pci.h>
21 #include <linux/pci_ids.h>
22 #include <linux/list.h>
25 #define MOD_NAME KBUILD_BASENAME
27 #define ADDRESS_NAME_LEN 18
29 #define ROM_PROBE_STEP_SIZE (64*1024)
31 struct ck804xrom_window {
32 void __iomem *virt;
33 unsigned long phys;
34 unsigned long size;
35 struct list_head maps;
36 struct resource rsrc;
37 struct pci_dev *pdev;
40 struct ck804xrom_map_info {
41 struct list_head list;
42 struct map_info map;
43 struct mtd_info *mtd;
44 struct resource rsrc;
45 char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
49 /* The 2 bits controlling the window size are often set to allow reading
50 * the BIOS, but too small to allow writing, since the lock registers are
51 * 4MiB lower in the address space than the data.
53 * This is intended to prevent flashing the bios, perhaps accidentally.
55 * This parameter allows the normal driver to override the BIOS settings.
57 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
58 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
59 * 64KiB window.
62 static uint win_size_bits = 0;
63 module_param(win_size_bits, uint, 0);
64 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x88 byte, normally set by BIOS.");
66 static struct ck804xrom_window ck804xrom_window = {
67 .maps = LIST_HEAD_INIT(ck804xrom_window.maps),
70 static void ck804xrom_cleanup(struct ck804xrom_window *window)
72 struct ck804xrom_map_info *map, *scratch;
73 u8 byte;
75 if (window->pdev) {
76 /* Disable writes through the rom window */
77 pci_read_config_byte(window->pdev, 0x6d, &byte);
78 pci_write_config_byte(window->pdev, 0x6d, byte & ~1);
81 /* Free all of the mtd devices */
82 list_for_each_entry_safe(map, scratch, &window->maps, list) {
83 if (map->rsrc.parent)
84 release_resource(&map->rsrc);
86 del_mtd_device(map->mtd);
87 map_destroy(map->mtd);
88 list_del(&map->list);
89 kfree(map);
91 if (window->rsrc.parent)
92 release_resource(&window->rsrc);
94 if (window->virt) {
95 iounmap(window->virt);
96 window->virt = NULL;
97 window->phys = 0;
98 window->size = 0;
100 pci_dev_put(window->pdev);
104 static int __devinit ck804xrom_init_one (struct pci_dev *pdev,
105 const struct pci_device_id *ent)
107 static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
108 u8 byte;
109 struct ck804xrom_window *window = &ck804xrom_window;
110 struct ck804xrom_map_info *map = NULL;
111 unsigned long map_top;
113 /* Remember the pci dev I find the window in */
114 window->pdev = pci_dev_get(pdev);
116 /* Enable the selected rom window. This is often incorrectly
117 * set up by the BIOS, and the 4MiB offset for the lock registers
118 * requires the full 5MiB of window space.
120 * This 'write, then read' approach leaves the bits for
121 * other uses of the hardware info.
123 pci_read_config_byte(pdev, 0x88, &byte);
124 pci_write_config_byte(pdev, 0x88, byte | win_size_bits );
127 /* Assume the rom window is properly setup, and find it's size */
128 pci_read_config_byte(pdev, 0x88, &byte);
130 if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6)))
131 window->phys = 0xffb00000; /* 5MiB */
132 else if ((byte & (1<<7)) == (1<<7))
133 window->phys = 0xffc00000; /* 4MiB */
134 else
135 window->phys = 0xffff0000; /* 64KiB */
137 window->size = 0xffffffffUL - window->phys + 1UL;
140 * Try to reserve the window mem region. If this fails then
141 * it is likely due to a fragment of the window being
142 * "reserved" by the BIOS. In the case that the
143 * request_mem_region() fails then once the rom size is
144 * discovered we will try to reserve the unreserved fragment.
146 window->rsrc.name = MOD_NAME;
147 window->rsrc.start = window->phys;
148 window->rsrc.end = window->phys + window->size - 1;
149 window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
150 if (request_resource(&iomem_resource, &window->rsrc)) {
151 window->rsrc.parent = NULL;
152 printk(KERN_ERR MOD_NAME
153 " %s(): Unable to register resource"
154 " 0x%.016llx-0x%.016llx - kernel bug?\n",
155 __func__,
156 (unsigned long long)window->rsrc.start,
157 (unsigned long long)window->rsrc.end);
161 /* Enable writes through the rom window */
162 pci_read_config_byte(pdev, 0x6d, &byte);
163 pci_write_config_byte(pdev, 0x6d, byte | 1);
165 /* FIXME handle registers 0x80 - 0x8C the bios region locks */
167 /* For write accesses caches are useless */
168 window->virt = ioremap_nocache(window->phys, window->size);
169 if (!window->virt) {
170 printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
171 window->phys, window->size);
172 goto out;
175 /* Get the first address to look for a rom chip at */
176 map_top = window->phys;
177 #if 1
178 /* The probe sequence run over the firmware hub lock
179 * registers sets them to 0x7 (no access).
180 * Probe at most the last 4MiB of the address space.
182 if (map_top < 0xffc00000)
183 map_top = 0xffc00000;
184 #endif
185 /* Loop through and look for rom chips. Since we don't know the
186 * starting address for each chip, probe every ROM_PROBE_STEP_SIZE
187 * bytes from the starting address of the window.
189 while((map_top - 1) < 0xffffffffUL) {
190 struct cfi_private *cfi;
191 unsigned long offset;
192 int i;
194 if (!map)
195 map = kmalloc(sizeof(*map), GFP_KERNEL);
197 if (!map) {
198 printk(KERN_ERR MOD_NAME ": kmalloc failed");
199 goto out;
201 memset(map, 0, sizeof(*map));
202 INIT_LIST_HEAD(&map->list);
203 map->map.name = map->map_name;
204 map->map.phys = map_top;
205 offset = map_top - window->phys;
206 map->map.virt = (void __iomem *)
207 (((unsigned long)(window->virt)) + offset);
208 map->map.size = 0xffffffffUL - map_top + 1UL;
209 /* Set the name of the map to the address I am trying */
210 sprintf(map->map_name, "%s @%08Lx",
211 MOD_NAME, (unsigned long long)map->map.phys);
213 /* There is no generic VPP support */
214 for(map->map.bankwidth = 32; map->map.bankwidth;
215 map->map.bankwidth >>= 1)
217 char **probe_type;
218 /* Skip bankwidths that are not supported */
219 if (!map_bankwidth_supported(map->map.bankwidth))
220 continue;
222 /* Setup the map methods */
223 simple_map_init(&map->map);
225 /* Try all of the probe methods */
226 probe_type = rom_probe_types;
227 for(; *probe_type; probe_type++) {
228 map->mtd = do_map_probe(*probe_type, &map->map);
229 if (map->mtd)
230 goto found;
233 map_top += ROM_PROBE_STEP_SIZE;
234 continue;
235 found:
236 /* Trim the size if we are larger than the map */
237 if (map->mtd->size > map->map.size) {
238 printk(KERN_WARNING MOD_NAME
239 " rom(%u) larger than window(%lu). fixing...\n",
240 map->mtd->size, map->map.size);
241 map->mtd->size = map->map.size;
243 if (window->rsrc.parent) {
245 * Registering the MTD device in iomem may not be possible
246 * if there is a BIOS "reserved" and BUSY range. If this
247 * fails then continue anyway.
249 map->rsrc.name = map->map_name;
250 map->rsrc.start = map->map.phys;
251 map->rsrc.end = map->map.phys + map->mtd->size - 1;
252 map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
253 if (request_resource(&window->rsrc, &map->rsrc)) {
254 printk(KERN_ERR MOD_NAME
255 ": cannot reserve MTD resource\n");
256 map->rsrc.parent = NULL;
260 /* Make the whole region visible in the map */
261 map->map.virt = window->virt;
262 map->map.phys = window->phys;
263 cfi = map->map.fldrv_priv;
264 for(i = 0; i < cfi->numchips; i++)
265 cfi->chips[i].start += offset;
267 /* Now that the mtd devices is complete claim and export it */
268 map->mtd->owner = THIS_MODULE;
269 if (add_mtd_device(map->mtd)) {
270 map_destroy(map->mtd);
271 map->mtd = NULL;
272 goto out;
276 /* Calculate the new value of map_top */
277 map_top += map->mtd->size;
279 /* File away the map structure */
280 list_add(&map->list, &window->maps);
281 map = NULL;
284 out:
285 /* Free any left over map structures */
286 if (map)
287 kfree(map);
289 /* See if I have any map structures */
290 if (list_empty(&window->maps)) {
291 ck804xrom_cleanup(window);
292 return -ENODEV;
294 return 0;
298 static void __devexit ck804xrom_remove_one (struct pci_dev *pdev)
300 struct ck804xrom_window *window = &ck804xrom_window;
302 ck804xrom_cleanup(window);
305 static struct pci_device_id ck804xrom_pci_tbl[] = {
306 { PCI_VENDOR_ID_NVIDIA, 0x0051,
307 PCI_ANY_ID, PCI_ANY_ID, }, /* nvidia ck804 */
308 { 0, }
311 MODULE_DEVICE_TABLE(pci, ck804xrom_pci_tbl);
313 #if 0
314 static struct pci_driver ck804xrom_driver = {
315 .name = MOD_NAME,
316 .id_table = ck804xrom_pci_tbl,
317 .probe = ck804xrom_init_one,
318 .remove = ck804xrom_remove_one,
320 #endif
322 static int __init init_ck804xrom(void)
324 struct pci_dev *pdev;
325 struct pci_device_id *id;
326 int retVal;
327 pdev = NULL;
329 for(id = ck804xrom_pci_tbl; id->vendor; id++) {
330 pdev = pci_get_device(id->vendor, id->device, NULL);
331 if (pdev)
332 break;
334 if (pdev) {
335 retVal = ck804xrom_init_one(pdev, &ck804xrom_pci_tbl[0]);
336 pci_dev_put(pdev);
337 return retVal;
339 return -ENXIO;
340 #if 0
341 return pci_register_driver(&ck804xrom_driver);
342 #endif
345 static void __exit cleanup_ck804xrom(void)
347 ck804xrom_remove_one(ck804xrom_window.pdev);
350 module_init(init_ck804xrom);
351 module_exit(cleanup_ck804xrom);
353 MODULE_LICENSE("GPL");
354 MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>, Dave Olsen <dolsen@lnxi.com>");
355 MODULE_DESCRIPTION("MTD map driver for BIOS chips on the Nvidia ck804 southbridge");