2 * PCA953x 4/8/16/24/40 bit I/O ports
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/acpi.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
26 #include <asm/unaligned.h>
28 #define PCA953X_INPUT 0
29 #define PCA953X_OUTPUT 1
30 #define PCA953X_INVERT 2
31 #define PCA953X_DIRECTION 3
33 #define REG_ADDR_AI 0x80
36 #define PCA957X_INVRT 1
37 #define PCA957X_BKEN 2
38 #define PCA957X_PUPD 3
42 #define PCA957X_INTS 7
44 #define PCAL953X_IN_LATCH 34
45 #define PCAL953X_INT_MASK 37
46 #define PCAL953X_INT_STAT 38
48 #define PCA_GPIO_MASK 0x00FF
49 #define PCA_INT 0x0100
50 #define PCA_PCAL 0x0200
51 #define PCA953X_TYPE 0x1000
52 #define PCA957X_TYPE 0x2000
53 #define PCA_TYPE_MASK 0xF000
55 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
57 static const struct i2c_device_id pca953x_id
[] = {
58 { "pca9505", 40 | PCA953X_TYPE
| PCA_INT
, },
59 { "pca9534", 8 | PCA953X_TYPE
| PCA_INT
, },
60 { "pca9535", 16 | PCA953X_TYPE
| PCA_INT
, },
61 { "pca9536", 4 | PCA953X_TYPE
, },
62 { "pca9537", 4 | PCA953X_TYPE
| PCA_INT
, },
63 { "pca9538", 8 | PCA953X_TYPE
| PCA_INT
, },
64 { "pca9539", 16 | PCA953X_TYPE
| PCA_INT
, },
65 { "pca9554", 8 | PCA953X_TYPE
| PCA_INT
, },
66 { "pca9555", 16 | PCA953X_TYPE
| PCA_INT
, },
67 { "pca9556", 8 | PCA953X_TYPE
, },
68 { "pca9557", 8 | PCA953X_TYPE
, },
69 { "pca9574", 8 | PCA957X_TYPE
| PCA_INT
, },
70 { "pca9575", 16 | PCA957X_TYPE
| PCA_INT
, },
71 { "pca9698", 40 | PCA953X_TYPE
, },
73 { "pcal6524", 24 | PCA953X_TYPE
| PCA_INT
| PCA_PCAL
, },
74 { "pcal9555a", 16 | PCA953X_TYPE
| PCA_INT
| PCA_PCAL
, },
76 { "max7310", 8 | PCA953X_TYPE
, },
77 { "max7312", 16 | PCA953X_TYPE
| PCA_INT
, },
78 { "max7313", 16 | PCA953X_TYPE
| PCA_INT
, },
79 { "max7315", 8 | PCA953X_TYPE
| PCA_INT
, },
80 { "max7318", 16 | PCA953X_TYPE
| PCA_INT
, },
81 { "pca6107", 8 | PCA953X_TYPE
| PCA_INT
, },
82 { "tca6408", 8 | PCA953X_TYPE
| PCA_INT
, },
83 { "tca6416", 16 | PCA953X_TYPE
| PCA_INT
, },
84 { "tca6424", 24 | PCA953X_TYPE
| PCA_INT
, },
85 { "tca9539", 16 | PCA953X_TYPE
| PCA_INT
, },
86 { "tca9554", 8 | PCA953X_TYPE
| PCA_INT
, },
87 { "xra1202", 8 | PCA953X_TYPE
},
90 MODULE_DEVICE_TABLE(i2c
, pca953x_id
);
92 static const struct acpi_device_id pca953x_acpi_ids
[] = {
93 { "INT3491", 16 | PCA953X_TYPE
| PCA_INT
| PCA_PCAL
, },
96 MODULE_DEVICE_TABLE(acpi
, pca953x_acpi_ids
);
101 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
103 struct pca953x_reg_config
{
109 static const struct pca953x_reg_config pca953x_regs
= {
110 .direction
= PCA953X_DIRECTION
,
111 .output
= PCA953X_OUTPUT
,
112 .input
= PCA953X_INPUT
,
115 static const struct pca953x_reg_config pca957x_regs
= {
116 .direction
= PCA957X_CFG
,
117 .output
= PCA957X_OUT
,
121 struct pca953x_chip
{
123 u8 reg_output
[MAX_BANK
];
124 u8 reg_direction
[MAX_BANK
];
125 struct mutex i2c_lock
;
127 #ifdef CONFIG_GPIO_PCA953X_IRQ
128 struct mutex irq_lock
;
129 u8 irq_mask
[MAX_BANK
];
130 u8 irq_stat
[MAX_BANK
];
131 u8 irq_trig_raise
[MAX_BANK
];
132 u8 irq_trig_fall
[MAX_BANK
];
135 struct i2c_client
*client
;
136 struct gpio_chip gpio_chip
;
137 const char *const *names
;
138 unsigned long driver_data
;
139 struct regulator
*regulator
;
141 const struct pca953x_reg_config
*regs
;
143 int (*write_regs
)(struct pca953x_chip
*, int, u8
*);
144 int (*read_regs
)(struct pca953x_chip
*, int, u8
*);
147 static int pca953x_read_single(struct pca953x_chip
*chip
, int reg
, u32
*val
,
151 int bank_shift
= fls((chip
->gpio_chip
.ngpio
- 1) / BANK_SZ
);
152 int offset
= off
/ BANK_SZ
;
154 ret
= i2c_smbus_read_byte_data(chip
->client
,
155 (reg
<< bank_shift
) + offset
);
159 dev_err(&chip
->client
->dev
, "failed reading register\n");
166 static int pca953x_write_single(struct pca953x_chip
*chip
, int reg
, u32 val
,
170 int bank_shift
= fls((chip
->gpio_chip
.ngpio
- 1) / BANK_SZ
);
171 int offset
= off
/ BANK_SZ
;
173 ret
= i2c_smbus_write_byte_data(chip
->client
,
174 (reg
<< bank_shift
) + offset
, val
);
177 dev_err(&chip
->client
->dev
, "failed writing register\n");
184 static int pca953x_write_regs_8(struct pca953x_chip
*chip
, int reg
, u8
*val
)
186 return i2c_smbus_write_byte_data(chip
->client
, reg
, *val
);
189 static int pca953x_write_regs_16(struct pca953x_chip
*chip
, int reg
, u8
*val
)
191 u16 word
= get_unaligned((u16
*)val
);
193 return i2c_smbus_write_word_data(chip
->client
, reg
<< 1, word
);
196 static int pca957x_write_regs_16(struct pca953x_chip
*chip
, int reg
, u8
*val
)
200 ret
= i2c_smbus_write_byte_data(chip
->client
, reg
<< 1, val
[0]);
204 return i2c_smbus_write_byte_data(chip
->client
, (reg
<< 1) + 1, val
[1]);
207 static int pca953x_write_regs_24(struct pca953x_chip
*chip
, int reg
, u8
*val
)
209 int bank_shift
= fls((chip
->gpio_chip
.ngpio
- 1) / BANK_SZ
);
211 return i2c_smbus_write_i2c_block_data(chip
->client
,
212 (reg
<< bank_shift
) | REG_ADDR_AI
,
216 static int pca953x_write_regs(struct pca953x_chip
*chip
, int reg
, u8
*val
)
220 ret
= chip
->write_regs(chip
, reg
, val
);
222 dev_err(&chip
->client
->dev
, "failed writing register\n");
229 static int pca953x_read_regs_8(struct pca953x_chip
*chip
, int reg
, u8
*val
)
233 ret
= i2c_smbus_read_byte_data(chip
->client
, reg
);
239 static int pca953x_read_regs_16(struct pca953x_chip
*chip
, int reg
, u8
*val
)
243 ret
= i2c_smbus_read_word_data(chip
->client
, reg
<< 1);
244 put_unaligned(ret
, (u16
*)val
);
249 static int pca953x_read_regs_24(struct pca953x_chip
*chip
, int reg
, u8
*val
)
251 int bank_shift
= fls((chip
->gpio_chip
.ngpio
- 1) / BANK_SZ
);
253 return i2c_smbus_read_i2c_block_data(chip
->client
,
254 (reg
<< bank_shift
) | REG_ADDR_AI
,
258 static int pca953x_read_regs(struct pca953x_chip
*chip
, int reg
, u8
*val
)
262 ret
= chip
->read_regs(chip
, reg
, val
);
264 dev_err(&chip
->client
->dev
, "failed reading register\n");
271 static int pca953x_gpio_direction_input(struct gpio_chip
*gc
, unsigned off
)
273 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
277 mutex_lock(&chip
->i2c_lock
);
278 reg_val
= chip
->reg_direction
[off
/ BANK_SZ
] | (1u << (off
% BANK_SZ
));
280 ret
= pca953x_write_single(chip
, chip
->regs
->direction
, reg_val
, off
);
284 chip
->reg_direction
[off
/ BANK_SZ
] = reg_val
;
286 mutex_unlock(&chip
->i2c_lock
);
290 static int pca953x_gpio_direction_output(struct gpio_chip
*gc
,
291 unsigned off
, int val
)
293 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
297 mutex_lock(&chip
->i2c_lock
);
298 /* set output level */
300 reg_val
= chip
->reg_output
[off
/ BANK_SZ
]
301 | (1u << (off
% BANK_SZ
));
303 reg_val
= chip
->reg_output
[off
/ BANK_SZ
]
304 & ~(1u << (off
% BANK_SZ
));
306 ret
= pca953x_write_single(chip
, chip
->regs
->output
, reg_val
, off
);
310 chip
->reg_output
[off
/ BANK_SZ
] = reg_val
;
313 reg_val
= chip
->reg_direction
[off
/ BANK_SZ
] & ~(1u << (off
% BANK_SZ
));
314 ret
= pca953x_write_single(chip
, chip
->regs
->direction
, reg_val
, off
);
318 chip
->reg_direction
[off
/ BANK_SZ
] = reg_val
;
320 mutex_unlock(&chip
->i2c_lock
);
324 static int pca953x_gpio_get_value(struct gpio_chip
*gc
, unsigned off
)
326 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
330 mutex_lock(&chip
->i2c_lock
);
331 ret
= pca953x_read_single(chip
, chip
->regs
->input
, ®_val
, off
);
332 mutex_unlock(&chip
->i2c_lock
);
334 /* NOTE: diagnostic already emitted; that's all we should
335 * do unless gpio_*_value_cansleep() calls become different
336 * from their nonsleeping siblings (and report faults).
341 return (reg_val
& (1u << (off
% BANK_SZ
))) ? 1 : 0;
344 static void pca953x_gpio_set_value(struct gpio_chip
*gc
, unsigned off
, int val
)
346 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
350 mutex_lock(&chip
->i2c_lock
);
352 reg_val
= chip
->reg_output
[off
/ BANK_SZ
]
353 | (1u << (off
% BANK_SZ
));
355 reg_val
= chip
->reg_output
[off
/ BANK_SZ
]
356 & ~(1u << (off
% BANK_SZ
));
358 ret
= pca953x_write_single(chip
, chip
->regs
->output
, reg_val
, off
);
362 chip
->reg_output
[off
/ BANK_SZ
] = reg_val
;
364 mutex_unlock(&chip
->i2c_lock
);
367 static int pca953x_gpio_get_direction(struct gpio_chip
*gc
, unsigned off
)
369 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
373 mutex_lock(&chip
->i2c_lock
);
374 ret
= pca953x_read_single(chip
, chip
->regs
->direction
, ®_val
, off
);
375 mutex_unlock(&chip
->i2c_lock
);
379 return !!(reg_val
& (1u << (off
% BANK_SZ
)));
382 static void pca953x_gpio_set_multiple(struct gpio_chip
*gc
,
383 unsigned long *mask
, unsigned long *bits
)
385 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
386 unsigned int bank_mask
, bank_val
;
387 int bank_shift
, bank
;
388 u8 reg_val
[MAX_BANK
];
391 bank_shift
= fls((chip
->gpio_chip
.ngpio
- 1) / BANK_SZ
);
393 mutex_lock(&chip
->i2c_lock
);
394 memcpy(reg_val
, chip
->reg_output
, NBANK(chip
));
395 for (bank
= 0; bank
< NBANK(chip
); bank
++) {
396 bank_mask
= mask
[bank
/ sizeof(*mask
)] >>
397 ((bank
% sizeof(*mask
)) * 8);
399 bank_val
= bits
[bank
/ sizeof(*bits
)] >>
400 ((bank
% sizeof(*bits
)) * 8);
401 bank_val
&= bank_mask
;
402 reg_val
[bank
] = (reg_val
[bank
] & ~bank_mask
) | bank_val
;
406 ret
= i2c_smbus_write_i2c_block_data(chip
->client
,
407 chip
->regs
->output
<< bank_shift
,
408 NBANK(chip
), reg_val
);
412 memcpy(chip
->reg_output
, reg_val
, NBANK(chip
));
414 mutex_unlock(&chip
->i2c_lock
);
417 static void pca953x_setup_gpio(struct pca953x_chip
*chip
, int gpios
)
419 struct gpio_chip
*gc
;
421 gc
= &chip
->gpio_chip
;
423 gc
->direction_input
= pca953x_gpio_direction_input
;
424 gc
->direction_output
= pca953x_gpio_direction_output
;
425 gc
->get
= pca953x_gpio_get_value
;
426 gc
->set
= pca953x_gpio_set_value
;
427 gc
->get_direction
= pca953x_gpio_get_direction
;
428 gc
->set_multiple
= pca953x_gpio_set_multiple
;
429 gc
->can_sleep
= true;
431 gc
->base
= chip
->gpio_start
;
433 gc
->label
= chip
->client
->name
;
434 gc
->parent
= &chip
->client
->dev
;
435 gc
->owner
= THIS_MODULE
;
436 gc
->names
= chip
->names
;
439 #ifdef CONFIG_GPIO_PCA953X_IRQ
440 static void pca953x_irq_mask(struct irq_data
*d
)
442 struct gpio_chip
*gc
= irq_data_get_irq_chip_data(d
);
443 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
445 chip
->irq_mask
[d
->hwirq
/ BANK_SZ
] &= ~(1 << (d
->hwirq
% BANK_SZ
));
448 static void pca953x_irq_unmask(struct irq_data
*d
)
450 struct gpio_chip
*gc
= irq_data_get_irq_chip_data(d
);
451 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
453 chip
->irq_mask
[d
->hwirq
/ BANK_SZ
] |= 1 << (d
->hwirq
% BANK_SZ
);
456 static void pca953x_irq_bus_lock(struct irq_data
*d
)
458 struct gpio_chip
*gc
= irq_data_get_irq_chip_data(d
);
459 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
461 mutex_lock(&chip
->irq_lock
);
464 static void pca953x_irq_bus_sync_unlock(struct irq_data
*d
)
466 struct gpio_chip
*gc
= irq_data_get_irq_chip_data(d
);
467 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
470 u8 invert_irq_mask
[MAX_BANK
];
472 if (chip
->driver_data
& PCA_PCAL
) {
473 /* Enable latch on interrupt-enabled inputs */
474 pca953x_write_regs(chip
, PCAL953X_IN_LATCH
, chip
->irq_mask
);
476 for (i
= 0; i
< NBANK(chip
); i
++)
477 invert_irq_mask
[i
] = ~chip
->irq_mask
[i
];
479 /* Unmask enabled interrupts */
480 pca953x_write_regs(chip
, PCAL953X_INT_MASK
, invert_irq_mask
);
483 /* Look for any newly setup interrupt */
484 for (i
= 0; i
< NBANK(chip
); i
++) {
485 new_irqs
= chip
->irq_trig_fall
[i
] | chip
->irq_trig_raise
[i
];
486 new_irqs
&= ~chip
->reg_direction
[i
];
489 level
= __ffs(new_irqs
);
490 pca953x_gpio_direction_input(&chip
->gpio_chip
,
491 level
+ (BANK_SZ
* i
));
492 new_irqs
&= ~(1 << level
);
496 mutex_unlock(&chip
->irq_lock
);
499 static int pca953x_irq_set_type(struct irq_data
*d
, unsigned int type
)
501 struct gpio_chip
*gc
= irq_data_get_irq_chip_data(d
);
502 struct pca953x_chip
*chip
= gpiochip_get_data(gc
);
503 int bank_nb
= d
->hwirq
/ BANK_SZ
;
504 u8 mask
= 1 << (d
->hwirq
% BANK_SZ
);
506 if (!(type
& IRQ_TYPE_EDGE_BOTH
)) {
507 dev_err(&chip
->client
->dev
, "irq %d: unsupported type %d\n",
512 if (type
& IRQ_TYPE_EDGE_FALLING
)
513 chip
->irq_trig_fall
[bank_nb
] |= mask
;
515 chip
->irq_trig_fall
[bank_nb
] &= ~mask
;
517 if (type
& IRQ_TYPE_EDGE_RISING
)
518 chip
->irq_trig_raise
[bank_nb
] |= mask
;
520 chip
->irq_trig_raise
[bank_nb
] &= ~mask
;
525 static struct irq_chip pca953x_irq_chip
= {
527 .irq_mask
= pca953x_irq_mask
,
528 .irq_unmask
= pca953x_irq_unmask
,
529 .irq_bus_lock
= pca953x_irq_bus_lock
,
530 .irq_bus_sync_unlock
= pca953x_irq_bus_sync_unlock
,
531 .irq_set_type
= pca953x_irq_set_type
,
534 static bool pca953x_irq_pending(struct pca953x_chip
*chip
, u8
*pending
)
536 u8 cur_stat
[MAX_BANK
];
537 u8 old_stat
[MAX_BANK
];
538 bool pending_seen
= false;
539 bool trigger_seen
= false;
540 u8 trigger
[MAX_BANK
];
543 if (chip
->driver_data
& PCA_PCAL
) {
544 /* Read the current interrupt status from the device */
545 ret
= pca953x_read_regs(chip
, PCAL953X_INT_STAT
, trigger
);
549 /* Check latched inputs and clear interrupt status */
550 ret
= pca953x_read_regs(chip
, PCA953X_INPUT
, cur_stat
);
554 for (i
= 0; i
< NBANK(chip
); i
++) {
555 /* Apply filter for rising/falling edge selection */
556 pending
[i
] = (~cur_stat
[i
] & chip
->irq_trig_fall
[i
]) |
557 (cur_stat
[i
] & chip
->irq_trig_raise
[i
]);
558 pending
[i
] &= trigger
[i
];
566 ret
= pca953x_read_regs(chip
, chip
->regs
->input
, cur_stat
);
570 /* Remove output pins from the equation */
571 for (i
= 0; i
< NBANK(chip
); i
++)
572 cur_stat
[i
] &= chip
->reg_direction
[i
];
574 memcpy(old_stat
, chip
->irq_stat
, NBANK(chip
));
576 for (i
= 0; i
< NBANK(chip
); i
++) {
577 trigger
[i
] = (cur_stat
[i
] ^ old_stat
[i
]) & chip
->irq_mask
[i
];
585 memcpy(chip
->irq_stat
, cur_stat
, NBANK(chip
));
587 for (i
= 0; i
< NBANK(chip
); i
++) {
588 pending
[i
] = (old_stat
[i
] & chip
->irq_trig_fall
[i
]) |
589 (cur_stat
[i
] & chip
->irq_trig_raise
[i
]);
590 pending
[i
] &= trigger
[i
];
598 static irqreturn_t
pca953x_irq_handler(int irq
, void *devid
)
600 struct pca953x_chip
*chip
= devid
;
601 u8 pending
[MAX_BANK
];
603 unsigned nhandled
= 0;
606 if (!pca953x_irq_pending(chip
, pending
))
609 for (i
= 0; i
< NBANK(chip
); i
++) {
611 level
= __ffs(pending
[i
]);
612 handle_nested_irq(irq_find_mapping(chip
->gpio_chip
.irq
.domain
,
613 level
+ (BANK_SZ
* i
)));
614 pending
[i
] &= ~(1 << level
);
619 return (nhandled
> 0) ? IRQ_HANDLED
: IRQ_NONE
;
622 static int pca953x_irq_setup(struct pca953x_chip
*chip
,
625 struct i2c_client
*client
= chip
->client
;
628 if (client
->irq
&& irq_base
!= -1
629 && (chip
->driver_data
& PCA_INT
)) {
630 ret
= pca953x_read_regs(chip
,
631 chip
->regs
->input
, chip
->irq_stat
);
636 * There is no way to know which GPIO line generated the
637 * interrupt. We have to rely on the previous read for
640 for (i
= 0; i
< NBANK(chip
); i
++)
641 chip
->irq_stat
[i
] &= chip
->reg_direction
[i
];
642 mutex_init(&chip
->irq_lock
);
644 ret
= devm_request_threaded_irq(&client
->dev
,
648 IRQF_TRIGGER_LOW
| IRQF_ONESHOT
|
650 dev_name(&client
->dev
), chip
);
652 dev_err(&client
->dev
, "failed to request irq %d\n",
657 ret
= gpiochip_irqchip_add_nested(&chip
->gpio_chip
,
663 dev_err(&client
->dev
,
664 "could not connect irqchip to gpiochip\n");
668 gpiochip_set_nested_irqchip(&chip
->gpio_chip
,
676 #else /* CONFIG_GPIO_PCA953X_IRQ */
677 static int pca953x_irq_setup(struct pca953x_chip
*chip
,
680 struct i2c_client
*client
= chip
->client
;
682 if (irq_base
!= -1 && (chip
->driver_data
& PCA_INT
))
683 dev_warn(&client
->dev
, "interrupt support not compiled in\n");
689 static int device_pca953x_init(struct pca953x_chip
*chip
, u32 invert
)
694 chip
->regs
= &pca953x_regs
;
696 ret
= pca953x_read_regs(chip
, chip
->regs
->output
, chip
->reg_output
);
700 ret
= pca953x_read_regs(chip
, chip
->regs
->direction
,
701 chip
->reg_direction
);
705 /* set platform specific polarity inversion */
707 memset(val
, 0xFF, NBANK(chip
));
709 memset(val
, 0, NBANK(chip
));
711 ret
= pca953x_write_regs(chip
, PCA953X_INVERT
, val
);
716 static int device_pca957x_init(struct pca953x_chip
*chip
, u32 invert
)
721 chip
->regs
= &pca957x_regs
;
723 ret
= pca953x_read_regs(chip
, chip
->regs
->output
, chip
->reg_output
);
726 ret
= pca953x_read_regs(chip
, chip
->regs
->direction
,
727 chip
->reg_direction
);
731 /* set platform specific polarity inversion */
733 memset(val
, 0xFF, NBANK(chip
));
735 memset(val
, 0, NBANK(chip
));
736 ret
= pca953x_write_regs(chip
, PCA957X_INVRT
, val
);
740 /* To enable register 6, 7 to control pull up and pull down */
741 memset(val
, 0x02, NBANK(chip
));
742 ret
= pca953x_write_regs(chip
, PCA957X_BKEN
, val
);
751 static const struct of_device_id pca953x_dt_ids
[];
753 static int pca953x_probe(struct i2c_client
*client
,
754 const struct i2c_device_id
*i2c_id
)
756 struct pca953x_platform_data
*pdata
;
757 struct pca953x_chip
*chip
;
761 struct regulator
*reg
;
763 chip
= devm_kzalloc(&client
->dev
,
764 sizeof(struct pca953x_chip
), GFP_KERNEL
);
768 pdata
= dev_get_platdata(&client
->dev
);
770 irq_base
= pdata
->irq_base
;
771 chip
->gpio_start
= pdata
->gpio_base
;
772 invert
= pdata
->invert
;
773 chip
->names
= pdata
->names
;
775 struct gpio_desc
*reset_gpio
;
777 chip
->gpio_start
= -1;
781 * See if we need to de-assert a reset pin.
783 * There is no known ACPI-enabled platforms that are
784 * using "reset" GPIO. Otherwise any of those platform
785 * must use _DSD method with corresponding property.
787 reset_gpio
= devm_gpiod_get_optional(&client
->dev
, "reset",
789 if (IS_ERR(reset_gpio
))
790 return PTR_ERR(reset_gpio
);
793 chip
->client
= client
;
795 reg
= devm_regulator_get(&client
->dev
, "vcc");
798 if (ret
!= -EPROBE_DEFER
)
799 dev_err(&client
->dev
, "reg get err: %d\n", ret
);
802 ret
= regulator_enable(reg
);
804 dev_err(&client
->dev
, "reg en err: %d\n", ret
);
807 chip
->regulator
= reg
;
810 chip
->driver_data
= i2c_id
->driver_data
;
812 const struct acpi_device_id
*acpi_id
;
813 const struct of_device_id
*match
;
815 match
= of_match_device(pca953x_dt_ids
, &client
->dev
);
817 chip
->driver_data
= (int)(uintptr_t)match
->data
;
819 acpi_id
= acpi_match_device(pca953x_acpi_ids
, &client
->dev
);
825 chip
->driver_data
= acpi_id
->driver_data
;
829 mutex_init(&chip
->i2c_lock
);
831 * In case we have an i2c-mux controlled by a GPIO provided by an
832 * expander using the same driver higher on the device tree, read the
833 * i2c adapter nesting depth and use the retrieved value as lockdep
834 * subclass for chip->i2c_lock.
836 * REVISIT: This solution is not complete. It protects us from lockdep
837 * false positives when the expander controlling the i2c-mux is on
838 * a different level on the device tree, but not when it's on the same
839 * level on a different branch (in which case the subclass number
840 * would be the same).
842 * TODO: Once a correct solution is developed, a similar fix should be
843 * applied to all other i2c-controlled GPIO expanders (and potentially
846 lockdep_set_subclass(&chip
->i2c_lock
,
847 i2c_adapter_depth(client
->adapter
));
849 /* initialize cached registers from their original values.
850 * we can't share this chip with another i2c master.
852 pca953x_setup_gpio(chip
, chip
->driver_data
& PCA_GPIO_MASK
);
854 if (chip
->gpio_chip
.ngpio
<= 8) {
855 chip
->write_regs
= pca953x_write_regs_8
;
856 chip
->read_regs
= pca953x_read_regs_8
;
857 } else if (chip
->gpio_chip
.ngpio
>= 24) {
858 chip
->write_regs
= pca953x_write_regs_24
;
859 chip
->read_regs
= pca953x_read_regs_24
;
861 if (PCA_CHIP_TYPE(chip
->driver_data
) == PCA953X_TYPE
)
862 chip
->write_regs
= pca953x_write_regs_16
;
864 chip
->write_regs
= pca957x_write_regs_16
;
865 chip
->read_regs
= pca953x_read_regs_16
;
868 if (PCA_CHIP_TYPE(chip
->driver_data
) == PCA953X_TYPE
)
869 ret
= device_pca953x_init(chip
, invert
);
871 ret
= device_pca957x_init(chip
, invert
);
875 ret
= devm_gpiochip_add_data(&client
->dev
, &chip
->gpio_chip
, chip
);
879 ret
= pca953x_irq_setup(chip
, irq_base
);
883 if (pdata
&& pdata
->setup
) {
884 ret
= pdata
->setup(client
, chip
->gpio_chip
.base
,
885 chip
->gpio_chip
.ngpio
, pdata
->context
);
887 dev_warn(&client
->dev
, "setup failed, %d\n", ret
);
890 i2c_set_clientdata(client
, chip
);
894 regulator_disable(chip
->regulator
);
898 static int pca953x_remove(struct i2c_client
*client
)
900 struct pca953x_platform_data
*pdata
= dev_get_platdata(&client
->dev
);
901 struct pca953x_chip
*chip
= i2c_get_clientdata(client
);
904 if (pdata
&& pdata
->teardown
) {
905 ret
= pdata
->teardown(client
, chip
->gpio_chip
.base
,
906 chip
->gpio_chip
.ngpio
, pdata
->context
);
908 dev_err(&client
->dev
, "%s failed, %d\n",
914 regulator_disable(chip
->regulator
);
919 /* convenience to stop overlong match-table lines */
920 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
921 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
923 static const struct of_device_id pca953x_dt_ids
[] = {
924 { .compatible
= "nxp,pca9505", .data
= OF_953X(40, PCA_INT
), },
925 { .compatible
= "nxp,pca9534", .data
= OF_953X( 8, PCA_INT
), },
926 { .compatible
= "nxp,pca9535", .data
= OF_953X(16, PCA_INT
), },
927 { .compatible
= "nxp,pca9536", .data
= OF_953X( 4, 0), },
928 { .compatible
= "nxp,pca9537", .data
= OF_953X( 4, PCA_INT
), },
929 { .compatible
= "nxp,pca9538", .data
= OF_953X( 8, PCA_INT
), },
930 { .compatible
= "nxp,pca9539", .data
= OF_953X(16, PCA_INT
), },
931 { .compatible
= "nxp,pca9554", .data
= OF_953X( 8, PCA_INT
), },
932 { .compatible
= "nxp,pca9555", .data
= OF_953X(16, PCA_INT
), },
933 { .compatible
= "nxp,pca9556", .data
= OF_953X( 8, 0), },
934 { .compatible
= "nxp,pca9557", .data
= OF_953X( 8, 0), },
935 { .compatible
= "nxp,pca9574", .data
= OF_957X( 8, PCA_INT
), },
936 { .compatible
= "nxp,pca9575", .data
= OF_957X(16, PCA_INT
), },
937 { .compatible
= "nxp,pca9698", .data
= OF_953X(40, 0), },
939 { .compatible
= "nxp,pcal6524", .data
= OF_953X(24, PCA_INT
), },
940 { .compatible
= "nxp,pcal9555a", .data
= OF_953X(16, PCA_INT
), },
942 { .compatible
= "maxim,max7310", .data
= OF_953X( 8, 0), },
943 { .compatible
= "maxim,max7312", .data
= OF_953X(16, PCA_INT
), },
944 { .compatible
= "maxim,max7313", .data
= OF_953X(16, PCA_INT
), },
945 { .compatible
= "maxim,max7315", .data
= OF_953X( 8, PCA_INT
), },
946 { .compatible
= "maxim,max7318", .data
= OF_953X(16, PCA_INT
), },
948 { .compatible
= "ti,pca6107", .data
= OF_953X( 8, PCA_INT
), },
949 { .compatible
= "ti,pca9536", .data
= OF_953X( 4, 0), },
950 { .compatible
= "ti,tca6408", .data
= OF_953X( 8, PCA_INT
), },
951 { .compatible
= "ti,tca6416", .data
= OF_953X(16, PCA_INT
), },
952 { .compatible
= "ti,tca6424", .data
= OF_953X(24, PCA_INT
), },
954 { .compatible
= "onnn,pca9654", .data
= OF_953X( 8, PCA_INT
), },
956 { .compatible
= "exar,xra1202", .data
= OF_953X( 8, 0), },
960 MODULE_DEVICE_TABLE(of
, pca953x_dt_ids
);
962 static struct i2c_driver pca953x_driver
= {
965 .of_match_table
= pca953x_dt_ids
,
966 .acpi_match_table
= ACPI_PTR(pca953x_acpi_ids
),
968 .probe
= pca953x_probe
,
969 .remove
= pca953x_remove
,
970 .id_table
= pca953x_id
,
973 static int __init
pca953x_init(void)
975 return i2c_add_driver(&pca953x_driver
);
977 /* register after i2c postcore initcall and before
978 * subsys initcalls that may rely on these GPIOs
980 subsys_initcall(pca953x_init
);
982 static void __exit
pca953x_exit(void)
984 i2c_del_driver(&pca953x_driver
);
986 module_exit(pca953x_exit
);
988 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
989 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
990 MODULE_LICENSE("GPL");