2 * GPIO driver for EXAR XRA1403 16-bit GPIO expander
4 * Copyright (c) 2017, General Electric Company
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #include <linux/bitops.h>
20 #include <linux/gpio/driver.h>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/mutex.h>
24 #include <linux/of_device.h>
25 #include <linux/of_gpio.h>
26 #include <linux/seq_file.h>
27 #include <linux/spi/spi.h>
28 #include <linux/regmap.h>
30 /* XRA1403 registers */
31 #define XRA_GSR 0x00 /* GPIO State */
32 #define XRA_OCR 0x02 /* Output Control */
33 #define XRA_PIR 0x04 /* Input Polarity Inversion */
34 #define XRA_GCR 0x06 /* GPIO Configuration */
35 #define XRA_PUR 0x08 /* Input Internal Pull-up Resistor Enable/Disable */
36 #define XRA_IER 0x0A /* Input Interrupt Enable */
37 #define XRA_TSCR 0x0C /* Output Three-State Control */
38 #define XRA_ISR 0x0E /* Input Interrupt Status */
39 #define XRA_REIR 0x10 /* Input Rising Edge Interrupt Enable */
40 #define XRA_FEIR 0x12 /* Input Falling Edge Interrupt Enable */
41 #define XRA_IFR 0x14 /* Input Filter Enable/Disable */
44 struct gpio_chip chip
;
45 struct regmap
*regmap
;
48 static const struct regmap_config xra1403_regmap_cfg
= {
53 .max_register
= XRA_IFR
| 0x01,
56 static unsigned int to_reg(unsigned int reg
, unsigned int offset
)
58 return reg
+ (offset
> 7);
61 static int xra1403_direction_input(struct gpio_chip
*chip
, unsigned int offset
)
63 struct xra1403
*xra
= gpiochip_get_data(chip
);
65 return regmap_update_bits(xra
->regmap
, to_reg(XRA_GCR
, offset
),
66 BIT(offset
% 8), BIT(offset
% 8));
69 static int xra1403_direction_output(struct gpio_chip
*chip
, unsigned int offset
,
73 struct xra1403
*xra
= gpiochip_get_data(chip
);
75 ret
= regmap_update_bits(xra
->regmap
, to_reg(XRA_GCR
, offset
),
80 ret
= regmap_update_bits(xra
->regmap
, to_reg(XRA_OCR
, offset
),
81 BIT(offset
% 8), value
? BIT(offset
% 8) : 0);
86 static int xra1403_get_direction(struct gpio_chip
*chip
, unsigned int offset
)
90 struct xra1403
*xra
= gpiochip_get_data(chip
);
92 ret
= regmap_read(xra
->regmap
, to_reg(XRA_GCR
, offset
), &val
);
96 return !!(val
& BIT(offset
% 8));
99 static int xra1403_get(struct gpio_chip
*chip
, unsigned int offset
)
103 struct xra1403
*xra
= gpiochip_get_data(chip
);
105 ret
= regmap_read(xra
->regmap
, to_reg(XRA_GSR
, offset
), &val
);
109 return !!(val
& BIT(offset
% 8));
112 static void xra1403_set(struct gpio_chip
*chip
, unsigned int offset
, int value
)
115 struct xra1403
*xra
= gpiochip_get_data(chip
);
117 ret
= regmap_update_bits(xra
->regmap
, to_reg(XRA_OCR
, offset
),
118 BIT(offset
% 8), value
? BIT(offset
% 8) : 0);
120 dev_err(chip
->parent
, "Failed to set pin: %d, ret: %d\n",
124 #ifdef CONFIG_DEBUG_FS
125 static void xra1403_dbg_show(struct seq_file
*s
, struct gpio_chip
*chip
)
128 struct xra1403
*xra
= gpiochip_get_data(chip
);
134 value
= kmalloc_array(xra1403_regmap_cfg
.max_register
, sizeof(*value
),
139 seq_puts(s
, "xra reg:");
140 for (reg
= 0; reg
<= xra1403_regmap_cfg
.max_register
; reg
++)
141 seq_printf(s
, " %2.2x", reg
);
142 seq_puts(s
, "\n value:");
143 for (reg
= 0; reg
< xra1403_regmap_cfg
.max_register
; reg
++) {
144 regmap_read(xra
->regmap
, reg
, &value
[reg
]);
145 seq_printf(s
, " %2.2x", value
[reg
]);
149 gcr
= value
[XRA_GCR
+ 1] << 8 | value
[XRA_GCR
];
150 gsr
= value
[XRA_GSR
+ 1] << 8 | value
[XRA_GSR
];
151 for (i
= 0; i
< chip
->ngpio
; i
++) {
152 const char *label
= gpiochip_is_requested(chip
, i
);
157 seq_printf(s
, " gpio-%-3d (%-12s) %s %s\n",
158 chip
->base
+ i
, label
,
159 (gcr
& BIT(i
)) ? "in" : "out",
160 (gsr
& BIT(i
)) ? "hi" : "lo");
165 #define xra1403_dbg_show NULL
168 static int xra1403_probe(struct spi_device
*spi
)
171 struct gpio_desc
*reset_gpio
;
174 xra
= devm_kzalloc(&spi
->dev
, sizeof(*xra
), GFP_KERNEL
);
178 /* bring the chip out of reset if reset pin is provided*/
179 reset_gpio
= devm_gpiod_get_optional(&spi
->dev
, "reset", GPIOD_OUT_LOW
);
180 if (IS_ERR(reset_gpio
))
181 dev_warn(&spi
->dev
, "Could not get reset-gpios\n");
183 xra
->chip
.direction_input
= xra1403_direction_input
;
184 xra
->chip
.direction_output
= xra1403_direction_output
;
185 xra
->chip
.get_direction
= xra1403_get_direction
;
186 xra
->chip
.get
= xra1403_get
;
187 xra
->chip
.set
= xra1403_set
;
189 xra
->chip
.dbg_show
= xra1403_dbg_show
;
191 xra
->chip
.ngpio
= 16;
192 xra
->chip
.label
= "xra1403";
195 xra
->chip
.can_sleep
= true;
196 xra
->chip
.parent
= &spi
->dev
;
197 xra
->chip
.owner
= THIS_MODULE
;
199 xra
->regmap
= devm_regmap_init_spi(spi
, &xra1403_regmap_cfg
);
200 if (IS_ERR(xra
->regmap
)) {
201 ret
= PTR_ERR(xra
->regmap
);
202 dev_err(&spi
->dev
, "Failed to allocate regmap: %d\n", ret
);
206 ret
= devm_gpiochip_add_data(&spi
->dev
, &xra
->chip
, xra
);
208 dev_err(&spi
->dev
, "Unable to register gpiochip\n");
212 spi_set_drvdata(spi
, xra
);
217 static const struct spi_device_id xra1403_ids
[] = {
221 MODULE_DEVICE_TABLE(spi
, xra1403_ids
);
223 static const struct of_device_id xra1403_spi_of_match
[] = {
224 { .compatible
= "exar,xra1403" },
227 MODULE_DEVICE_TABLE(of
, xra1403_spi_of_match
);
229 static struct spi_driver xra1403_driver
= {
230 .probe
= xra1403_probe
,
231 .id_table
= xra1403_ids
,
234 .of_match_table
= of_match_ptr(xra1403_spi_of_match
),
238 module_spi_driver(xra1403_driver
);
240 MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
241 MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
242 MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
243 MODULE_LICENSE("GPL v2");