powerpc: Fix personality handling in ppc64_personality()
[linux/fpc-iii.git] / arch / powerpc / kernel / irq.c
blob1f017bb7a7cebfc3278fecfd7abe8f3dfaada107
1 /*
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
20 * should be easier.
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
31 #undef DEBUG
33 #include <linux/export.h>
34 #include <linux/threads.h>
35 #include <linux/kernel_stat.h>
36 #include <linux/signal.h>
37 #include <linux/sched.h>
38 #include <linux/ptrace.h>
39 #include <linux/ioport.h>
40 #include <linux/interrupt.h>
41 #include <linux/timex.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/delay.h>
45 #include <linux/irq.h>
46 #include <linux/seq_file.h>
47 #include <linux/cpumask.h>
48 #include <linux/profile.h>
49 #include <linux/bitops.h>
50 #include <linux/list.h>
51 #include <linux/radix-tree.h>
52 #include <linux/mutex.h>
53 #include <linux/bootmem.h>
54 #include <linux/pci.h>
55 #include <linux/debugfs.h>
56 #include <linux/of.h>
57 #include <linux/of_irq.h>
59 #include <asm/uaccess.h>
60 #include <asm/io.h>
61 #include <asm/pgtable.h>
62 #include <asm/irq.h>
63 #include <asm/cache.h>
64 #include <asm/prom.h>
65 #include <asm/ptrace.h>
66 #include <asm/machdep.h>
67 #include <asm/udbg.h>
68 #include <asm/smp.h>
69 #include <asm/debug.h>
71 #ifdef CONFIG_PPC64
72 #include <asm/paca.h>
73 #include <asm/firmware.h>
74 #include <asm/lv1call.h>
75 #endif
76 #define CREATE_TRACE_POINTS
77 #include <asm/trace.h>
79 DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
80 EXPORT_PER_CPU_SYMBOL(irq_stat);
82 int __irq_offset_value;
84 #ifdef CONFIG_PPC32
85 EXPORT_SYMBOL(__irq_offset_value);
86 atomic_t ppc_n_lost_interrupts;
88 #ifdef CONFIG_TAU_INT
89 extern int tau_initialized;
90 extern int tau_interrupts(int);
91 #endif
92 #endif /* CONFIG_PPC32 */
94 #ifdef CONFIG_PPC64
96 int distribute_irqs = 1;
98 static inline notrace unsigned long get_irq_happened(void)
100 unsigned long happened;
102 __asm__ __volatile__("lbz %0,%1(13)"
103 : "=r" (happened) : "i" (offsetof(struct paca_struct, irq_happened)));
105 return happened;
108 static inline notrace void set_soft_enabled(unsigned long enable)
110 __asm__ __volatile__("stb %0,%1(13)"
111 : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
114 static inline notrace int decrementer_check_overflow(void)
116 u64 now = get_tb_or_rtc();
117 u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
119 if (now >= *next_tb)
120 set_dec(1);
121 return now >= *next_tb;
124 /* This is called whenever we are re-enabling interrupts
125 * and returns either 0 (nothing to do) or 500/900 if there's
126 * either an EE or a DEC to generate.
128 * This is called in two contexts: From arch_local_irq_restore()
129 * before soft-enabling interrupts, and from the exception exit
130 * path when returning from an interrupt from a soft-disabled to
131 * a soft enabled context. In both case we have interrupts hard
132 * disabled.
134 * We take care of only clearing the bits we handled in the
135 * PACA irq_happened field since we can only re-emit one at a
136 * time and we don't want to "lose" one.
138 notrace unsigned int __check_irq_replay(void)
141 * We use local_paca rather than get_paca() to avoid all
142 * the debug_smp_processor_id() business in this low level
143 * function
145 unsigned char happened = local_paca->irq_happened;
147 /* Clear bit 0 which we wouldn't clear otherwise */
148 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
151 * Force the delivery of pending soft-disabled interrupts on PS3.
152 * Any HV call will have this side effect.
154 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
155 u64 tmp, tmp2;
156 lv1_get_version_info(&tmp, &tmp2);
160 * We may have missed a decrementer interrupt. We check the
161 * decrementer itself rather than the paca irq_happened field
162 * in case we also had a rollover while hard disabled
164 local_paca->irq_happened &= ~PACA_IRQ_DEC;
165 if (decrementer_check_overflow())
166 return 0x900;
168 /* Finally check if an external interrupt happened */
169 local_paca->irq_happened &= ~PACA_IRQ_EE;
170 if (happened & PACA_IRQ_EE)
171 return 0x500;
173 #ifdef CONFIG_PPC_BOOK3E
174 /* Finally check if an EPR external interrupt happened
175 * this bit is typically set if we need to handle another
176 * "edge" interrupt from within the MPIC "EPR" handler
178 local_paca->irq_happened &= ~PACA_IRQ_EE_EDGE;
179 if (happened & PACA_IRQ_EE_EDGE)
180 return 0x500;
182 local_paca->irq_happened &= ~PACA_IRQ_DBELL;
183 if (happened & PACA_IRQ_DBELL)
184 return 0x280;
185 #endif /* CONFIG_PPC_BOOK3E */
187 /* There should be nothing left ! */
188 BUG_ON(local_paca->irq_happened != 0);
190 return 0;
193 notrace void arch_local_irq_restore(unsigned long en)
195 unsigned char irq_happened;
196 unsigned int replay;
198 /* Write the new soft-enabled value */
199 set_soft_enabled(en);
200 if (!en)
201 return;
203 * From this point onward, we can take interrupts, preempt,
204 * etc... unless we got hard-disabled. We check if an event
205 * happened. If none happened, we know we can just return.
207 * We may have preempted before the check below, in which case
208 * we are checking the "new" CPU instead of the old one. This
209 * is only a problem if an event happened on the "old" CPU.
211 * External interrupt events will have caused interrupts to
212 * be hard-disabled, so there is no problem, we
213 * cannot have preempted.
215 irq_happened = get_irq_happened();
216 if (!irq_happened)
217 return;
220 * We need to hard disable to get a trusted value from
221 * __check_irq_replay(). We also need to soft-disable
222 * again to avoid warnings in there due to the use of
223 * per-cpu variables.
225 * We know that if the value in irq_happened is exactly 0x01
226 * then we are already hard disabled (there are other less
227 * common cases that we'll ignore for now), so we skip the
228 * (expensive) mtmsrd.
230 if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
231 __hard_irq_disable();
232 #ifdef CONFIG_TRACE_IRQFLAGS
233 else {
235 * We should already be hard disabled here. We had bugs
236 * where that wasn't the case so let's dbl check it and
237 * warn if we are wrong. Only do that when IRQ tracing
238 * is enabled as mfmsr() can be costly.
240 if (WARN_ON(mfmsr() & MSR_EE))
241 __hard_irq_disable();
243 #endif /* CONFIG_TRACE_IRQFLAG */
245 set_soft_enabled(0);
248 * Check if anything needs to be re-emitted. We haven't
249 * soft-enabled yet to avoid warnings in decrementer_check_overflow
250 * accessing per-cpu variables
252 replay = __check_irq_replay();
254 /* We can soft-enable now */
255 set_soft_enabled(1);
258 * And replay if we have to. This will return with interrupts
259 * hard-enabled.
261 if (replay) {
262 __replay_interrupt(replay);
263 return;
266 /* Finally, let's ensure we are hard enabled */
267 __hard_irq_enable();
269 EXPORT_SYMBOL(arch_local_irq_restore);
272 * This is specifically called by assembly code to re-enable interrupts
273 * if they are currently disabled. This is typically called before
274 * schedule() or do_signal() when returning to userspace. We do it
275 * in C to avoid the burden of dealing with lockdep etc...
277 * NOTE: This is called with interrupts hard disabled but not marked
278 * as such in paca->irq_happened, so we need to resync this.
280 void notrace restore_interrupts(void)
282 if (irqs_disabled()) {
283 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
284 local_irq_enable();
285 } else
286 __hard_irq_enable();
290 * This is a helper to use when about to go into idle low-power
291 * when the latter has the side effect of re-enabling interrupts
292 * (such as calling H_CEDE under pHyp).
294 * You call this function with interrupts soft-disabled (this is
295 * already the case when ppc_md.power_save is called). The function
296 * will return whether to enter power save or just return.
298 * In the former case, it will have notified lockdep of interrupts
299 * being re-enabled and generally sanitized the lazy irq state,
300 * and in the latter case it will leave with interrupts hard
301 * disabled and marked as such, so the local_irq_enable() call
302 * in cpu_idle() will properly re-enable everything.
304 bool prep_irq_for_idle(void)
307 * First we need to hard disable to ensure no interrupt
308 * occurs before we effectively enter the low power state
310 hard_irq_disable();
313 * If anything happened while we were soft-disabled,
314 * we return now and do not enter the low power state.
316 if (lazy_irq_pending())
317 return false;
319 /* Tell lockdep we are about to re-enable */
320 trace_hardirqs_on();
323 * Mark interrupts as soft-enabled and clear the
324 * PACA_IRQ_HARD_DIS from the pending mask since we
325 * are about to hard enable as well as a side effect
326 * of entering the low power state.
328 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
329 local_paca->soft_enabled = 1;
331 /* Tell the caller to enter the low power state */
332 return true;
335 #endif /* CONFIG_PPC64 */
337 int arch_show_interrupts(struct seq_file *p, int prec)
339 int j;
341 #if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
342 if (tau_initialized) {
343 seq_printf(p, "%*s: ", prec, "TAU");
344 for_each_online_cpu(j)
345 seq_printf(p, "%10u ", tau_interrupts(j));
346 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
348 #endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
350 seq_printf(p, "%*s: ", prec, "LOC");
351 for_each_online_cpu(j)
352 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs);
353 seq_printf(p, " Local timer interrupts\n");
355 seq_printf(p, "%*s: ", prec, "SPU");
356 for_each_online_cpu(j)
357 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
358 seq_printf(p, " Spurious interrupts\n");
360 seq_printf(p, "%*s: ", prec, "CNT");
361 for_each_online_cpu(j)
362 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
363 seq_printf(p, " Performance monitoring interrupts\n");
365 seq_printf(p, "%*s: ", prec, "MCE");
366 for_each_online_cpu(j)
367 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
368 seq_printf(p, " Machine check exceptions\n");
370 return 0;
374 * /proc/stat helpers
376 u64 arch_irq_stat_cpu(unsigned int cpu)
378 u64 sum = per_cpu(irq_stat, cpu).timer_irqs;
380 sum += per_cpu(irq_stat, cpu).pmu_irqs;
381 sum += per_cpu(irq_stat, cpu).mce_exceptions;
382 sum += per_cpu(irq_stat, cpu).spurious_irqs;
384 return sum;
387 #ifdef CONFIG_HOTPLUG_CPU
388 void migrate_irqs(void)
390 struct irq_desc *desc;
391 unsigned int irq;
392 static int warned;
393 cpumask_var_t mask;
394 const struct cpumask *map = cpu_online_mask;
396 alloc_cpumask_var(&mask, GFP_KERNEL);
398 for_each_irq_desc(irq, desc) {
399 struct irq_data *data;
400 struct irq_chip *chip;
402 data = irq_desc_get_irq_data(desc);
403 if (irqd_is_per_cpu(data))
404 continue;
406 chip = irq_data_get_irq_chip(data);
408 cpumask_and(mask, data->affinity, map);
409 if (cpumask_any(mask) >= nr_cpu_ids) {
410 printk("Breaking affinity for irq %i\n", irq);
411 cpumask_copy(mask, map);
413 if (chip->irq_set_affinity)
414 chip->irq_set_affinity(data, mask, true);
415 else if (desc->action && !(warned++))
416 printk("Cannot set affinity for irq %i\n", irq);
419 free_cpumask_var(mask);
421 local_irq_enable();
422 mdelay(1);
423 local_irq_disable();
425 #endif
427 static inline void handle_one_irq(unsigned int irq)
429 struct thread_info *curtp, *irqtp;
430 unsigned long saved_sp_limit;
431 struct irq_desc *desc;
433 desc = irq_to_desc(irq);
434 if (!desc)
435 return;
437 /* Switch to the irq stack to handle this */
438 curtp = current_thread_info();
439 irqtp = hardirq_ctx[smp_processor_id()];
441 if (curtp == irqtp) {
442 /* We're already on the irq stack, just handle it */
443 desc->handle_irq(irq, desc);
444 return;
447 saved_sp_limit = current->thread.ksp_limit;
449 irqtp->task = curtp->task;
450 irqtp->flags = 0;
452 /* Copy the softirq bits in preempt_count so that the
453 * softirq checks work in the hardirq context. */
454 irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) |
455 (curtp->preempt_count & SOFTIRQ_MASK);
457 current->thread.ksp_limit = (unsigned long)irqtp +
458 _ALIGN_UP(sizeof(struct thread_info), 16);
460 call_handle_irq(irq, desc, irqtp, desc->handle_irq);
461 current->thread.ksp_limit = saved_sp_limit;
462 irqtp->task = NULL;
464 /* Set any flag that may have been set on the
465 * alternate stack
467 if (irqtp->flags)
468 set_bits(irqtp->flags, &curtp->flags);
471 static inline void check_stack_overflow(void)
473 #ifdef CONFIG_DEBUG_STACKOVERFLOW
474 long sp;
476 sp = __get_SP() & (THREAD_SIZE-1);
478 /* check for stack overflow: is there less than 2KB free? */
479 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
480 printk("do_IRQ: stack overflow: %ld\n",
481 sp - sizeof(struct thread_info));
482 dump_stack();
484 #endif
487 void do_IRQ(struct pt_regs *regs)
489 struct pt_regs *old_regs = set_irq_regs(regs);
490 unsigned int irq;
492 trace_irq_entry(regs);
494 irq_enter();
496 check_stack_overflow();
499 * Query the platform PIC for the interrupt & ack it.
501 * This will typically lower the interrupt line to the CPU
503 irq = ppc_md.get_irq();
505 /* We can hard enable interrupts now */
506 may_hard_irq_enable();
508 /* And finally process it */
509 if (irq != NO_IRQ)
510 handle_one_irq(irq);
511 else
512 __get_cpu_var(irq_stat).spurious_irqs++;
514 irq_exit();
515 set_irq_regs(old_regs);
517 trace_irq_exit(regs);
520 void __init init_IRQ(void)
522 if (ppc_md.init_IRQ)
523 ppc_md.init_IRQ();
525 exc_lvl_ctx_init();
527 irq_ctx_init();
530 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
531 struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
532 struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
533 struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
535 void exc_lvl_ctx_init(void)
537 struct thread_info *tp;
538 int i, cpu_nr;
540 for_each_possible_cpu(i) {
541 #ifdef CONFIG_PPC64
542 cpu_nr = i;
543 #else
544 cpu_nr = get_hard_smp_processor_id(i);
545 #endif
546 memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE);
547 tp = critirq_ctx[cpu_nr];
548 tp->cpu = cpu_nr;
549 tp->preempt_count = 0;
551 #ifdef CONFIG_BOOKE
552 memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE);
553 tp = dbgirq_ctx[cpu_nr];
554 tp->cpu = cpu_nr;
555 tp->preempt_count = 0;
557 memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE);
558 tp = mcheckirq_ctx[cpu_nr];
559 tp->cpu = cpu_nr;
560 tp->preempt_count = HARDIRQ_OFFSET;
561 #endif
564 #endif
566 struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
567 struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
569 void irq_ctx_init(void)
571 struct thread_info *tp;
572 int i;
574 for_each_possible_cpu(i) {
575 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
576 tp = softirq_ctx[i];
577 tp->cpu = i;
578 tp->preempt_count = 0;
580 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
581 tp = hardirq_ctx[i];
582 tp->cpu = i;
583 tp->preempt_count = HARDIRQ_OFFSET;
587 static inline void do_softirq_onstack(void)
589 struct thread_info *curtp, *irqtp;
590 unsigned long saved_sp_limit = current->thread.ksp_limit;
592 curtp = current_thread_info();
593 irqtp = softirq_ctx[smp_processor_id()];
594 irqtp->task = curtp->task;
595 irqtp->flags = 0;
596 current->thread.ksp_limit = (unsigned long)irqtp +
597 _ALIGN_UP(sizeof(struct thread_info), 16);
598 call_do_softirq(irqtp);
599 current->thread.ksp_limit = saved_sp_limit;
600 irqtp->task = NULL;
602 /* Set any flag that may have been set on the
603 * alternate stack
605 if (irqtp->flags)
606 set_bits(irqtp->flags, &curtp->flags);
609 void do_softirq(void)
611 unsigned long flags;
613 if (in_interrupt())
614 return;
616 local_irq_save(flags);
618 if (local_softirq_pending())
619 do_softirq_onstack();
621 local_irq_restore(flags);
624 irq_hw_number_t virq_to_hw(unsigned int virq)
626 struct irq_data *irq_data = irq_get_irq_data(virq);
627 return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
629 EXPORT_SYMBOL_GPL(virq_to_hw);
631 #ifdef CONFIG_SMP
632 int irq_choose_cpu(const struct cpumask *mask)
634 int cpuid;
636 if (cpumask_equal(mask, cpu_online_mask)) {
637 static int irq_rover;
638 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
639 unsigned long flags;
641 /* Round-robin distribution... */
642 do_round_robin:
643 raw_spin_lock_irqsave(&irq_rover_lock, flags);
645 irq_rover = cpumask_next(irq_rover, cpu_online_mask);
646 if (irq_rover >= nr_cpu_ids)
647 irq_rover = cpumask_first(cpu_online_mask);
649 cpuid = irq_rover;
651 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
652 } else {
653 cpuid = cpumask_first_and(mask, cpu_online_mask);
654 if (cpuid >= nr_cpu_ids)
655 goto do_round_robin;
658 return get_hard_smp_processor_id(cpuid);
660 #else
661 int irq_choose_cpu(const struct cpumask *mask)
663 return hard_smp_processor_id();
665 #endif
667 int arch_early_irq_init(void)
669 return 0;
672 #ifdef CONFIG_PPC64
673 static int __init setup_noirqdistrib(char *str)
675 distribute_irqs = 0;
676 return 1;
679 __setup("noirqdistrib", setup_noirqdistrib);
680 #endif /* CONFIG_PPC64 */