arch/powerpc/platforms/powernv/smp.c

   1 /*
   2  * SMP support for PowerNV machines.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/sched.h>
  15 #include <linux/smp.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/delay.h>
  18 #include <linux/init.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/cpu.h>
  21
  22 #include <asm/irq.h>
  23 #include <asm/smp.h>
  24 #include <asm/paca.h>
  25 #include <asm/machdep.h>
  26 #include <asm/cputable.h>
  27 #include <asm/firmware.h>
  28 #include <asm/vdso_datapage.h>
  29 #include <asm/cputhreads.h>
  30 #include <asm/xics.h>
  31 #include <asm/opal.h>
  32 #include <asm/runlatch.h>
  33 #include <asm/code-patching.h>
  34 #include <asm/dbell.h>
  35
  36 #include "powernv.h"
  37
  38 #ifdef DEBUG
  39 #include <asm/udbg.h>
  40 #define DBG(fmt...) udbg_printf(fmt)
  41 #else
  42 #define DBG(fmt...)
  43 #endif
  44
  45 static void pnv_smp_setup_cpu(int cpu)
  46 {
  47         if (cpu != boot_cpuid)
  48                 xics_setup_cpu();
  49
  50 #ifdef CONFIG_PPC_DOORBELL
  51         if (cpu_has_feature(CPU_FTR_DBELL))
  52                 doorbell_setup_this_cpu();
  53 #endif
  54 }
  55
  56 static int pnv_smp_kick_cpu(int nr)
  57 {
  58         unsigned int pcpu = get_hard_smp_processor_id(nr);
  59         unsigned long start_here =
  60                         __pa(ppc_function_entry(generic_secondary_smp_init));
  61         long rc;
  62
  63         BUG_ON(nr < 0 || nr >= NR_CPUS);
  64
  65         /*
  66          * If we already started or OPALv2 is not supported, we just
  67          * kick the CPU via the PACA
  68          */
  69         if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPALv2))
  70                 goto kick;
  71
  72         /*
  73          * At this point, the CPU can either be spinning on the way in
  74          * from kexec or be inside OPAL waiting to be started for the
  75          * first time. OPAL v3 allows us to query OPAL to know if it
  76          * has the CPUs, so we do that
  77          */
  78         if (firmware_has_feature(FW_FEATURE_OPALv3)) {
  79                 uint8_t status;
  80
  81                 rc = opal_query_cpu_status(pcpu, &status);
  82                 if (rc != OPAL_SUCCESS) {
  83                         pr_warn("OPAL Error %ld querying CPU %d state\n",
  84                                 rc, nr);
  85                         return -ENODEV;
  86                 }
  87
  88                 /*
  89                  * Already started, just kick it, probably coming from
  90                  * kexec and spinning
  91                  */
  92                 if (status == OPAL_THREAD_STARTED)
  93                         goto kick;
  94
  95                 /*
  96                  * Available/inactive, let's kick it
  97                  */
  98                 if (status == OPAL_THREAD_INACTIVE) {
  99                         pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n",
 100                                  nr, pcpu);
 101                         rc = opal_start_cpu(pcpu, start_here);
 102                         if (rc != OPAL_SUCCESS) {
 103                                 pr_warn("OPAL Error %ld starting CPU %d\n",
 104                                         rc, nr);
 105                                 return -ENODEV;
 106                         }
 107                 } else {
 108                         /*
 109                          * An unavailable CPU (or any other unknown status)
 110                          * shouldn't be started. It should also
 111                          * not be in the possible map but currently it can
 112                          * happen
 113                          */
 114                         pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
 115                                  " (status %d)...\n", nr, pcpu, status);
 116                         return -ENODEV;
 117                 }
 118         } else {
 119                 /*
 120                  * On OPAL v2, we just kick it and hope for the best,
 121                  * we must not test the error from opal_start_cpu() or
 122                  * we would fail to get CPUs from kexec.
 123                  */
 124                 opal_start_cpu(pcpu, start_here);
 125         }
 126  kick:
 127         return smp_generic_kick_cpu(nr);
 128 }
 129
 130 #ifdef CONFIG_HOTPLUG_CPU
 131
 132 static int pnv_smp_cpu_disable(void)
 133 {
 134         int cpu = smp_processor_id();
 135
 136         /* This is identical to pSeries... might consolidate by
 137          * moving migrate_irqs_away to a ppc_md with default to
 138          * the generic fixup_irqs. --BenH.
 139          */
 140         set_cpu_online(cpu, false);
 141         vdso_data->processorCount--;
 142         if (cpu == boot_cpuid)
 143                 boot_cpuid = cpumask_any(cpu_online_mask);
 144         xics_migrate_irqs_away();
 145         return 0;
 146 }
 147
 148 static void pnv_smp_cpu_kill_self(void)
 149 {
 150         unsigned int cpu;
 151         unsigned long srr1;
 152         u32 idle_states;
 153
 154         /* Standard hot unplug procedure */
 155         local_irq_disable();
 156         idle_task_exit();
 157         current->active_mm = NULL; /* for sanity */
 158         cpu = smp_processor_id();
 159         DBG("CPU%d offline\n", cpu);
 160         generic_set_cpu_dead(cpu);
 161         smp_wmb();
 162
 163         idle_states = pnv_get_supported_cpuidle_states();
 164         /* We don't want to take decrementer interrupts while we are offline,
 165          * so clear LPCR:PECE1. We keep PECE2 enabled.
 166          */
 167         mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
 168         while (!generic_check_cpu_restart(cpu)) {
 169
 170                 ppc64_runlatch_off();
 171
 172                 if (idle_states & OPAL_PM_WINKLE_ENABLED)
 173                         srr1 = power7_winkle();
 174                 else if ((idle_states & OPAL_PM_SLEEP_ENABLED) ||
 175                                 (idle_states & OPAL_PM_SLEEP_ENABLED_ER1))
 176                         srr1 = power7_sleep();
 177                 else
 178                         srr1 = power7_nap(1);
 179
 180                 ppc64_runlatch_on();
 181
 182                 /*
 183                  * If the SRR1 value indicates that we woke up due to
 184                  * an external interrupt, then clear the interrupt.
 185                  * We clear the interrupt before checking for the
 186                  * reason, so as to avoid a race where we wake up for
 187                  * some other reason, find nothing and clear the interrupt
 188                  * just as some other cpu is sending us an interrupt.
 189                  * If we returned from power7_nap as a result of
 190                  * having finished executing in a KVM guest, then srr1
 191                  * contains 0.
 192                  */
 193                 if ((srr1 & SRR1_WAKEMASK) == SRR1_WAKEEE) {
 194                         icp_native_flush_interrupt();
 195                         local_paca->irq_happened &= PACA_IRQ_HARD_DIS;
 196                         smp_mb();
 197                 }
 198
 199                 if (cpu_core_split_required())
 200                         continue;
 201
 202                 if (!generic_check_cpu_restart(cpu))
 203                         DBG("CPU%d Unexpected exit while offline !\n", cpu);
 204         }
 205         mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
 206         DBG("CPU%d coming online...\n", cpu);
 207 }
 208
 209 #endif /* CONFIG_HOTPLUG_CPU */
 210
 211 static int pnv_cpu_bootable(unsigned int nr)
 212 {
 213         /*
 214          * Starting with POWER8, the subcore logic relies on all threads of a
 215          * core being booted so that they can participate in split mode
 216          * switches. So on those machines we ignore the smt_enabled_at_boot
 217          * setting (smt-enabled on the kernel command line).
 218          */
 219         if (cpu_has_feature(CPU_FTR_ARCH_207S))
 220                 return 1;
 221
 222         return smp_generic_cpu_bootable(nr);
 223 }
 224
 225 static struct smp_ops_t pnv_smp_ops = {
 226         .message_pass   = smp_muxed_ipi_message_pass,
 227         .cause_ipi      = NULL, /* Filled at runtime by xics_smp_probe() */
 228         .probe          = xics_smp_probe,
 229         .kick_cpu       = pnv_smp_kick_cpu,
 230         .setup_cpu      = pnv_smp_setup_cpu,
 231         .cpu_bootable   = pnv_cpu_bootable,
 232 #ifdef CONFIG_HOTPLUG_CPU
 233         .cpu_disable    = pnv_smp_cpu_disable,
 234         .cpu_die        = generic_cpu_die,
 235 #endif /* CONFIG_HOTPLUG_CPU */
 236 };
 237
 238 /* This is called very early during platform setup_arch */
 239 void __init pnv_smp_init(void)
 240 {
 241         smp_ops = &pnv_smp_ops;
 242
 243 #ifdef CONFIG_HOTPLUG_CPU
 244         ppc_md.cpu_die  = pnv_smp_cpu_kill_self;
 245 #endif
 246 }