arch/blackfin/mach-bf533/boards/ip0x.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2007 David Rowe
   4  *                2006 Intratrade Ltd.
   5  *                     Ivan Danov <idanov@gmail.com>
   6  *                2005 National ICT Australia (NICTA)
   7  *                     Aidan Williams <aidan@nicta.com.au>
   8  *
   9  * Licensed under the GPL-2 or later.
  10  */
  11
  12 #include <linux/device.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/spi/flash.h>
  18 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
  19 #include <linux/usb/isp1362.h>
  20 #endif
  21 #include <asm/irq.h>
  22 #include <asm/dma.h>
  23 #include <asm/bfin5xx_spi.h>
  24 #include <asm/portmux.h>
  25
  26 /*
  27  * Name the Board for the /proc/cpuinfo
  28  */
  29 const char bfin_board_name[] = "IP04/IP08";
  30
  31 /*
  32  *  Driver needs to know address, irq and flag pin.
  33  */
  34 #if defined(CONFIG_BFIN532_IP0X)
  35 #if IS_ENABLED(CONFIG_DM9000)
  36
  37 #include <linux/dm9000.h>
  38
  39 static struct resource dm9000_resource1[] = {
  40         {
  41                 .start = 0x20100000,
  42                 .end   = 0x20100000 + 1,
  43                 .flags = IORESOURCE_MEM
  44         },{
  45                 .start = 0x20100000 + 2,
  46                 .end   = 0x20100000 + 3,
  47                 .flags = IORESOURCE_MEM
  48         },{
  49                 .start = IRQ_PF15,
  50                 .end   = IRQ_PF15,
  51                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
  52         }
  53 };
  54
  55 static struct resource dm9000_resource2[] = {
  56         {
  57                 .start = 0x20200000,
  58                 .end   = 0x20200000 + 1,
  59                 .flags = IORESOURCE_MEM
  60         },{
  61                 .start = 0x20200000 + 2,
  62                 .end   = 0x20200000 + 3,
  63                 .flags = IORESOURCE_MEM
  64         },{
  65                 .start = IRQ_PF14,
  66                 .end   = IRQ_PF14,
  67                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
  68         }
  69 };
  70
  71 /*
  72 * for the moment we limit ourselves to 16bit IO until some
  73 * better IO routines can be written and tested
  74 */
  75 static struct dm9000_plat_data dm9000_platdata1 = {
  76         .flags          = DM9000_PLATF_16BITONLY,
  77 };
  78
  79 static struct platform_device dm9000_device1 = {
  80         .name           = "dm9000",
  81         .id             = 0,
  82         .num_resources  = ARRAY_SIZE(dm9000_resource1),
  83         .resource       = dm9000_resource1,
  84         .dev            = {
  85                 .platform_data = &dm9000_platdata1,
  86         }
  87 };
  88
  89 static struct dm9000_plat_data dm9000_platdata2 = {
  90         .flags          = DM9000_PLATF_16BITONLY,
  91 };
  92
  93 static struct platform_device dm9000_device2 = {
  94         .name           = "dm9000",
  95         .id             = 1,
  96         .num_resources  = ARRAY_SIZE(dm9000_resource2),
  97         .resource       = dm9000_resource2,
  98         .dev            = {
  99                 .platform_data = &dm9000_platdata2,
 100         }
 101 };
 102
 103 #endif
 104 #endif
 105
 106
 107 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 108 /* all SPI peripherals info goes here */
 109
 110 #if IS_ENABLED(CONFIG_MMC_SPI)
 111 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 112         .enable_dma = 0,                /* if 1 - block!!! */
 113 };
 114 #endif
 115
 116 /* Notice: for blackfin, the speed_hz is the value of register
 117  * SPI_BAUD, not the real baudrate */
 118 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 119 #if IS_ENABLED(CONFIG_MMC_SPI)
 120         {
 121                 .modalias = "mmc_spi",
 122                 .max_speed_hz = 2,
 123                 .bus_num = 1,
 124                 .chip_select = 5,
 125                 .controller_data = &mmc_spi_chip_info,
 126         },
 127 #endif
 128 };
 129
 130 /* SPI controller data */
 131 static struct bfin5xx_spi_master spi_bfin_master_info = {
 132         .num_chipselect = 8,
 133         .enable_dma = 1,  /* master has the ability to do dma transfer */
 134 };
 135
 136 static struct platform_device spi_bfin_master_device = {
 137         .name = "bfin-spi-master",
 138         .id = 1, /* Bus number */
 139         .dev = {
 140                 .platform_data = &spi_bfin_master_info, /* Passed to driver */
 141         },
 142 };
 143 #endif  /* spi master and devices */
 144
 145 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
 146 #ifdef CONFIG_SERIAL_BFIN_UART0
 147 static struct resource bfin_uart0_resources[] = {
 148         {
 149                 .start = BFIN_UART_THR,
 150                 .end = BFIN_UART_GCTL+2,
 151                 .flags = IORESOURCE_MEM,
 152         },
 153         {
 154                 .start = IRQ_UART0_TX,
 155                 .end = IRQ_UART0_TX,
 156                 .flags = IORESOURCE_IRQ,
 157         },
 158         {
 159                 .start = IRQ_UART0_RX,
 160                 .end = IRQ_UART0_RX,
 161                 .flags = IORESOURCE_IRQ,
 162         },
 163         {
 164                 .start = IRQ_UART0_ERROR,
 165                 .end = IRQ_UART0_ERROR,
 166                 .flags = IORESOURCE_IRQ,
 167         },
 168         {
 169                 .start = CH_UART0_TX,
 170                 .end = CH_UART0_TX,
 171                 .flags = IORESOURCE_DMA,
 172         },
 173         {
 174                 .start = CH_UART0_RX,
 175                 .end = CH_UART0_RX,
 176                 .flags = IORESOURCE_DMA,
 177         },
 178 };
 179
 180 static unsigned short bfin_uart0_peripherals[] = {
 181         P_UART0_TX, P_UART0_RX, 0
 182 };
 183
 184 static struct platform_device bfin_uart0_device = {
 185         .name = "bfin-uart",
 186         .id = 0,
 187         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 188         .resource = bfin_uart0_resources,
 189         .dev = {
 190                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 191         },
 192 };
 193 #endif
 194 #endif
 195
 196 #if IS_ENABLED(CONFIG_BFIN_SIR)
 197 #ifdef CONFIG_BFIN_SIR0
 198 static struct resource bfin_sir0_resources[] = {
 199         {
 200                 .start = 0xFFC00400,
 201                 .end = 0xFFC004FF,
 202                 .flags = IORESOURCE_MEM,
 203         },
 204         {
 205                 .start = IRQ_UART0_RX,
 206                 .end = IRQ_UART0_RX+1,
 207                 .flags = IORESOURCE_IRQ,
 208         },
 209         {
 210                 .start = CH_UART0_RX,
 211                 .end = CH_UART0_RX+1,
 212                 .flags = IORESOURCE_DMA,
 213         },
 214 };
 215
 216 static struct platform_device bfin_sir0_device = {
 217         .name = "bfin_sir",
 218         .id = 0,
 219         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 220         .resource = bfin_sir0_resources,
 221 };
 222 #endif
 223 #endif
 224
 225 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
 226 static struct resource isp1362_hcd_resources[] = {
 227         {
 228                 .start = 0x20300000,
 229                 .end   = 0x20300000 + 1,
 230                 .flags = IORESOURCE_MEM,
 231         },{
 232                 .start = 0x20300000 + 2,
 233                 .end   = 0x20300000 + 3,
 234                 .flags = IORESOURCE_MEM,
 235         },{
 236                 .start = IRQ_PF11,
 237                 .end   = IRQ_PF11,
 238                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 239         },
 240 };
 241
 242 static struct isp1362_platform_data isp1362_priv = {
 243         .sel15Kres = 1,
 244         .clknotstop = 0,
 245         .oc_enable = 0,         /* external OC */
 246         .int_act_high = 0,
 247         .int_edge_triggered = 0,
 248         .remote_wakeup_connected = 0,
 249         .no_power_switching = 1,
 250         .power_switching_mode = 0,
 251 };
 252
 253 static struct platform_device isp1362_hcd_device = {
 254         .name = "isp1362-hcd",
 255         .id = 0,
 256         .dev = {
 257                 .platform_data = &isp1362_priv,
 258         },
 259         .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 260         .resource = isp1362_hcd_resources,
 261 };
 262 #endif
 263
 264
 265 static struct platform_device *ip0x_devices[] __initdata = {
 266 #if defined(CONFIG_BFIN532_IP0X)
 267 #if IS_ENABLED(CONFIG_DM9000)
 268         &dm9000_device1,
 269         &dm9000_device2,
 270 #endif
 271 #endif
 272
 273 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
 274         &spi_bfin_master_device,
 275 #endif
 276
 277 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
 278 #ifdef CONFIG_SERIAL_BFIN_UART0
 279         &bfin_uart0_device,
 280 #endif
 281 #endif
 282
 283 #if IS_ENABLED(CONFIG_BFIN_SIR)
 284 #ifdef CONFIG_BFIN_SIR0
 285         &bfin_sir0_device,
 286 #endif
 287 #endif
 288
 289 #if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
 290         &isp1362_hcd_device,
 291 #endif
 292 };
 293
 294 static int __init ip0x_init(void)
 295 {
 296         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 297         platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices));
 298
 299         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 300
 301         return 0;
 302 }
 303
 304 arch_initcall(ip0x_init);
 305
 306 static struct platform_device *ip0x_early_devices[] __initdata = {
 307 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 308 #ifdef CONFIG_SERIAL_BFIN_UART0
 309         &bfin_uart0_device,
 310 #endif
 311 #endif
 312 };
 313
 314 void __init native_machine_early_platform_add_devices(void)
 315 {
 316         printk(KERN_INFO "register early platform devices\n");
 317         early_platform_add_devices(ip0x_early_devices,
 318                 ARRAY_SIZE(ip0x_early_devices));
 319 }