dccp: do not assume DCCP code is non preemptible
[linux/fpc-iii.git] / arch / x86 / math-emu / fpu_aux.c
blob024f6e971174e88df9d96ffb66641f7835b8729d
1 /*---------------------------------------------------------------------------+
2 | fpu_aux.c |
3 | |
4 | Code to implement some of the FPU auxiliary instructions. |
5 | |
6 | Copyright (C) 1992,1993,1994,1997 |
7 | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, Australia |
8 | E-mail billm@suburbia.net |
9 | |
10 | |
11 +---------------------------------------------------------------------------*/
13 #include "fpu_system.h"
14 #include "exception.h"
15 #include "fpu_emu.h"
16 #include "status_w.h"
17 #include "control_w.h"
19 static void fnop(void)
23 static void fclex(void)
25 partial_status &=
26 ~(SW_Backward | SW_Summary | SW_Stack_Fault | SW_Precision |
27 SW_Underflow | SW_Overflow | SW_Zero_Div | SW_Denorm_Op |
28 SW_Invalid);
29 no_ip_update = 1;
32 /* Needs to be externally visible */
33 void fpstate_init_soft(struct swregs_state *soft)
35 struct address *oaddr, *iaddr;
36 memset(soft, 0, sizeof(*soft));
37 soft->cwd = 0x037f;
38 soft->swd = 0;
39 soft->ftop = 0; /* We don't keep top in the status word internally. */
40 soft->twd = 0xffff;
41 /* The behaviour is different from that detailed in
42 Section 15.1.6 of the Intel manual */
43 oaddr = (struct address *)&soft->foo;
44 oaddr->offset = 0;
45 oaddr->selector = 0;
46 iaddr = (struct address *)&soft->fip;
47 iaddr->offset = 0;
48 iaddr->selector = 0;
49 iaddr->opcode = 0;
50 soft->no_update = 1;
53 void finit(void)
55 fpstate_init_soft(&current->thread.fpu.state.soft);
59 * These are nops on the i387..
61 #define feni fnop
62 #define fdisi fnop
63 #define fsetpm fnop
65 static FUNC const finit_table[] = {
66 feni, fdisi, fclex, finit,
67 fsetpm, FPU_illegal, FPU_illegal, FPU_illegal
70 void finit_(void)
72 (finit_table[FPU_rm]) ();
75 static void fstsw_ax(void)
77 *(short *)&FPU_EAX = status_word();
78 no_ip_update = 1;
81 static FUNC const fstsw_table[] = {
82 fstsw_ax, FPU_illegal, FPU_illegal, FPU_illegal,
83 FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
86 void fstsw_(void)
88 (fstsw_table[FPU_rm]) ();
91 static FUNC const fp_nop_table[] = {
92 fnop, FPU_illegal, FPU_illegal, FPU_illegal,
93 FPU_illegal, FPU_illegal, FPU_illegal, FPU_illegal
96 void fp_nop(void)
98 (fp_nop_table[FPU_rm]) ();
101 void fld_i_(void)
103 FPU_REG *st_new_ptr;
104 int i;
105 u_char tag;
107 if (STACK_OVERFLOW) {
108 FPU_stack_overflow();
109 return;
112 /* fld st(i) */
113 i = FPU_rm;
114 if (NOT_EMPTY(i)) {
115 reg_copy(&st(i), st_new_ptr);
116 tag = FPU_gettagi(i);
117 push();
118 FPU_settag0(tag);
119 } else {
120 if (control_word & CW_Invalid) {
121 /* The masked response */
122 FPU_stack_underflow();
123 } else
124 EXCEPTION(EX_StackUnder);
129 void fxch_i(void)
131 /* fxch st(i) */
132 FPU_REG t;
133 int i = FPU_rm;
134 FPU_REG *st0_ptr = &st(0), *sti_ptr = &st(i);
135 long tag_word = fpu_tag_word;
136 int regnr = top & 7, regnri = ((regnr + i) & 7);
137 u_char st0_tag = (tag_word >> (regnr * 2)) & 3;
138 u_char sti_tag = (tag_word >> (regnri * 2)) & 3;
140 if (st0_tag == TAG_Empty) {
141 if (sti_tag == TAG_Empty) {
142 FPU_stack_underflow();
143 FPU_stack_underflow_i(i);
144 return;
146 if (control_word & CW_Invalid) {
147 /* Masked response */
148 FPU_copy_to_reg0(sti_ptr, sti_tag);
150 FPU_stack_underflow_i(i);
151 return;
153 if (sti_tag == TAG_Empty) {
154 if (control_word & CW_Invalid) {
155 /* Masked response */
156 FPU_copy_to_regi(st0_ptr, st0_tag, i);
158 FPU_stack_underflow();
159 return;
161 clear_C1();
163 reg_copy(st0_ptr, &t);
164 reg_copy(sti_ptr, st0_ptr);
165 reg_copy(&t, sti_ptr);
167 tag_word &= ~(3 << (regnr * 2)) & ~(3 << (regnri * 2));
168 tag_word |= (sti_tag << (regnr * 2)) | (st0_tag << (regnri * 2));
169 fpu_tag_word = tag_word;
172 static void fcmovCC(void)
174 /* fcmovCC st(i) */
175 int i = FPU_rm;
176 FPU_REG *st0_ptr = &st(0);
177 FPU_REG *sti_ptr = &st(i);
178 long tag_word = fpu_tag_word;
179 int regnr = top & 7;
180 int regnri = (top + i) & 7;
181 u_char sti_tag = (tag_word >> (regnri * 2)) & 3;
183 if (sti_tag == TAG_Empty) {
184 FPU_stack_underflow();
185 clear_C1();
186 return;
188 reg_copy(sti_ptr, st0_ptr);
189 tag_word &= ~(3 << (regnr * 2));
190 tag_word |= (sti_tag << (regnr * 2));
191 fpu_tag_word = tag_word;
194 void fcmovb(void)
196 if (FPU_EFLAGS & X86_EFLAGS_CF)
197 fcmovCC();
200 void fcmove(void)
202 if (FPU_EFLAGS & X86_EFLAGS_ZF)
203 fcmovCC();
206 void fcmovbe(void)
208 if (FPU_EFLAGS & (X86_EFLAGS_CF|X86_EFLAGS_ZF))
209 fcmovCC();
212 void fcmovu(void)
214 if (FPU_EFLAGS & X86_EFLAGS_PF)
215 fcmovCC();
218 void fcmovnb(void)
220 if (!(FPU_EFLAGS & X86_EFLAGS_CF))
221 fcmovCC();
224 void fcmovne(void)
226 if (!(FPU_EFLAGS & X86_EFLAGS_ZF))
227 fcmovCC();
230 void fcmovnbe(void)
232 if (!(FPU_EFLAGS & (X86_EFLAGS_CF|X86_EFLAGS_ZF)))
233 fcmovCC();
236 void fcmovnu(void)
238 if (!(FPU_EFLAGS & X86_EFLAGS_PF))
239 fcmovCC();
242 void ffree_(void)
244 /* ffree st(i) */
245 FPU_settagi(FPU_rm, TAG_Empty);
248 void ffreep(void)
250 /* ffree st(i) + pop - unofficial code */
251 FPU_settagi(FPU_rm, TAG_Empty);
252 FPU_pop();
255 void fst_i_(void)
257 /* fst st(i) */
258 FPU_copy_to_regi(&st(0), FPU_gettag0(), FPU_rm);
261 void fstp_i(void)
263 /* fstp st(i) */
264 FPU_copy_to_regi(&st(0), FPU_gettag0(), FPU_rm);
265 FPU_pop();