2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 * Copyright (C) 2011 Don Zickus Red Hat, Inc.
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * Handle hardware traps and faults.
13 #include <linux/spinlock.h>
14 #include <linux/kprobes.h>
15 #include <linux/kdebug.h>
16 #include <linux/nmi.h>
17 #include <linux/delay.h>
18 #include <linux/hardirq.h>
19 #include <linux/slab.h>
20 #include <linux/export.h>
22 #include <linux/mca.h>
24 #if defined(CONFIG_EDAC)
25 #include <linux/edac.h>
28 #include <linux/atomic.h>
29 #include <asm/traps.h>
30 #include <asm/mach_traps.h>
33 #define NMI_MAX_NAMELEN 16
35 struct list_head list
;
36 nmi_handler_t handler
;
43 struct list_head head
;
46 static struct nmi_desc nmi_desc
[NMI_MAX
] =
49 .lock
= __SPIN_LOCK_UNLOCKED(&nmi_desc
[0].lock
),
50 .head
= LIST_HEAD_INIT(nmi_desc
[0].head
),
53 .lock
= __SPIN_LOCK_UNLOCKED(&nmi_desc
[1].lock
),
54 .head
= LIST_HEAD_INIT(nmi_desc
[1].head
),
62 unsigned int external
;
66 static DEFINE_PER_CPU(struct nmi_stats
, nmi_stats
);
68 static int ignore_nmis
;
70 int unknown_nmi_panic
;
72 * Prevent NMI reason port (0x61) being accessed simultaneously, can
73 * only be used in NMI handler.
75 static DEFINE_RAW_SPINLOCK(nmi_reason_lock
);
77 static int __init
setup_unknown_nmi_panic(char *str
)
79 unknown_nmi_panic
= 1;
82 __setup("unknown_nmi_panic", setup_unknown_nmi_panic
);
84 #define nmi_to_desc(type) (&nmi_desc[type])
86 static int notrace __kprobes
nmi_handle(unsigned int type
, struct pt_regs
*regs
, bool b2b
)
88 struct nmi_desc
*desc
= nmi_to_desc(type
);
95 * NMIs are edge-triggered, which means if you have enough
96 * of them concurrently, you can lose some because only one
97 * can be latched at any given time. Walk the whole list
98 * to handle those situations.
100 list_for_each_entry_rcu(a
, &desc
->head
, list
)
101 handled
+= a
->handler(type
, regs
);
105 /* return total number of NMI events handled */
109 static int __setup_nmi(unsigned int type
, struct nmiaction
*action
)
111 struct nmi_desc
*desc
= nmi_to_desc(type
);
114 spin_lock_irqsave(&desc
->lock
, flags
);
117 * most handlers of type NMI_UNKNOWN never return because
118 * they just assume the NMI is theirs. Just a sanity check
119 * to manage expectations
121 WARN_ON_ONCE(type
== NMI_UNKNOWN
&& !list_empty(&desc
->head
));
124 * some handlers need to be executed first otherwise a fake
125 * event confuses some handlers (kdump uses this flag)
127 if (action
->flags
& NMI_FLAG_FIRST
)
128 list_add_rcu(&action
->list
, &desc
->head
);
130 list_add_tail_rcu(&action
->list
, &desc
->head
);
132 spin_unlock_irqrestore(&desc
->lock
, flags
);
136 static struct nmiaction
*__free_nmi(unsigned int type
, const char *name
)
138 struct nmi_desc
*desc
= nmi_to_desc(type
);
142 spin_lock_irqsave(&desc
->lock
, flags
);
144 list_for_each_entry_rcu(n
, &desc
->head
, list
) {
146 * the name passed in to describe the nmi handler
147 * is used as the lookup key
149 if (!strcmp(n
->name
, name
)) {
151 "Trying to free NMI (%s) from NMI context!\n", n
->name
);
152 list_del_rcu(&n
->list
);
157 spin_unlock_irqrestore(&desc
->lock
, flags
);
162 int register_nmi_handler(unsigned int type
, nmi_handler_t handler
,
163 unsigned long nmiflags
, const char *devname
)
165 struct nmiaction
*action
;
166 int retval
= -ENOMEM
;
171 action
= kzalloc(sizeof(struct nmiaction
), GFP_KERNEL
);
175 action
->handler
= handler
;
176 action
->flags
= nmiflags
;
177 action
->name
= kstrndup(devname
, NMI_MAX_NAMELEN
, GFP_KERNEL
);
179 goto fail_action_name
;
181 retval
= __setup_nmi(type
, action
);
196 EXPORT_SYMBOL_GPL(register_nmi_handler
);
198 void unregister_nmi_handler(unsigned int type
, const char *name
)
202 a
= __free_nmi(type
, name
);
209 EXPORT_SYMBOL_GPL(unregister_nmi_handler
);
211 static notrace __kprobes
void
212 pci_serr_error(unsigned char reason
, struct pt_regs
*regs
)
214 pr_emerg("NMI: PCI system error (SERR) for reason %02x on CPU %d.\n",
215 reason
, smp_processor_id());
218 * On some machines, PCI SERR line is used to report memory
219 * errors. EDAC makes use of it.
221 #if defined(CONFIG_EDAC)
222 if (edac_handler_set()) {
223 edac_atomic_assert_error();
228 if (panic_on_unrecovered_nmi
)
229 panic("NMI: Not continuing");
231 pr_emerg("Dazed and confused, but trying to continue\n");
233 /* Clear and disable the PCI SERR error line. */
234 reason
= (reason
& NMI_REASON_CLEAR_MASK
) | NMI_REASON_CLEAR_SERR
;
235 outb(reason
, NMI_REASON_PORT
);
238 static notrace __kprobes
void
239 io_check_error(unsigned char reason
, struct pt_regs
*regs
)
244 "NMI: IOCK error (debug interrupt?) for reason %02x on CPU %d.\n",
245 reason
, smp_processor_id());
246 show_registers(regs
);
249 panic("NMI IOCK error: Not continuing");
251 /* Re-enable the IOCK line, wait for a few seconds */
252 reason
= (reason
& NMI_REASON_CLEAR_MASK
) | NMI_REASON_CLEAR_IOCHK
;
253 outb(reason
, NMI_REASON_PORT
);
257 touch_nmi_watchdog();
261 reason
&= ~NMI_REASON_CLEAR_IOCHK
;
262 outb(reason
, NMI_REASON_PORT
);
265 static notrace __kprobes
void
266 unknown_nmi_error(unsigned char reason
, struct pt_regs
*regs
)
271 * Use 'false' as back-to-back NMIs are dealt with one level up.
272 * Of course this makes having multiple 'unknown' handlers useless
273 * as only the first one is ever run (unless it can actually determine
274 * if it caused the NMI)
276 handled
= nmi_handle(NMI_UNKNOWN
, regs
, false);
278 __this_cpu_add(nmi_stats
.unknown
, handled
);
282 __this_cpu_add(nmi_stats
.unknown
, 1);
286 * Might actually be able to figure out what the guilty party
294 pr_emerg("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
295 reason
, smp_processor_id());
297 pr_emerg("Do you have a strange power saving mode enabled?\n");
298 if (unknown_nmi_panic
|| panic_on_unrecovered_nmi
)
299 panic("NMI: Not continuing");
301 pr_emerg("Dazed and confused, but trying to continue\n");
304 static DEFINE_PER_CPU(bool, swallow_nmi
);
305 static DEFINE_PER_CPU(unsigned long, last_nmi_rip
);
307 static notrace __kprobes
void default_do_nmi(struct pt_regs
*regs
)
309 unsigned char reason
= 0;
314 * CPU-specific NMI must be processed before non-CPU-specific
315 * NMI, otherwise we may lose it, because the CPU-specific
316 * NMI can not be detected/processed on other CPUs.
320 * Back-to-back NMIs are interesting because they can either
321 * be two NMI or more than two NMIs (any thing over two is dropped
322 * due to NMI being edge-triggered). If this is the second half
323 * of the back-to-back NMI, assume we dropped things and process
324 * more handlers. Otherwise reset the 'swallow' NMI behaviour
326 if (regs
->ip
== __this_cpu_read(last_nmi_rip
))
329 __this_cpu_write(swallow_nmi
, false);
331 __this_cpu_write(last_nmi_rip
, regs
->ip
);
333 handled
= nmi_handle(NMI_LOCAL
, regs
, b2b
);
334 __this_cpu_add(nmi_stats
.normal
, handled
);
337 * There are cases when a NMI handler handles multiple
338 * events in the current NMI. One of these events may
339 * be queued for in the next NMI. Because the event is
340 * already handled, the next NMI will result in an unknown
341 * NMI. Instead lets flag this for a potential NMI to
345 __this_cpu_write(swallow_nmi
, true);
349 /* Non-CPU-specific NMI: NMI sources can be processed on any CPU */
350 raw_spin_lock(&nmi_reason_lock
);
351 reason
= get_nmi_reason();
353 if (reason
& NMI_REASON_MASK
) {
354 if (reason
& NMI_REASON_SERR
)
355 pci_serr_error(reason
, regs
);
356 else if (reason
& NMI_REASON_IOCHK
)
357 io_check_error(reason
, regs
);
360 * Reassert NMI in case it became active
361 * meanwhile as it's edge-triggered:
365 __this_cpu_add(nmi_stats
.external
, 1);
366 raw_spin_unlock(&nmi_reason_lock
);
369 raw_spin_unlock(&nmi_reason_lock
);
372 * Only one NMI can be latched at a time. To handle
373 * this we may process multiple nmi handlers at once to
374 * cover the case where an NMI is dropped. The downside
375 * to this approach is we may process an NMI prematurely,
376 * while its real NMI is sitting latched. This will cause
377 * an unknown NMI on the next run of the NMI processing.
379 * We tried to flag that condition above, by setting the
380 * swallow_nmi flag when we process more than one event.
381 * This condition is also only present on the second half
382 * of a back-to-back NMI, so we flag that condition too.
384 * If both are true, we assume we already processed this
385 * NMI previously and we swallow it. Otherwise we reset
388 * There are scenarios where we may accidentally swallow
389 * a 'real' unknown NMI. For example, while processing
390 * a perf NMI another perf NMI comes in along with a
391 * 'real' unknown NMI. These two NMIs get combined into
392 * one (as descibed above). When the next NMI gets
393 * processed, it will be flagged by perf as handled, but
394 * noone will know that there was a 'real' unknown NMI sent
395 * also. As a result it gets swallowed. Or if the first
396 * perf NMI returns two events handled then the second
397 * NMI will get eaten by the logic below, again losing a
398 * 'real' unknown NMI. But this is the best we can do
401 if (b2b
&& __this_cpu_read(swallow_nmi
))
402 __this_cpu_add(nmi_stats
.swallow
, 1);
404 unknown_nmi_error(reason
, regs
);
407 dotraplinkage notrace __kprobes
void
408 do_nmi(struct pt_regs
*regs
, long error_code
)
412 inc_irq_stat(__nmi_count
);
415 default_do_nmi(regs
);
425 void restart_nmi(void)
430 /* reset the back-to-back NMI logic */
431 void local_touch_nmi(void)
433 __this_cpu_write(last_nmi_rip
, 0);