2 * Generate .byte code for some instructions not supported by old
10 #define REG_NUM_INVALID 100
12 #define REG_TYPE_R32 0
13 #define REG_TYPE_R64 1
14 #define REG_TYPE_XMM 2
15 #define REG_TYPE_INVALID 100
17 .macro R32_NUM opd r32
18 \opd
= REG_NUM_INVALID
71 .macro R64_NUM opd r64
72 \opd
= REG_NUM_INVALID
125 .macro XMM_NUM opd xmm
126 \opd
= REG_NUM_INVALID
177 .macro REG_TYPE type reg
178 R32_NUM reg_type_r32
\reg
179 R64_NUM reg_type_r64
\reg
180 XMM_NUM reg_type_xmm
\reg
181 .if reg_type_r64
<> REG_NUM_INVALID
183 .elseif reg_type_r32
<> REG_NUM_INVALID
185 .elseif reg_type_xmm
<> REG_NUM_INVALID
188 \type
= REG_TYPE_INVALID
196 .macro PFX_REX opd1 opd2 W
=0
197 .if ((\opd1
| \opd2
) & 8) || \W
198 .byte
0x40 | ((\opd1
& 8) >> 3) | ((\opd2
& 8) >> 1) | (\W
<< 3)
202 .macro MODRM mod opd1 opd2
203 .byte \mod
| (\opd1
& 7) | ((\opd2
& 7) << 3)
206 .macro PSHUFB_XMM xmm1 xmm2
207 XMM_NUM pshufb_opd1 \xmm1
208 XMM_NUM pshufb_opd2 \xmm2
210 PFX_REX pshufb_opd1 pshufb_opd2
211 .byte
0x0f, 0x38, 0x00
212 MODRM
0xc0 pshufb_opd1 pshufb_opd2
215 .macro PCLMULQDQ imm8 xmm1 xmm2
216 XMM_NUM clmul_opd1 \xmm1
217 XMM_NUM clmul_opd2 \xmm2
219 PFX_REX clmul_opd1 clmul_opd2
220 .byte
0x0f, 0x3a, 0x44
221 MODRM
0xc0 clmul_opd1 clmul_opd2
225 .macro PEXTRD imm8 xmm gpr
226 R32_NUM extrd_opd1 \gpr
227 XMM_NUM extrd_opd2 \xmm
229 PFX_REX extrd_opd1 extrd_opd2
230 .byte
0x0f, 0x3a, 0x16
231 MODRM
0xc0 extrd_opd1 extrd_opd2
235 .macro AESKEYGENASSIST rcon xmm1 xmm2
236 XMM_NUM aeskeygen_opd1 \xmm1
237 XMM_NUM aeskeygen_opd2 \xmm2
239 PFX_REX aeskeygen_opd1 aeskeygen_opd2
240 .byte
0x0f, 0x3a, 0xdf
241 MODRM
0xc0 aeskeygen_opd1 aeskeygen_opd2
245 .macro AESIMC xmm1 xmm2
246 XMM_NUM aesimc_opd1 \xmm1
247 XMM_NUM aesimc_opd2 \xmm2
249 PFX_REX aesimc_opd1 aesimc_opd2
250 .byte
0x0f, 0x38, 0xdb
251 MODRM
0xc0 aesimc_opd1 aesimc_opd2
254 .macro AESENC xmm1 xmm2
255 XMM_NUM aesenc_opd1 \xmm1
256 XMM_NUM aesenc_opd2 \xmm2
258 PFX_REX aesenc_opd1 aesenc_opd2
259 .byte
0x0f, 0x38, 0xdc
260 MODRM
0xc0 aesenc_opd1 aesenc_opd2
263 .macro AESENCLAST xmm1 xmm2
264 XMM_NUM aesenclast_opd1 \xmm1
265 XMM_NUM aesenclast_opd2 \xmm2
267 PFX_REX aesenclast_opd1 aesenclast_opd2
268 .byte
0x0f, 0x38, 0xdd
269 MODRM
0xc0 aesenclast_opd1 aesenclast_opd2
272 .macro AESDEC xmm1 xmm2
273 XMM_NUM aesdec_opd1 \xmm1
274 XMM_NUM aesdec_opd2 \xmm2
276 PFX_REX aesdec_opd1 aesdec_opd2
277 .byte
0x0f, 0x38, 0xde
278 MODRM
0xc0 aesdec_opd1 aesdec_opd2
281 .macro AESDECLAST xmm1 xmm2
282 XMM_NUM aesdeclast_opd1 \xmm1
283 XMM_NUM aesdeclast_opd2 \xmm2
285 PFX_REX aesdeclast_opd1 aesdeclast_opd2
286 .byte
0x0f, 0x38, 0xdf
287 MODRM
0xc0 aesdeclast_opd1 aesdeclast_opd2
290 .macro MOVQ_R64_XMM opd1 opd2
291 REG_TYPE movq_r64_xmm_opd1_type \opd1
292 .if movq_r64_xmm_opd1_type
== REG_TYPE_XMM
293 XMM_NUM movq_r64_xmm_opd1 \opd1
294 R64_NUM movq_r64_xmm_opd2 \opd2
296 R64_NUM movq_r64_xmm_opd1 \opd1
297 XMM_NUM movq_r64_xmm_opd2 \opd2
300 PFX_REX movq_r64_xmm_opd1 movq_r64_xmm_opd2
1
301 .if movq_r64_xmm_opd1_type
== REG_TYPE_XMM
306 MODRM
0xc0 movq_r64_xmm_opd1 movq_r64_xmm_opd2