2 * Intel OnChip System Fabric MailBox access support
5 #ifndef IOSF_MBI_SYMS_H
6 #define IOSF_MBI_SYMS_H
8 #include <linux/notifier.h>
10 #define MBI_MCR_OFFSET 0xD0
11 #define MBI_MDR_OFFSET 0xD4
12 #define MBI_MCRX_OFFSET 0xD8
14 #define MBI_RD_MASK 0xFEFFFFFF
15 #define MBI_WR_MASK 0X01000000
17 #define MBI_MASK_HI 0xFFFFFF00
18 #define MBI_MASK_LO 0x000000FF
19 #define MBI_ENABLE 0xF0
21 /* IOSF SB read/write opcodes */
22 #define MBI_MMIO_READ 0x00
23 #define MBI_MMIO_WRITE 0x01
24 #define MBI_CFG_READ 0x04
25 #define MBI_CFG_WRITE 0x05
26 #define MBI_CR_READ 0x06
27 #define MBI_CR_WRITE 0x07
28 #define MBI_REG_READ 0x10
29 #define MBI_REG_WRITE 0x11
30 #define MBI_ESRAM_READ 0x12
31 #define MBI_ESRAM_WRITE 0x13
33 /* Baytrail available units */
34 #define BT_MBI_UNIT_AUNIT 0x00
35 #define BT_MBI_UNIT_SMC 0x01
36 #define BT_MBI_UNIT_CPU 0x02
37 #define BT_MBI_UNIT_BUNIT 0x03
38 #define BT_MBI_UNIT_PMC 0x04
39 #define BT_MBI_UNIT_GFX 0x06
40 #define BT_MBI_UNIT_SMI 0x0C
41 #define BT_MBI_UNIT_USB 0x43
42 #define BT_MBI_UNIT_SATA 0xA3
43 #define BT_MBI_UNIT_PCIE 0xA6
45 /* Quark available units */
46 #define QRK_MBI_UNIT_HBA 0x00
47 #define QRK_MBI_UNIT_HB 0x03
48 #define QRK_MBI_UNIT_RMU 0x04
49 #define QRK_MBI_UNIT_MM 0x05
50 #define QRK_MBI_UNIT_SOC 0x31
52 /* Action values for the pmic_bus_access_notifier functions */
53 #define MBI_PMIC_BUS_ACCESS_BEGIN 1
54 #define MBI_PMIC_BUS_ACCESS_END 2
56 #if IS_ENABLED(CONFIG_IOSF_MBI)
58 bool iosf_mbi_available(void);
61 * iosf_mbi_read() - MailBox Interface read command
62 * @port: port indicating subunit being accessed
63 * @opcode: port specific read or write opcode
64 * @offset: register address offset
65 * @mdr: register data to be read
67 * Locking is handled by spinlock - cannot sleep.
68 * Return: Nonzero on error
70 int iosf_mbi_read(u8 port
, u8 opcode
, u32 offset
, u32
*mdr
);
73 * iosf_mbi_write() - MailBox unmasked write command
74 * @port: port indicating subunit being accessed
75 * @opcode: port specific read or write opcode
76 * @offset: register address offset
77 * @mdr: register data to be written
79 * Locking is handled by spinlock - cannot sleep.
80 * Return: Nonzero on error
82 int iosf_mbi_write(u8 port
, u8 opcode
, u32 offset
, u32 mdr
);
85 * iosf_mbi_modify() - MailBox masked write command
86 * @port: port indicating subunit being accessed
87 * @opcode: port specific read or write opcode
88 * @offset: register address offset
89 * @mdr: register data being modified
90 * @mask: mask indicating bits in mdr to be modified
92 * Locking is handled by spinlock - cannot sleep.
93 * Return: Nonzero on error
95 int iosf_mbi_modify(u8 port
, u8 opcode
, u32 offset
, u32 mdr
, u32 mask
);
98 * iosf_mbi_punit_acquire() - Acquire access to the P-Unit
100 * One some systems the P-Unit accesses the PMIC to change various voltages
101 * through the same bus as other kernel drivers use for e.g. battery monitoring.
103 * If a driver sends requests to the P-Unit which require the P-Unit to access
104 * the PMIC bus while another driver is also accessing the PMIC bus various bad
107 * To avoid these problems this function must be called before accessing the
108 * P-Unit or the PMIC, be it through iosf_mbi* functions or through other means.
110 * Note on these systems the i2c-bus driver will request a sempahore from the
111 * P-Unit for exclusive access to the PMIC bus when i2c drivers are accessing
112 * it, but this does not appear to be sufficient, we still need to avoid making
113 * certain P-Unit requests during the access window to avoid problems.
115 * This function locks a mutex, as such it may sleep.
117 void iosf_mbi_punit_acquire(void);
120 * iosf_mbi_punit_release() - Release access to the P-Unit
122 void iosf_mbi_punit_release(void);
125 * iosf_mbi_register_pmic_bus_access_notifier - Register PMIC bus notifier
127 * This function can be used by drivers which may need to acquire P-Unit
128 * managed resources from interrupt context, where iosf_mbi_punit_acquire()
131 * This function allows a driver to register a notifier to get notified (in a
132 * process context) before other drivers start accessing the PMIC bus.
134 * This allows the driver to acquire any resources, which it may need during
135 * the window the other driver is accessing the PMIC, before hand.
137 * @nb: notifier_block to register
139 int iosf_mbi_register_pmic_bus_access_notifier(struct notifier_block
*nb
);
142 * iosf_mbi_register_pmic_bus_access_notifier - Unregister PMIC bus notifier
144 * @nb: notifier_block to unregister
146 int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block
*nb
);
149 * iosf_mbi_call_pmic_bus_access_notifier_chain - Call PMIC bus notifier chain
151 * @val: action to pass into listener's notifier_call function
152 * @v: data pointer to pass into listener's notifier_call function
154 int iosf_mbi_call_pmic_bus_access_notifier_chain(unsigned long val
, void *v
);
156 #else /* CONFIG_IOSF_MBI is not enabled */
158 bool iosf_mbi_available(void)
164 int iosf_mbi_read(u8 port
, u8 opcode
, u32 offset
, u32
*mdr
)
166 WARN(1, "IOSF_MBI driver not available");
171 int iosf_mbi_write(u8 port
, u8 opcode
, u32 offset
, u32 mdr
)
173 WARN(1, "IOSF_MBI driver not available");
178 int iosf_mbi_modify(u8 port
, u8 opcode
, u32 offset
, u32 mdr
, u32 mask
)
180 WARN(1, "IOSF_MBI driver not available");
184 static inline void iosf_mbi_punit_acquire(void) {}
185 static inline void iosf_mbi_punit_release(void) {}
188 int iosf_mbi_register_pmic_bus_access_notifier(struct notifier_block
*nb
)
194 int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block
*nb
)
200 int iosf_mbi_call_pmic_bus_access_notifier_chain(unsigned long val
, void *v
)
205 #endif /* CONFIG_IOSF_MBI */
207 #endif /* IOSF_MBI_SYMS_H */