2 * Copyright (c) 2009 Nuvoton technology.
3 * Wan ZongShun <mcuos.com@gmail.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/spinlock.h>
13 #include <linux/interrupt.h>
14 #include <linux/delay.h>
15 #include <linux/errno.h>
16 #include <linux/err.h>
17 #include <linux/clk.h>
18 #include <linux/device.h>
19 #include <linux/platform_device.h>
20 #include <linux/gpio.h>
22 #include <linux/slab.h>
24 #include <linux/spi/spi.h>
25 #include <linux/spi/spi_bitbang.h>
27 #include <linux/platform_data/spi-nuc900.h>
29 /* usi registers offset */
36 /* usi register bit */
37 #define ENINT (0x01 << 17)
38 #define ENFLG (0x01 << 16)
39 #define SLEEP (0x0f << 12)
40 #define TXNUM (0x03 << 8)
41 #define TXBITLEN (0x1f << 3)
42 #define TXNEG (0x01 << 2)
43 #define RXNEG (0x01 << 1)
44 #define LSB (0x01 << 10)
45 #define SELECTLEV (0x01 << 2)
46 #define SELECTPOL (0x01 << 31)
47 #define SELECTSLAVE 0x01
51 struct spi_bitbang bitbang
;
52 struct completion done
;
57 const unsigned char *tx
;
60 struct spi_master
*master
;
61 struct nuc900_spi_info
*pdata
;
65 static inline struct nuc900_spi
*to_hw(struct spi_device
*sdev
)
67 return spi_master_get_devdata(sdev
->master
);
70 static void nuc900_slave_select(struct spi_device
*spi
, unsigned int ssr
)
72 struct nuc900_spi
*hw
= to_hw(spi
);
74 unsigned int cs
= spi
->mode
& SPI_CS_HIGH
? 1 : 0;
75 unsigned int cpol
= spi
->mode
& SPI_CPOL
? 1 : 0;
78 spin_lock_irqsave(&hw
->lock
, flags
);
80 val
= __raw_readl(hw
->regs
+ USI_SSR
);
92 __raw_writel(val
, hw
->regs
+ USI_SSR
);
94 val
= __raw_readl(hw
->regs
+ USI_CNT
);
101 __raw_writel(val
, hw
->regs
+ USI_CNT
);
103 spin_unlock_irqrestore(&hw
->lock
, flags
);
106 static void nuc900_spi_chipsel(struct spi_device
*spi
, int value
)
109 case BITBANG_CS_INACTIVE
:
110 nuc900_slave_select(spi
, 0);
113 case BITBANG_CS_ACTIVE
:
114 nuc900_slave_select(spi
, 1);
119 static void nuc900_spi_setup_txnum(struct nuc900_spi
*hw
, unsigned int txnum
)
124 spin_lock_irqsave(&hw
->lock
, flags
);
126 val
= __raw_readl(hw
->regs
+ USI_CNT
) & ~TXNUM
;
129 val
|= txnum
<< 0x08;
131 __raw_writel(val
, hw
->regs
+ USI_CNT
);
133 spin_unlock_irqrestore(&hw
->lock
, flags
);
137 static void nuc900_spi_setup_txbitlen(struct nuc900_spi
*hw
,
138 unsigned int txbitlen
)
143 spin_lock_irqsave(&hw
->lock
, flags
);
145 val
= __raw_readl(hw
->regs
+ USI_CNT
) & ~TXBITLEN
;
147 val
|= (txbitlen
<< 0x03);
149 __raw_writel(val
, hw
->regs
+ USI_CNT
);
151 spin_unlock_irqrestore(&hw
->lock
, flags
);
154 static void nuc900_spi_gobusy(struct nuc900_spi
*hw
)
159 spin_lock_irqsave(&hw
->lock
, flags
);
161 val
= __raw_readl(hw
->regs
+ USI_CNT
);
165 __raw_writel(val
, hw
->regs
+ USI_CNT
);
167 spin_unlock_irqrestore(&hw
->lock
, flags
);
170 static inline unsigned int hw_txbyte(struct nuc900_spi
*hw
, int count
)
172 return hw
->tx
? hw
->tx
[count
] : 0;
175 static int nuc900_spi_txrx(struct spi_device
*spi
, struct spi_transfer
*t
)
177 struct nuc900_spi
*hw
= to_hw(spi
);
184 __raw_writel(hw_txbyte(hw
, 0x0), hw
->regs
+ USI_TX0
);
186 nuc900_spi_gobusy(hw
);
188 wait_for_completion(&hw
->done
);
193 static irqreturn_t
nuc900_spi_irq(int irq
, void *dev
)
195 struct nuc900_spi
*hw
= dev
;
197 unsigned int count
= hw
->count
;
199 status
= __raw_readl(hw
->regs
+ USI_CNT
);
200 __raw_writel(status
, hw
->regs
+ USI_CNT
);
202 if (status
& ENFLG
) {
206 hw
->rx
[count
] = __raw_readl(hw
->regs
+ USI_RX0
);
209 if (count
< hw
->len
) {
210 __raw_writel(hw_txbyte(hw
, count
), hw
->regs
+ USI_TX0
);
211 nuc900_spi_gobusy(hw
);
223 static void nuc900_tx_edge(struct nuc900_spi
*hw
, unsigned int edge
)
228 spin_lock_irqsave(&hw
->lock
, flags
);
230 val
= __raw_readl(hw
->regs
+ USI_CNT
);
236 __raw_writel(val
, hw
->regs
+ USI_CNT
);
238 spin_unlock_irqrestore(&hw
->lock
, flags
);
241 static void nuc900_rx_edge(struct nuc900_spi
*hw
, unsigned int edge
)
246 spin_lock_irqsave(&hw
->lock
, flags
);
248 val
= __raw_readl(hw
->regs
+ USI_CNT
);
254 __raw_writel(val
, hw
->regs
+ USI_CNT
);
256 spin_unlock_irqrestore(&hw
->lock
, flags
);
259 static void nuc900_send_first(struct nuc900_spi
*hw
, unsigned int lsb
)
264 spin_lock_irqsave(&hw
->lock
, flags
);
266 val
= __raw_readl(hw
->regs
+ USI_CNT
);
272 __raw_writel(val
, hw
->regs
+ USI_CNT
);
274 spin_unlock_irqrestore(&hw
->lock
, flags
);
277 static void nuc900_set_sleep(struct nuc900_spi
*hw
, unsigned int sleep
)
282 spin_lock_irqsave(&hw
->lock
, flags
);
284 val
= __raw_readl(hw
->regs
+ USI_CNT
) & ~SLEEP
;
287 val
|= (sleep
<< 12);
289 __raw_writel(val
, hw
->regs
+ USI_CNT
);
291 spin_unlock_irqrestore(&hw
->lock
, flags
);
294 static void nuc900_enable_int(struct nuc900_spi
*hw
)
299 spin_lock_irqsave(&hw
->lock
, flags
);
301 val
= __raw_readl(hw
->regs
+ USI_CNT
);
305 __raw_writel(val
, hw
->regs
+ USI_CNT
);
307 spin_unlock_irqrestore(&hw
->lock
, flags
);
310 static void nuc900_set_divider(struct nuc900_spi
*hw
)
312 __raw_writel(hw
->pdata
->divider
, hw
->regs
+ USI_DIV
);
315 static void nuc900_init_spi(struct nuc900_spi
*hw
)
318 spin_lock_init(&hw
->lock
);
320 nuc900_tx_edge(hw
, hw
->pdata
->txneg
);
321 nuc900_rx_edge(hw
, hw
->pdata
->rxneg
);
322 nuc900_send_first(hw
, hw
->pdata
->lsb
);
323 nuc900_set_sleep(hw
, hw
->pdata
->sleep
);
324 nuc900_spi_setup_txbitlen(hw
, hw
->pdata
->txbitlen
);
325 nuc900_spi_setup_txnum(hw
, hw
->pdata
->txnum
);
326 nuc900_set_divider(hw
);
327 nuc900_enable_int(hw
);
330 static int nuc900_spi_probe(struct platform_device
*pdev
)
332 struct nuc900_spi
*hw
;
333 struct spi_master
*master
;
334 struct resource
*res
;
337 master
= spi_alloc_master(&pdev
->dev
, sizeof(struct nuc900_spi
));
338 if (master
== NULL
) {
339 dev_err(&pdev
->dev
, "No memory for spi_master\n");
343 hw
= spi_master_get_devdata(master
);
345 hw
->pdata
= dev_get_platdata(&pdev
->dev
);
347 if (hw
->pdata
== NULL
) {
348 dev_err(&pdev
->dev
, "No platform data supplied\n");
353 platform_set_drvdata(pdev
, hw
);
354 init_completion(&hw
->done
);
356 master
->mode_bits
= SPI_CPOL
| SPI_CPHA
| SPI_CS_HIGH
;
358 master
->mode_bits
|= SPI_LSB_FIRST
;
359 master
->num_chipselect
= hw
->pdata
->num_cs
;
360 master
->bus_num
= hw
->pdata
->bus_num
;
361 hw
->bitbang
.master
= hw
->master
;
362 hw
->bitbang
.chipselect
= nuc900_spi_chipsel
;
363 hw
->bitbang
.txrx_bufs
= nuc900_spi_txrx
;
365 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
366 hw
->regs
= devm_ioremap_resource(&pdev
->dev
, res
);
367 if (IS_ERR(hw
->regs
)) {
368 err
= PTR_ERR(hw
->regs
);
372 hw
->irq
= platform_get_irq(pdev
, 0);
374 dev_err(&pdev
->dev
, "No IRQ specified\n");
379 err
= devm_request_irq(&pdev
->dev
, hw
->irq
, nuc900_spi_irq
, 0,
382 dev_err(&pdev
->dev
, "Cannot claim IRQ\n");
386 hw
->clk
= devm_clk_get(&pdev
->dev
, "spi");
387 if (IS_ERR(hw
->clk
)) {
388 dev_err(&pdev
->dev
, "No clock for device\n");
389 err
= PTR_ERR(hw
->clk
);
393 mfp_set_groupg(&pdev
->dev
, NULL
);
396 err
= spi_bitbang_start(&hw
->bitbang
);
398 dev_err(&pdev
->dev
, "Failed to register SPI master\n");
405 clk_disable(hw
->clk
);
407 spi_master_put(hw
->master
);
411 static int nuc900_spi_remove(struct platform_device
*dev
)
413 struct nuc900_spi
*hw
= platform_get_drvdata(dev
);
415 spi_bitbang_stop(&hw
->bitbang
);
416 clk_disable(hw
->clk
);
417 spi_master_put(hw
->master
);
421 static struct platform_driver nuc900_spi_driver
= {
422 .probe
= nuc900_spi_probe
,
423 .remove
= nuc900_spi_remove
,
425 .name
= "nuc900-spi",
426 .owner
= THIS_MODULE
,
429 module_platform_driver(nuc900_spi_driver
);
431 MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
432 MODULE_DESCRIPTION("nuc900 spi driver!");
433 MODULE_LICENSE("GPL");
434 MODULE_ALIAS("platform:nuc900-spi");