?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
PM / Runtime: Add no_callbacks flag
[linux/fpc-iii.git] / drivers / net / atl1e / atl1e_main.c
blob1acea5774e8936ed0b78352c871b8b0d9734b518
1 /*
2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1e.h"
23
24 #define DRV_VERSION "1.0.0.7-NAPI"
25
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
29 /*
30 * atl1e_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
38 static DEFINE_PCI_DEVICE_TABLE(atl1e_pci_tbl) = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
41 /* required last entry */
42 { 0 }
43 };
44 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45
46 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48 MODULE_LICENSE("GPL");
49 MODULE_VERSION(DRV_VERSION);
50
51 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
52
53 static const u16
54 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
60 };
61
62 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63 {
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
67 REG_RXF3_BASE_ADDR_HI
68 };
69
70 static const u16
71 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72 {
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
77 };
78
79 static const u16
80 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81 {
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
86 };
87
88 static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
90 };
91
92 /*
93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
95 */
96 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97 {
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
102 }
103 }
104
105 /*
106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
108 */
109 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110 {
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
115 }
116
117 /*
118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
120 */
121 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122 {
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
127 }
128
129 /*
130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
132 */
133 static void atl1e_phy_config(unsigned long data)
134 {
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
137 unsigned long flags;
138
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
142 }
143
144 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
145 {
146
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
149 msleep(1);
150 atl1e_down(adapter);
151 atl1e_up(adapter);
152 clear_bit(__AT_RESETTING, &adapter->flags);
153 }
154
155 static void atl1e_reset_task(struct work_struct *work)
156 {
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
159
160 atl1e_reinit_locked(adapter);
161 }
162
163 static int atl1e_check_link(struct atl1e_adapter *adapter)
164 {
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
167 int err = 0;
168 u16 speed, duplex, phy_data;
169
170 /* MII_BMSR must read twice */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
174 /* link down */
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
176 u32 value;
177 /* disable rx */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
184 }
185 } else {
186 /* Link Up */
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
188 if (unlikely(err))
189 return err;
190
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
197 netdev_info(netdev,
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
199 adapter->link_speed,
200 adapter->link_duplex == FULL_DUPLEX ?
201 "Full" : "Half");
202 }
203
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
208 }
209 }
210 return 0;
211 }
212
213 /*
214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
216 */
217 static void atl1e_link_chg_task(struct work_struct *work)
218 {
219 struct atl1e_adapter *adapter;
220 unsigned long flags;
221
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
226 }
227
228 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
229 {
230 struct net_device *netdev = adapter->netdev;
231 u16 phy_data = 0;
232 u16 link_up = 0;
233
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
240 if (!link_up) {
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
243 netdev_info(netdev, "NIC Link is Down\n");
244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
246 }
247 }
248 schedule_work(&adapter->link_chg_task);
249 }
250
251 static void atl1e_del_timer(struct atl1e_adapter *adapter)
252 {
253 del_timer_sync(&adapter->phy_config_timer);
254 }
255
256 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
257 {
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
260 }
261
262 /*
263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
265 */
266 static void atl1e_tx_timeout(struct net_device *netdev)
267 {
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
272 }
273
274 /*
275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
277 *
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
282 */
283 static void atl1e_set_multi(struct net_device *netdev)
284 {
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
287 struct netdev_hw_addr *ha;
288 u32 mac_ctrl_data = 0;
289 u32 hash_value;
290
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
293
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
299 } else {
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
301 }
302
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
304
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
308
309 /* comoute mc addresses' hash value ,and put it into hash table */
310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
312 atl1e_hash_set(hw, hash_value);
313 }
314 }
315
316 static void atl1e_vlan_rx_register(struct net_device *netdev,
317 struct vlan_group *grp)
318 {
319 struct atl1e_adapter *adapter = netdev_priv(netdev);
320 u32 mac_ctrl_data = 0;
321
322 netdev_dbg(adapter->netdev, "%s\n", __func__);
323
324 atl1e_irq_disable(adapter);
325
326 adapter->vlgrp = grp;
327 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
328
329 if (grp) {
330 /* enable VLAN tag insert/strip */
331 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
332 } else {
333 /* disable VLAN tag insert/strip */
334 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
335 }
336
337 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
338 atl1e_irq_enable(adapter);
339 }
340
341 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
342 {
343 netdev_dbg(adapter->netdev, "%s\n", __func__);
344 atl1e_vlan_rx_register(adapter->netdev, adapter->vlgrp);
345 }
346 /*
347 * atl1e_set_mac - Change the Ethernet Address of the NIC
348 * @netdev: network interface device structure
349 * @p: pointer to an address structure
350 *
351 * Returns 0 on success, negative on failure
352 */
353 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
354 {
355 struct atl1e_adapter *adapter = netdev_priv(netdev);
356 struct sockaddr *addr = p;
357
358 if (!is_valid_ether_addr(addr->sa_data))
359 return -EADDRNOTAVAIL;
360
361 if (netif_running(netdev))
362 return -EBUSY;
363
364 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
365 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
366
367 atl1e_hw_set_mac_addr(&adapter->hw);
368
369 return 0;
370 }
371
372 /*
373 * atl1e_change_mtu - Change the Maximum Transfer Unit
374 * @netdev: network interface device structure
375 * @new_mtu: new value for maximum frame size
376 *
377 * Returns 0 on success, negative on failure
378 */
379 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
380 {
381 struct atl1e_adapter *adapter = netdev_priv(netdev);
382 int old_mtu = netdev->mtu;
383 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
384
385 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
386 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
387 netdev_warn(adapter->netdev, "invalid MTU setting\n");
388 return -EINVAL;
389 }
390 /* set MTU */
391 if (old_mtu != new_mtu && netif_running(netdev)) {
392 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
393 msleep(1);
394 netdev->mtu = new_mtu;
395 adapter->hw.max_frame_size = new_mtu;
396 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
397 atl1e_down(adapter);
398 atl1e_up(adapter);
399 clear_bit(__AT_RESETTING, &adapter->flags);
400 }
401 return 0;
402 }
403
404 /*
405 * caller should hold mdio_lock
406 */
407 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
408 {
409 struct atl1e_adapter *adapter = netdev_priv(netdev);
410 u16 result;
411
412 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
413 return result;
414 }
415
416 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
417 int reg_num, int val)
418 {
419 struct atl1e_adapter *adapter = netdev_priv(netdev);
420
421 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
422 }
423
424 /*
425 * atl1e_mii_ioctl -
426 * @netdev:
427 * @ifreq:
428 * @cmd:
429 */
430 static int atl1e_mii_ioctl(struct net_device *netdev,
431 struct ifreq *ifr, int cmd)
432 {
433 struct atl1e_adapter *adapter = netdev_priv(netdev);
434 struct mii_ioctl_data *data = if_mii(ifr);
435 unsigned long flags;
436 int retval = 0;
437
438 if (!netif_running(netdev))
439 return -EINVAL;
440
441 spin_lock_irqsave(&adapter->mdio_lock, flags);
442 switch (cmd) {
443 case SIOCGMIIPHY:
444 data->phy_id = 0;
445 break;
446
447 case SIOCGMIIREG:
448 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
449 &data->val_out)) {
450 retval = -EIO;
451 goto out;
452 }
453 break;
454
455 case SIOCSMIIREG:
456 if (data->reg_num & ~(0x1F)) {
457 retval = -EFAULT;
458 goto out;
459 }
460
461 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
462 data->reg_num, data->val_in);
463 if (atl1e_write_phy_reg(&adapter->hw,
464 data->reg_num, data->val_in)) {
465 retval = -EIO;
466 goto out;
467 }
468 break;
469
470 default:
471 retval = -EOPNOTSUPP;
472 break;
473 }
474 out:
475 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
476 return retval;
477
478 }
479
480 /*
481 * atl1e_ioctl -
482 * @netdev:
483 * @ifreq:
484 * @cmd:
485 */
486 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
487 {
488 switch (cmd) {
489 case SIOCGMIIPHY:
490 case SIOCGMIIREG:
491 case SIOCSMIIREG:
492 return atl1e_mii_ioctl(netdev, ifr, cmd);
493 default:
494 return -EOPNOTSUPP;
495 }
496 }
497
498 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
499 {
500 u16 cmd;
501
502 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
503 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
504 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
505 pci_write_config_word(pdev, PCI_COMMAND, cmd);
506
507 /*
508 * some motherboards BIOS(PXE/EFI) driver may set PME
509 * while they transfer control to OS (Windows/Linux)
510 * so we should clear this bit before NIC work normally
511 */
512 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
513 msleep(1);
514 }
515
516 /*
517 * atl1e_alloc_queues - Allocate memory for all rings
518 * @adapter: board private structure to initialize
519 *
520 */
521 static int __devinit atl1e_alloc_queues(struct atl1e_adapter *adapter)
522 {
523 return 0;
524 }
525
526 /*
527 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
528 * @adapter: board private structure to initialize
529 *
530 * atl1e_sw_init initializes the Adapter private data structure.
531 * Fields are initialized based on PCI device information and
532 * OS network device settings (MTU size).
533 */
534 static int __devinit atl1e_sw_init(struct atl1e_adapter *adapter)
535 {
536 struct atl1e_hw *hw = &adapter->hw;
537 struct pci_dev *pdev = adapter->pdev;
538 u32 phy_status_data = 0;
539
540 adapter->wol = 0;
541 adapter->link_speed = SPEED_0; /* hardware init */
542 adapter->link_duplex = FULL_DUPLEX;
543 adapter->num_rx_queues = 1;
544
545 /* PCI config space info */
546 hw->vendor_id = pdev->vendor;
547 hw->device_id = pdev->device;
548 hw->subsystem_vendor_id = pdev->subsystem_vendor;
549 hw->subsystem_id = pdev->subsystem_device;
550
551 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
552 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
553
554 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
555 /* nic type */
556 if (hw->revision_id >= 0xF0) {
557 hw->nic_type = athr_l2e_revB;
558 } else {
559 if (phy_status_data & PHY_STATUS_100M)
560 hw->nic_type = athr_l1e;
561 else
562 hw->nic_type = athr_l2e_revA;
563 }
564
565 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
566
567 if (phy_status_data & PHY_STATUS_EMI_CA)
568 hw->emi_ca = true;
569 else
570 hw->emi_ca = false;
571
572 hw->phy_configured = false;
573 hw->preamble_len = 7;
574 hw->max_frame_size = adapter->netdev->mtu;
575 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
576 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
577
578 hw->rrs_type = atl1e_rrs_disable;
579 hw->indirect_tab = 0;
580 hw->base_cpu = 0;
581
582 /* need confirm */
583
584 hw->ict = 50000; /* 100ms */
585 hw->smb_timer = 200000; /* 200ms */
586 hw->tpd_burst = 5;
587 hw->rrd_thresh = 1;
588 hw->tpd_thresh = adapter->tx_ring.count / 2;
589 hw->rx_count_down = 4; /* 2us resolution */
590 hw->tx_count_down = hw->imt * 4 / 3;
591 hw->dmar_block = atl1e_dma_req_1024;
592 hw->dmaw_block = atl1e_dma_req_1024;
593 hw->dmar_dly_cnt = 15;
594 hw->dmaw_dly_cnt = 4;
595
596 if (atl1e_alloc_queues(adapter)) {
597 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
598 return -ENOMEM;
599 }
600
601 atomic_set(&adapter->irq_sem, 1);
602 spin_lock_init(&adapter->mdio_lock);
603 spin_lock_init(&adapter->tx_lock);
604
605 set_bit(__AT_DOWN, &adapter->flags);
606
607 return 0;
608 }
609
610 /*
611 * atl1e_clean_tx_ring - Free Tx-skb
612 * @adapter: board private structure
613 */
614 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
615 {
616 struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
617 &adapter->tx_ring;
618 struct atl1e_tx_buffer *tx_buffer = NULL;
619 struct pci_dev *pdev = adapter->pdev;
620 u16 index, ring_count;
621
622 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
623 return;
624
625 ring_count = tx_ring->count;
626 /* first unmmap dma */
627 for (index = 0; index < ring_count; index++) {
628 tx_buffer = &tx_ring->tx_buffer[index];
629 if (tx_buffer->dma) {
630 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
631 pci_unmap_single(pdev, tx_buffer->dma,
632 tx_buffer->length, PCI_DMA_TODEVICE);
633 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
634 pci_unmap_page(pdev, tx_buffer->dma,
635 tx_buffer->length, PCI_DMA_TODEVICE);
636 tx_buffer->dma = 0;
637 }
638 }
639 /* second free skb */
640 for (index = 0; index < ring_count; index++) {
641 tx_buffer = &tx_ring->tx_buffer[index];
642 if (tx_buffer->skb) {
643 dev_kfree_skb_any(tx_buffer->skb);
644 tx_buffer->skb = NULL;
645 }
646 }
647 /* Zero out Tx-buffers */
648 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
649 ring_count);
650 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
651 ring_count);
652 }
653
654 /*
655 * atl1e_clean_rx_ring - Free rx-reservation skbs
656 * @adapter: board private structure
657 */
658 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
659 {
660 struct atl1e_rx_ring *rx_ring =
661 (struct atl1e_rx_ring *)&adapter->rx_ring;
662 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
663 u16 i, j;
664
665
666 if (adapter->ring_vir_addr == NULL)
667 return;
668 /* Zero out the descriptor ring */
669 for (i = 0; i < adapter->num_rx_queues; i++) {
670 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
671 if (rx_page_desc[i].rx_page[j].addr != NULL) {
672 memset(rx_page_desc[i].rx_page[j].addr, 0,
673 rx_ring->real_page_size);
674 }
675 }
676 }
677 }
678
679 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
680 {
681 *ring_size = ((u32)(adapter->tx_ring.count *
682 sizeof(struct atl1e_tpd_desc) + 7
683 /* tx ring, qword align */
684 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
685 adapter->num_rx_queues + 31
686 /* rx ring, 32 bytes align */
687 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
688 sizeof(u32) + 3));
689 /* tx, rx cmd, dword align */
690 }
691
692 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
693 {
694 struct atl1e_tx_ring *tx_ring = NULL;
695 struct atl1e_rx_ring *rx_ring = NULL;
696
697 tx_ring = &adapter->tx_ring;
698 rx_ring = &adapter->rx_ring;
699
700 rx_ring->real_page_size = adapter->rx_ring.page_size
701 + adapter->hw.max_frame_size
702 + ETH_HLEN + VLAN_HLEN
703 + ETH_FCS_LEN;
704 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
705 atl1e_cal_ring_size(adapter, &adapter->ring_size);
706
707 adapter->ring_vir_addr = NULL;
708 adapter->rx_ring.desc = NULL;
709 rwlock_init(&adapter->tx_ring.tx_lock);
710 }
711
712 /*
713 * Read / Write Ptr Initialize:
714 */
715 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
716 {
717 struct atl1e_tx_ring *tx_ring = NULL;
718 struct atl1e_rx_ring *rx_ring = NULL;
719 struct atl1e_rx_page_desc *rx_page_desc = NULL;
720 int i, j;
721
722 tx_ring = &adapter->tx_ring;
723 rx_ring = &adapter->rx_ring;
724 rx_page_desc = rx_ring->rx_page_desc;
725
726 tx_ring->next_to_use = 0;
727 atomic_set(&tx_ring->next_to_clean, 0);
728
729 for (i = 0; i < adapter->num_rx_queues; i++) {
730 rx_page_desc[i].rx_using = 0;
731 rx_page_desc[i].rx_nxseq = 0;
732 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
733 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
734 rx_page_desc[i].rx_page[j].read_offset = 0;
735 }
736 }
737 }
738
739 /*
740 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
741 * @adapter: board private structure
742 *
743 * Free all transmit software resources
744 */
745 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
746 {
747 struct pci_dev *pdev = adapter->pdev;
748
749 atl1e_clean_tx_ring(adapter);
750 atl1e_clean_rx_ring(adapter);
751
752 if (adapter->ring_vir_addr) {
753 pci_free_consistent(pdev, adapter->ring_size,
754 adapter->ring_vir_addr, adapter->ring_dma);
755 adapter->ring_vir_addr = NULL;
756 }
757
758 if (adapter->tx_ring.tx_buffer) {
759 kfree(adapter->tx_ring.tx_buffer);
760 adapter->tx_ring.tx_buffer = NULL;
761 }
762 }
763
764 /*
765 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
766 * @adapter: board private structure
767 *
768 * Return 0 on success, negative on failure
769 */
770 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
771 {
772 struct pci_dev *pdev = adapter->pdev;
773 struct atl1e_tx_ring *tx_ring;
774 struct atl1e_rx_ring *rx_ring;
775 struct atl1e_rx_page_desc *rx_page_desc;
776 int size, i, j;
777 u32 offset = 0;
778 int err = 0;
779
780 if (adapter->ring_vir_addr != NULL)
781 return 0; /* alloced already */
782
783 tx_ring = &adapter->tx_ring;
784 rx_ring = &adapter->rx_ring;
785
786 /* real ring DMA buffer */
787
788 size = adapter->ring_size;
789 adapter->ring_vir_addr = pci_alloc_consistent(pdev,
790 adapter->ring_size, &adapter->ring_dma);
791
792 if (adapter->ring_vir_addr == NULL) {
793 netdev_err(adapter->netdev,
794 "pci_alloc_consistent failed, size = D%d\n", size);
795 return -ENOMEM;
796 }
797
798 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
799
800 rx_page_desc = rx_ring->rx_page_desc;
801
802 /* Init TPD Ring */
803 tx_ring->dma = roundup(adapter->ring_dma, 8);
804 offset = tx_ring->dma - adapter->ring_dma;
805 tx_ring->desc = (struct atl1e_tpd_desc *)
806 (adapter->ring_vir_addr + offset);
807 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
808 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
809 if (tx_ring->tx_buffer == NULL) {
810 netdev_err(adapter->netdev, "kzalloc failed, size = D%d\n",
811 size);
812 err = -ENOMEM;
813 goto failed;
814 }
815
816 /* Init RXF-Pages */
817 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
818 offset = roundup(offset, 32);
819
820 for (i = 0; i < adapter->num_rx_queues; i++) {
821 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
822 rx_page_desc[i].rx_page[j].dma =
823 adapter->ring_dma + offset;
824 rx_page_desc[i].rx_page[j].addr =
825 adapter->ring_vir_addr + offset;
826 offset += rx_ring->real_page_size;
827 }
828 }
829
830 /* Init CMB dma address */
831 tx_ring->cmb_dma = adapter->ring_dma + offset;
832 tx_ring->cmb = (u32 *)(adapter->ring_vir_addr + offset);
833 offset += sizeof(u32);
834
835 for (i = 0; i < adapter->num_rx_queues; i++) {
836 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
837 rx_page_desc[i].rx_page[j].write_offset_dma =
838 adapter->ring_dma + offset;
839 rx_page_desc[i].rx_page[j].write_offset_addr =
840 adapter->ring_vir_addr + offset;
841 offset += sizeof(u32);
842 }
843 }
844
845 if (unlikely(offset > adapter->ring_size)) {
846 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
847 offset, adapter->ring_size);
848 err = -1;
849 goto failed;
850 }
851
852 return 0;
853 failed:
854 if (adapter->ring_vir_addr != NULL) {
855 pci_free_consistent(pdev, adapter->ring_size,
856 adapter->ring_vir_addr, adapter->ring_dma);
857 adapter->ring_vir_addr = NULL;
858 }
859 return err;
860 }
861
862 static inline void atl1e_configure_des_ring(const struct atl1e_adapter *adapter)
863 {
864
865 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
866 struct atl1e_rx_ring *rx_ring =
867 (struct atl1e_rx_ring *)&adapter->rx_ring;
868 struct atl1e_tx_ring *tx_ring =
869 (struct atl1e_tx_ring *)&adapter->tx_ring;
870 struct atl1e_rx_page_desc *rx_page_desc = NULL;
871 int i, j;
872
873 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
874 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
875 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
876 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
877 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
878 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
879 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
880
881 rx_page_desc = rx_ring->rx_page_desc;
882 /* RXF Page Physical address / Page Length */
883 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
884 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
885 (u32)((adapter->ring_dma &
886 AT_DMA_HI_ADDR_MASK) >> 32));
887 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
888 u32 page_phy_addr;
889 u32 offset_phy_addr;
890
891 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
892 offset_phy_addr =
893 rx_page_desc[i].rx_page[j].write_offset_dma;
894
895 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
896 page_phy_addr & AT_DMA_LO_ADDR_MASK);
897 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
898 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
899 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
900 }
901 }
902 /* Page Length */
903 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
904 /* Load all of base address above */
905 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
906 }
907
908 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
909 {
910 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
911 u32 dev_ctrl_data = 0;
912 u32 max_pay_load = 0;
913 u32 jumbo_thresh = 0;
914 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
915
916 /* configure TXQ param */
917 if (hw->nic_type != athr_l2e_revB) {
918 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
919 if (hw->max_frame_size <= 1500) {
920 jumbo_thresh = hw->max_frame_size + extra_size;
921 } else if (hw->max_frame_size < 6*1024) {
922 jumbo_thresh =
923 (hw->max_frame_size + extra_size) * 2 / 3;
924 } else {
925 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
926 }
927 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
928 }
929
930 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
931
932 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
933 DEVICE_CTRL_MAX_PAYLOAD_MASK;
934
935 hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
936
937 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
938 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
939 hw->dmar_block = min(max_pay_load, hw->dmar_block);
940
941 if (hw->nic_type != athr_l2e_revB)
942 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
943 atl1e_pay_load_size[hw->dmar_block]);
944 /* enable TXQ */
945 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
946 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
947 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
948 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
949 }
950
951 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
952 {
953 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
954 u32 rxf_len = 0;
955 u32 rxf_low = 0;
956 u32 rxf_high = 0;
957 u32 rxf_thresh_data = 0;
958 u32 rxq_ctrl_data = 0;
959
960 if (hw->nic_type != athr_l2e_revB) {
961 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
962 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
963 RXQ_JMBOSZ_TH_SHIFT |
964 (1 & RXQ_JMBO_LKAH_MASK) <<
965 RXQ_JMBO_LKAH_SHIFT));
966
967 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
968 rxf_high = rxf_len * 4 / 5;
969 rxf_low = rxf_len / 5;
970 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
971 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
972 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
973 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
974
975 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
976 }
977
978 /* RRS */
979 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
980 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
981
982 if (hw->rrs_type & atl1e_rrs_ipv4)
983 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
984
985 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
986 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
987
988 if (hw->rrs_type & atl1e_rrs_ipv6)
989 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
990
991 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
992 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
993
994 if (hw->rrs_type != atl1e_rrs_disable)
995 rxq_ctrl_data |=
996 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
997
998 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
999 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1000
1001 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1002 }
1003
1004 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1005 {
1006 struct atl1e_hw *hw = &adapter->hw;
1007 u32 dma_ctrl_data = 0;
1008
1009 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1010 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1011 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1012 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1013 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1014 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1015 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1016 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1017 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1018 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1019
1020 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1021 }
1022
1023 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1024 {
1025 u32 value;
1026 struct atl1e_hw *hw = &adapter->hw;
1027 struct net_device *netdev = adapter->netdev;
1028
1029 /* Config MAC CTRL Register */
1030 value = MAC_CTRL_TX_EN |
1031 MAC_CTRL_RX_EN ;
1032
1033 if (FULL_DUPLEX == adapter->link_duplex)
1034 value |= MAC_CTRL_DUPLX;
1035
1036 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1037 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1038 MAC_CTRL_SPEED_SHIFT);
1039 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1040
1041 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1042 value |= (((u32)adapter->hw.preamble_len &
1043 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1044
1045 if (adapter->vlgrp)
1046 value |= MAC_CTRL_RMV_VLAN;
1047
1048 value |= MAC_CTRL_BC_EN;
1049 if (netdev->flags & IFF_PROMISC)
1050 value |= MAC_CTRL_PROMIS_EN;
1051 if (netdev->flags & IFF_ALLMULTI)
1052 value |= MAC_CTRL_MC_ALL_EN;
1053
1054 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1055 }
1056
1057 /*
1058 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1059 * @adapter: board private structure
1060 *
1061 * Configure the Tx /Rx unit of the MAC after a reset.
1062 */
1063 static int atl1e_configure(struct atl1e_adapter *adapter)
1064 {
1065 struct atl1e_hw *hw = &adapter->hw;
1066
1067 u32 intr_status_data = 0;
1068
1069 /* clear interrupt status */
1070 AT_WRITE_REG(hw, REG_ISR, ~0);
1071
1072 /* 1. set MAC Address */
1073 atl1e_hw_set_mac_addr(hw);
1074
1075 /* 2. Init the Multicast HASH table done by set_muti */
1076
1077 /* 3. Clear any WOL status */
1078 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1079
1080 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1081 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1082 * High 32bits memory */
1083 atl1e_configure_des_ring(adapter);
1084
1085 /* 5. set Interrupt Moderator Timer */
1086 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1087 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1088 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1089 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1090
1091 /* 6. rx/tx threshold to trig interrupt */
1092 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1093 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1094 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1095 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1096
1097 /* 7. set Interrupt Clear Timer */
1098 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1099
1100 /* 8. set MTU */
1101 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1102 VLAN_HLEN + ETH_FCS_LEN);
1103
1104 /* 9. config TXQ early tx threshold */
1105 atl1e_configure_tx(adapter);
1106
1107 /* 10. config RXQ */
1108 atl1e_configure_rx(adapter);
1109
1110 /* 11. config DMA Engine */
1111 atl1e_configure_dma(adapter);
1112
1113 /* 12. smb timer to trig interrupt */
1114 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1115
1116 intr_status_data = AT_READ_REG(hw, REG_ISR);
1117 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1118 netdev_err(adapter->netdev,
1119 "atl1e_configure failed, PCIE phy link down\n");
1120 return -1;
1121 }
1122
1123 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1124 return 0;
1125 }
1126
1127 /*
1128 * atl1e_get_stats - Get System Network Statistics
1129 * @netdev: network interface device structure
1130 *
1131 * Returns the address of the device statistics structure.
1132 * The statistics are actually updated from the timer callback.
1133 */
1134 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1135 {
1136 struct atl1e_adapter *adapter = netdev_priv(netdev);
1137 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1138 struct net_device_stats *net_stats = &netdev->stats;
1139
1140 net_stats->rx_packets = hw_stats->rx_ok;
1141 net_stats->tx_packets = hw_stats->tx_ok;
1142 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1143 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1144 net_stats->multicast = hw_stats->rx_mcast;
1145 net_stats->collisions = hw_stats->tx_1_col +
1146 hw_stats->tx_2_col * 2 +
1147 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1148
1149 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1150 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1151 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1152 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1153 net_stats->rx_length_errors = hw_stats->rx_len_err;
1154 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1155 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1156 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1157
1158 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1159
1160 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1161 hw_stats->tx_underrun + hw_stats->tx_trunc;
1162 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1163 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1164 net_stats->tx_window_errors = hw_stats->tx_late_col;
1165
1166 return net_stats;
1167 }
1168
1169 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1170 {
1171 u16 hw_reg_addr = 0;
1172 unsigned long *stats_item = NULL;
1173
1174 /* update rx status */
1175 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1176 stats_item = &adapter->hw_stats.rx_ok;
1177 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1178 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1179 stats_item++;
1180 hw_reg_addr += 4;
1181 }
1182 /* update tx status */
1183 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1184 stats_item = &adapter->hw_stats.tx_ok;
1185 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1186 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1187 stats_item++;
1188 hw_reg_addr += 4;
1189 }
1190 }
1191
1192 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1193 {
1194 u16 phy_data;
1195
1196 spin_lock(&adapter->mdio_lock);
1197 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1198 spin_unlock(&adapter->mdio_lock);
1199 }
1200
1201 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1202 {
1203 struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
1204 &adapter->tx_ring;
1205 struct atl1e_tx_buffer *tx_buffer = NULL;
1206 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1207 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1208
1209 while (next_to_clean != hw_next_to_clean) {
1210 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1211 if (tx_buffer->dma) {
1212 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1213 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1214 tx_buffer->length, PCI_DMA_TODEVICE);
1215 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1216 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1217 tx_buffer->length, PCI_DMA_TODEVICE);
1218 tx_buffer->dma = 0;
1219 }
1220
1221 if (tx_buffer->skb) {
1222 dev_kfree_skb_irq(tx_buffer->skb);
1223 tx_buffer->skb = NULL;
1224 }
1225
1226 if (++next_to_clean == tx_ring->count)
1227 next_to_clean = 0;
1228 }
1229
1230 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1231
1232 if (netif_queue_stopped(adapter->netdev) &&
1233 netif_carrier_ok(adapter->netdev)) {
1234 netif_wake_queue(adapter->netdev);
1235 }
1236
1237 return true;
1238 }
1239
1240 /*
1241 * atl1e_intr - Interrupt Handler
1242 * @irq: interrupt number
1243 * @data: pointer to a network interface device structure
1244 * @pt_regs: CPU registers structure
1245 */
1246 static irqreturn_t atl1e_intr(int irq, void *data)
1247 {
1248 struct net_device *netdev = data;
1249 struct atl1e_adapter *adapter = netdev_priv(netdev);
1250 struct atl1e_hw *hw = &adapter->hw;
1251 int max_ints = AT_MAX_INT_WORK;
1252 int handled = IRQ_NONE;
1253 u32 status;
1254
1255 do {
1256 status = AT_READ_REG(hw, REG_ISR);
1257 if ((status & IMR_NORMAL_MASK) == 0 ||
1258 (status & ISR_DIS_INT) != 0) {
1259 if (max_ints != AT_MAX_INT_WORK)
1260 handled = IRQ_HANDLED;
1261 break;
1262 }
1263 /* link event */
1264 if (status & ISR_GPHY)
1265 atl1e_clear_phy_int(adapter);
1266 /* Ack ISR */
1267 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1268
1269 handled = IRQ_HANDLED;
1270 /* check if PCIE PHY Link down */
1271 if (status & ISR_PHY_LINKDOWN) {
1272 netdev_err(adapter->netdev,
1273 "pcie phy linkdown %x\n", status);
1274 if (netif_running(adapter->netdev)) {
1275 /* reset MAC */
1276 atl1e_irq_reset(adapter);
1277 schedule_work(&adapter->reset_task);
1278 break;
1279 }
1280 }
1281
1282 /* check if DMA read/write error */
1283 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1284 netdev_err(adapter->netdev,
1285 "PCIE DMA RW error (status = 0x%x)\n",
1286 status);
1287 atl1e_irq_reset(adapter);
1288 schedule_work(&adapter->reset_task);
1289 break;
1290 }
1291
1292 if (status & ISR_SMB)
1293 atl1e_update_hw_stats(adapter);
1294
1295 /* link event */
1296 if (status & (ISR_GPHY | ISR_MANUAL)) {
1297 netdev->stats.tx_carrier_errors++;
1298 atl1e_link_chg_event(adapter);
1299 break;
1300 }
1301
1302 /* transmit event */
1303 if (status & ISR_TX_EVENT)
1304 atl1e_clean_tx_irq(adapter);
1305
1306 if (status & ISR_RX_EVENT) {
1307 /*
1308 * disable rx interrupts, without
1309 * the synchronize_irq bit
1310 */
1311 AT_WRITE_REG(hw, REG_IMR,
1312 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1313 AT_WRITE_FLUSH(hw);
1314 if (likely(napi_schedule_prep(
1315 &adapter->napi)))
1316 __napi_schedule(&adapter->napi);
1317 }
1318 } while (--max_ints > 0);
1319 /* re-enable Interrupt*/
1320 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1321
1322 return handled;
1323 }
1324
1325 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1326 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1327 {
1328 u8 *packet = (u8 *)(prrs + 1);
1329 struct iphdr *iph;
1330 u16 head_len = ETH_HLEN;
1331 u16 pkt_flags;
1332 u16 err_flags;
1333
1334 skb->ip_summed = CHECKSUM_NONE;
1335 pkt_flags = prrs->pkt_flag;
1336 err_flags = prrs->err_flag;
1337 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1338 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1339 if (pkt_flags & RRS_IS_IPV4) {
1340 if (pkt_flags & RRS_IS_802_3)
1341 head_len += 8;
1342 iph = (struct iphdr *) (packet + head_len);
1343 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1344 goto hw_xsum;
1345 }
1346 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1347 skb->ip_summed = CHECKSUM_UNNECESSARY;
1348 return;
1349 }
1350 }
1351
1352 hw_xsum :
1353 return;
1354 }
1355
1356 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1357 u8 que)
1358 {
1359 struct atl1e_rx_page_desc *rx_page_desc =
1360 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1361 u8 rx_using = rx_page_desc[que].rx_using;
1362
1363 return (struct atl1e_rx_page *)&(rx_page_desc[que].rx_page[rx_using]);
1364 }
1365
1366 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1367 int *work_done, int work_to_do)
1368 {
1369 struct net_device *netdev = adapter->netdev;
1370 struct atl1e_rx_ring *rx_ring = (struct atl1e_rx_ring *)
1371 &adapter->rx_ring;
1372 struct atl1e_rx_page_desc *rx_page_desc =
1373 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1374 struct sk_buff *skb = NULL;
1375 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1376 u32 packet_size, write_offset;
1377 struct atl1e_recv_ret_status *prrs;
1378
1379 write_offset = *(rx_page->write_offset_addr);
1380 if (likely(rx_page->read_offset < write_offset)) {
1381 do {
1382 if (*work_done >= work_to_do)
1383 break;
1384 (*work_done)++;
1385 /* get new packet's rrs */
1386 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1387 rx_page->read_offset);
1388 /* check sequence number */
1389 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1390 netdev_err(netdev,
1391 "rx sequence number error (rx=%d) (expect=%d)\n",
1392 prrs->seq_num,
1393 rx_page_desc[que].rx_nxseq);
1394 rx_page_desc[que].rx_nxseq++;
1395 /* just for debug use */
1396 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1397 (((u32)prrs->seq_num) << 16) |
1398 rx_page_desc[que].rx_nxseq);
1399 goto fatal_err;
1400 }
1401 rx_page_desc[que].rx_nxseq++;
1402
1403 /* error packet */
1404 if (prrs->pkt_flag & RRS_IS_ERR_FRAME) {
1405 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1406 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1407 RRS_ERR_TRUNC)) {
1408 /* hardware error, discard this packet*/
1409 netdev_err(netdev,
1410 "rx packet desc error %x\n",
1411 *((u32 *)prrs + 1));
1412 goto skip_pkt;
1413 }
1414 }
1415
1416 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1417 RRS_PKT_SIZE_MASK) - 4; /* CRC */
1418 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
1419 if (skb == NULL) {
1420 netdev_warn(netdev,
1421 "Memory squeeze, deferring packet\n");
1422 goto skip_pkt;
1423 }
1424 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1425 skb_put(skb, packet_size);
1426 skb->protocol = eth_type_trans(skb, netdev);
1427 atl1e_rx_checksum(adapter, skb, prrs);
1428
1429 if (unlikely(adapter->vlgrp &&
1430 (prrs->pkt_flag & RRS_IS_VLAN_TAG))) {
1431 u16 vlan_tag = (prrs->vtag >> 4) |
1432 ((prrs->vtag & 7) << 13) |
1433 ((prrs->vtag & 8) << 9);
1434 netdev_dbg(netdev,
1435 "RXD VLAN TAG<RRD>=0x%04x\n",
1436 prrs->vtag);
1437 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1438 vlan_tag);
1439 } else {
1440 netif_receive_skb(skb);
1441 }
1442
1443 skip_pkt:
1444 /* skip current packet whether it's ok or not. */
1445 rx_page->read_offset +=
1446 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1447 RRS_PKT_SIZE_MASK) +
1448 sizeof(struct atl1e_recv_ret_status) + 31) &
1449 0xFFFFFFE0);
1450
1451 if (rx_page->read_offset >= rx_ring->page_size) {
1452 /* mark this page clean */
1453 u16 reg_addr;
1454 u8 rx_using;
1455
1456 rx_page->read_offset =
1457 *(rx_page->write_offset_addr) = 0;
1458 rx_using = rx_page_desc[que].rx_using;
1459 reg_addr =
1460 atl1e_rx_page_vld_regs[que][rx_using];
1461 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1462 rx_page_desc[que].rx_using ^= 1;
1463 rx_page = atl1e_get_rx_page(adapter, que);
1464 }
1465 write_offset = *(rx_page->write_offset_addr);
1466 } while (rx_page->read_offset < write_offset);
1467 }
1468
1469 return;
1470
1471 fatal_err:
1472 if (!test_bit(__AT_DOWN, &adapter->flags))
1473 schedule_work(&adapter->reset_task);
1474 }
1475
1476 /*
1477 * atl1e_clean - NAPI Rx polling callback
1478 * @adapter: board private structure
1479 */
1480 static int atl1e_clean(struct napi_struct *napi, int budget)
1481 {
1482 struct atl1e_adapter *adapter =
1483 container_of(napi, struct atl1e_adapter, napi);
1484 u32 imr_data;
1485 int work_done = 0;
1486
1487 /* Keep link state information with original netdev */
1488 if (!netif_carrier_ok(adapter->netdev))
1489 goto quit_polling;
1490
1491 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1492
1493 /* If no Tx and not enough Rx work done, exit the polling mode */
1494 if (work_done < budget) {
1495 quit_polling:
1496 napi_complete(napi);
1497 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1498 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1499 /* test debug */
1500 if (test_bit(__AT_DOWN, &adapter->flags)) {
1501 atomic_dec(&adapter->irq_sem);
1502 netdev_err(adapter->netdev,
1503 "atl1e_clean is called when AT_DOWN\n");
1504 }
1505 /* reenable RX intr */
1506 /*atl1e_irq_enable(adapter); */
1507
1508 }
1509 return work_done;
1510 }
1511
1512 #ifdef CONFIG_NET_POLL_CONTROLLER
1513
1514 /*
1515 * Polling 'interrupt' - used by things like netconsole to send skbs
1516 * without having to re-enable interrupts. It's not called while
1517 * the interrupt routine is executing.
1518 */
1519 static void atl1e_netpoll(struct net_device *netdev)
1520 {
1521 struct atl1e_adapter *adapter = netdev_priv(netdev);
1522
1523 disable_irq(adapter->pdev->irq);
1524 atl1e_intr(adapter->pdev->irq, netdev);
1525 enable_irq(adapter->pdev->irq);
1526 }
1527 #endif
1528
1529 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1530 {
1531 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1532 u16 next_to_use = 0;
1533 u16 next_to_clean = 0;
1534
1535 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1536 next_to_use = tx_ring->next_to_use;
1537
1538 return (u16)(next_to_clean > next_to_use) ?
1539 (next_to_clean - next_to_use - 1) :
1540 (tx_ring->count + next_to_clean - next_to_use - 1);
1541 }
1542
1543 /*
1544 * get next usable tpd
1545 * Note: should call atl1e_tdp_avail to make sure
1546 * there is enough tpd to use
1547 */
1548 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1549 {
1550 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1551 u16 next_to_use = 0;
1552
1553 next_to_use = tx_ring->next_to_use;
1554 if (++tx_ring->next_to_use == tx_ring->count)
1555 tx_ring->next_to_use = 0;
1556
1557 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1558 return (struct atl1e_tpd_desc *)&tx_ring->desc[next_to_use];
1559 }
1560
1561 static struct atl1e_tx_buffer *
1562 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1563 {
1564 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1565
1566 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1567 }
1568
1569 /* Calculate the transmit packet descript needed*/
1570 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1571 {
1572 int i = 0;
1573 u16 tpd_req = 1;
1574 u16 fg_size = 0;
1575 u16 proto_hdr_len = 0;
1576
1577 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1578 fg_size = skb_shinfo(skb)->frags[i].size;
1579 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1580 }
1581
1582 if (skb_is_gso(skb)) {
1583 if (skb->protocol == htons(ETH_P_IP) ||
1584 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1585 proto_hdr_len = skb_transport_offset(skb) +
1586 tcp_hdrlen(skb);
1587 if (proto_hdr_len < skb_headlen(skb)) {
1588 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1589 MAX_TX_BUF_LEN - 1) >>
1590 MAX_TX_BUF_SHIFT);
1591 }
1592 }
1593
1594 }
1595 return tpd_req;
1596 }
1597
1598 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1599 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1600 {
1601 u8 hdr_len;
1602 u32 real_len;
1603 unsigned short offload_type;
1604 int err;
1605
1606 if (skb_is_gso(skb)) {
1607 if (skb_header_cloned(skb)) {
1608 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1609 if (unlikely(err))
1610 return -1;
1611 }
1612 offload_type = skb_shinfo(skb)->gso_type;
1613
1614 if (offload_type & SKB_GSO_TCPV4) {
1615 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1616 + ntohs(ip_hdr(skb)->tot_len));
1617
1618 if (real_len < skb->len)
1619 pskb_trim(skb, real_len);
1620
1621 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1622 if (unlikely(skb->len == hdr_len)) {
1623 /* only xsum need */
1624 netdev_warn(adapter->netdev,
1625 "IPV4 tso with zero data??\n");
1626 goto check_sum;
1627 } else {
1628 ip_hdr(skb)->check = 0;
1629 ip_hdr(skb)->tot_len = 0;
1630 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1631 ip_hdr(skb)->saddr,
1632 ip_hdr(skb)->daddr,
1633 0, IPPROTO_TCP, 0);
1634 tpd->word3 |= (ip_hdr(skb)->ihl &
1635 TDP_V4_IPHL_MASK) <<
1636 TPD_V4_IPHL_SHIFT;
1637 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1638 TPD_TCPHDRLEN_MASK) <<
1639 TPD_TCPHDRLEN_SHIFT;
1640 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1641 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1642 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1643 }
1644 return 0;
1645 }
1646 }
1647
1648 check_sum:
1649 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1650 u8 css, cso;
1651
1652 cso = skb_transport_offset(skb);
1653 if (unlikely(cso & 0x1)) {
1654 netdev_err(adapter->netdev,
1655 "payload offset should not ant event number\n");
1656 return -1;
1657 } else {
1658 css = cso + skb->csum_offset;
1659 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1660 TPD_PLOADOFFSET_SHIFT;
1661 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1662 TPD_CCSUMOFFSET_SHIFT;
1663 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1664 }
1665 }
1666
1667 return 0;
1668 }
1669
1670 static void atl1e_tx_map(struct atl1e_adapter *adapter,
1671 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1672 {
1673 struct atl1e_tpd_desc *use_tpd = NULL;
1674 struct atl1e_tx_buffer *tx_buffer = NULL;
1675 u16 buf_len = skb_headlen(skb);
1676 u16 map_len = 0;
1677 u16 mapped_len = 0;
1678 u16 hdr_len = 0;
1679 u16 nr_frags;
1680 u16 f;
1681 int segment;
1682
1683 nr_frags = skb_shinfo(skb)->nr_frags;
1684 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1685 if (segment) {
1686 /* TSO */
1687 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1688 use_tpd = tpd;
1689
1690 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1691 tx_buffer->length = map_len;
1692 tx_buffer->dma = pci_map_single(adapter->pdev,
1693 skb->data, hdr_len, PCI_DMA_TODEVICE);
1694 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1695 mapped_len += map_len;
1696 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1697 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1698 ((cpu_to_le32(tx_buffer->length) &
1699 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1700 }
1701
1702 while (mapped_len < buf_len) {
1703 /* mapped_len == 0, means we should use the first tpd,
1704 which is given by caller */
1705 if (mapped_len == 0) {
1706 use_tpd = tpd;
1707 } else {
1708 use_tpd = atl1e_get_tpd(adapter);
1709 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1710 }
1711 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1712 tx_buffer->skb = NULL;
1713
1714 tx_buffer->length = map_len =
1715 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1716 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1717 tx_buffer->dma =
1718 pci_map_single(adapter->pdev, skb->data + mapped_len,
1719 map_len, PCI_DMA_TODEVICE);
1720 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
1721 mapped_len += map_len;
1722 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1723 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1724 ((cpu_to_le32(tx_buffer->length) &
1725 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1726 }
1727
1728 for (f = 0; f < nr_frags; f++) {
1729 struct skb_frag_struct *frag;
1730 u16 i;
1731 u16 seg_num;
1732
1733 frag = &skb_shinfo(skb)->frags[f];
1734 buf_len = frag->size;
1735
1736 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1737 for (i = 0; i < seg_num; i++) {
1738 use_tpd = atl1e_get_tpd(adapter);
1739 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1740
1741 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1742 BUG_ON(tx_buffer->skb);
1743
1744 tx_buffer->skb = NULL;
1745 tx_buffer->length =
1746 (buf_len > MAX_TX_BUF_LEN) ?
1747 MAX_TX_BUF_LEN : buf_len;
1748 buf_len -= tx_buffer->length;
1749
1750 tx_buffer->dma =
1751 pci_map_page(adapter->pdev, frag->page,
1752 frag->page_offset +
1753 (i * MAX_TX_BUF_LEN),
1754 tx_buffer->length,
1755 PCI_DMA_TODEVICE);
1756 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
1757 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1758 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1759 ((cpu_to_le32(tx_buffer->length) &
1760 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1761 }
1762 }
1763
1764 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1765 /* note this one is a tcp header */
1766 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1767 /* The last tpd */
1768
1769 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1770 /* The last buffer info contain the skb address,
1771 so it will be free after unmap */
1772 tx_buffer->skb = skb;
1773 }
1774
1775 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1776 struct atl1e_tpd_desc *tpd)
1777 {
1778 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1779 /* Force memory writes to complete before letting h/w
1780 * know there are new descriptors to fetch. (Only
1781 * applicable for weak-ordered memory model archs,
1782 * such as IA-64). */
1783 wmb();
1784 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1785 }
1786
1787 static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1788 struct net_device *netdev)
1789 {
1790 struct atl1e_adapter *adapter = netdev_priv(netdev);
1791 unsigned long flags;
1792 u16 tpd_req = 1;
1793 struct atl1e_tpd_desc *tpd;
1794
1795 if (test_bit(__AT_DOWN, &adapter->flags)) {
1796 dev_kfree_skb_any(skb);
1797 return NETDEV_TX_OK;
1798 }
1799
1800 if (unlikely(skb->len <= 0)) {
1801 dev_kfree_skb_any(skb);
1802 return NETDEV_TX_OK;
1803 }
1804 tpd_req = atl1e_cal_tdp_req(skb);
1805 if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1806 return NETDEV_TX_LOCKED;
1807
1808 if (atl1e_tpd_avail(adapter) < tpd_req) {
1809 /* no enough descriptor, just stop queue */
1810 netif_stop_queue(netdev);
1811 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1812 return NETDEV_TX_BUSY;
1813 }
1814
1815 tpd = atl1e_get_tpd(adapter);
1816
1817 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1818 u16 vlan_tag = vlan_tx_tag_get(skb);
1819 u16 atl1e_vlan_tag;
1820
1821 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1822 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1823 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1824 TPD_VLAN_SHIFT;
1825 }
1826
1827 if (skb->protocol == htons(ETH_P_8021Q))
1828 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1829
1830 if (skb_network_offset(skb) != ETH_HLEN)
1831 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1832
1833 /* do TSO and check sum */
1834 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1835 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1836 dev_kfree_skb_any(skb);
1837 return NETDEV_TX_OK;
1838 }
1839
1840 atl1e_tx_map(adapter, skb, tpd);
1841 atl1e_tx_queue(adapter, tpd_req, tpd);
1842
1843 netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
1844 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1845 return NETDEV_TX_OK;
1846 }
1847
1848 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1849 {
1850 struct net_device *netdev = adapter->netdev;
1851
1852 free_irq(adapter->pdev->irq, netdev);
1853
1854 if (adapter->have_msi)
1855 pci_disable_msi(adapter->pdev);
1856 }
1857
1858 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1859 {
1860 struct pci_dev *pdev = adapter->pdev;
1861 struct net_device *netdev = adapter->netdev;
1862 int flags = 0;
1863 int err = 0;
1864
1865 adapter->have_msi = true;
1866 err = pci_enable_msi(adapter->pdev);
1867 if (err) {
1868 netdev_dbg(adapter->netdev,
1869 "Unable to allocate MSI interrupt Error: %d\n", err);
1870 adapter->have_msi = false;
1871 } else
1872 netdev->irq = pdev->irq;
1873
1874
1875 if (!adapter->have_msi)
1876 flags |= IRQF_SHARED;
1877 err = request_irq(adapter->pdev->irq, atl1e_intr, flags,
1878 netdev->name, netdev);
1879 if (err) {
1880 netdev_dbg(adapter->netdev,
1881 "Unable to allocate interrupt Error: %d\n", err);
1882 if (adapter->have_msi)
1883 pci_disable_msi(adapter->pdev);
1884 return err;
1885 }
1886 netdev_dbg(adapter->netdev, "atl1e_request_irq OK\n");
1887 return err;
1888 }
1889
1890 int atl1e_up(struct atl1e_adapter *adapter)
1891 {
1892 struct net_device *netdev = adapter->netdev;
1893 int err = 0;
1894 u32 val;
1895
1896 /* hardware has been reset, we need to reload some things */
1897 err = atl1e_init_hw(&adapter->hw);
1898 if (err) {
1899 err = -EIO;
1900 return err;
1901 }
1902 atl1e_init_ring_ptrs(adapter);
1903 atl1e_set_multi(netdev);
1904 atl1e_restore_vlan(adapter);
1905
1906 if (atl1e_configure(adapter)) {
1907 err = -EIO;
1908 goto err_up;
1909 }
1910
1911 clear_bit(__AT_DOWN, &adapter->flags);
1912 napi_enable(&adapter->napi);
1913 atl1e_irq_enable(adapter);
1914 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1915 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1916 val | MASTER_CTRL_MANUAL_INT);
1917
1918 err_up:
1919 return err;
1920 }
1921
1922 void atl1e_down(struct atl1e_adapter *adapter)
1923 {
1924 struct net_device *netdev = adapter->netdev;
1925
1926 /* signal that we're down so the interrupt handler does not
1927 * reschedule our watchdog timer */
1928 set_bit(__AT_DOWN, &adapter->flags);
1929
1930 #ifdef NETIF_F_LLTX
1931 netif_stop_queue(netdev);
1932 #else
1933 netif_tx_disable(netdev);
1934 #endif
1935
1936 /* reset MAC to disable all RX/TX */
1937 atl1e_reset_hw(&adapter->hw);
1938 msleep(1);
1939
1940 napi_disable(&adapter->napi);
1941 atl1e_del_timer(adapter);
1942 atl1e_irq_disable(adapter);
1943
1944 netif_carrier_off(netdev);
1945 adapter->link_speed = SPEED_0;
1946 adapter->link_duplex = -1;
1947 atl1e_clean_tx_ring(adapter);
1948 atl1e_clean_rx_ring(adapter);
1949 }
1950
1951 /*
1952 * atl1e_open - Called when a network interface is made active
1953 * @netdev: network interface device structure
1954 *
1955 * Returns 0 on success, negative value on failure
1956 *
1957 * The open entry point is called when a network interface is made
1958 * active by the system (IFF_UP). At this point all resources needed
1959 * for transmit and receive operations are allocated, the interrupt
1960 * handler is registered with the OS, the watchdog timer is started,
1961 * and the stack is notified that the interface is ready.
1962 */
1963 static int atl1e_open(struct net_device *netdev)
1964 {
1965 struct atl1e_adapter *adapter = netdev_priv(netdev);
1966 int err;
1967
1968 /* disallow open during test */
1969 if (test_bit(__AT_TESTING, &adapter->flags))
1970 return -EBUSY;
1971
1972 /* allocate rx/tx dma buffer & descriptors */
1973 atl1e_init_ring_resources(adapter);
1974 err = atl1e_setup_ring_resources(adapter);
1975 if (unlikely(err))
1976 return err;
1977
1978 err = atl1e_request_irq(adapter);
1979 if (unlikely(err))
1980 goto err_req_irq;
1981
1982 err = atl1e_up(adapter);
1983 if (unlikely(err))
1984 goto err_up;
1985
1986 return 0;
1987
1988 err_up:
1989 atl1e_free_irq(adapter);
1990 err_req_irq:
1991 atl1e_free_ring_resources(adapter);
1992 atl1e_reset_hw(&adapter->hw);
1993
1994 return err;
1995 }
1996
1997 /*
1998 * atl1e_close - Disables a network interface
1999 * @netdev: network interface device structure
2000 *
2001 * Returns 0, this is not allowed to fail
2002 *
2003 * The close entry point is called when an interface is de-activated
2004 * by the OS. The hardware is still under the drivers control, but
2005 * needs to be disabled. A global MAC reset is issued to stop the
2006 * hardware, and all transmit and receive resources are freed.
2007 */
2008 static int atl1e_close(struct net_device *netdev)
2009 {
2010 struct atl1e_adapter *adapter = netdev_priv(netdev);
2011
2012 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2013 atl1e_down(adapter);
2014 atl1e_free_irq(adapter);
2015 atl1e_free_ring_resources(adapter);
2016
2017 return 0;
2018 }
2019
2020 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2021 {
2022 struct net_device *netdev = pci_get_drvdata(pdev);
2023 struct atl1e_adapter *adapter = netdev_priv(netdev);
2024 struct atl1e_hw *hw = &adapter->hw;
2025 u32 ctrl = 0;
2026 u32 mac_ctrl_data = 0;
2027 u32 wol_ctrl_data = 0;
2028 u16 mii_advertise_data = 0;
2029 u16 mii_bmsr_data = 0;
2030 u16 mii_intr_status_data = 0;
2031 u32 wufc = adapter->wol;
2032 u32 i;
2033 #ifdef CONFIG_PM
2034 int retval = 0;
2035 #endif
2036
2037 if (netif_running(netdev)) {
2038 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2039 atl1e_down(adapter);
2040 }
2041 netif_device_detach(netdev);
2042
2043 #ifdef CONFIG_PM
2044 retval = pci_save_state(pdev);
2045 if (retval)
2046 return retval;
2047 #endif
2048
2049 if (wufc) {
2050 /* get link status */
2051 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2052 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2053
2054 mii_advertise_data = MII_AR_10T_HD_CAPS;
2055
2056 if ((atl1e_write_phy_reg(hw, MII_AT001_CR, 0) != 0) ||
2057 (atl1e_write_phy_reg(hw,
2058 MII_ADVERTISE, mii_advertise_data) != 0) ||
2059 (atl1e_phy_commit(hw)) != 0) {
2060 netdev_dbg(adapter->netdev, "set phy register failed\n");
2061 goto wol_dis;
2062 }
2063
2064 hw->phy_configured = false; /* re-init PHY when resume */
2065
2066 /* turn on magic packet wol */
2067 if (wufc & AT_WUFC_MAG)
2068 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2069
2070 if (wufc & AT_WUFC_LNKC) {
2071 /* if orignal link status is link, just wait for retrive link */
2072 if (mii_bmsr_data & BMSR_LSTATUS) {
2073 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2074 msleep(100);
2075 atl1e_read_phy_reg(hw, MII_BMSR,
2076 (u16 *)&mii_bmsr_data);
2077 if (mii_bmsr_data & BMSR_LSTATUS)
2078 break;
2079 }
2080
2081 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2082 netdev_dbg(adapter->netdev,
2083 "Link may change when suspend\n");
2084 }
2085 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2086 /* only link up can wake up */
2087 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2088 netdev_dbg(adapter->netdev,
2089 "read write phy register failed\n");
2090 goto wol_dis;
2091 }
2092 }
2093 /* clear phy interrupt */
2094 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2095 /* Config MAC Ctrl register */
2096 mac_ctrl_data = MAC_CTRL_RX_EN;
2097 /* set to 10/100M halt duplex */
2098 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2099 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2100 MAC_CTRL_PRMLEN_MASK) <<
2101 MAC_CTRL_PRMLEN_SHIFT);
2102
2103 if (adapter->vlgrp)
2104 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2105
2106 /* magic packet maybe Broadcast&multicast&Unicast frame */
2107 if (wufc & AT_WUFC_MAG)
2108 mac_ctrl_data |= MAC_CTRL_BC_EN;
2109
2110 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2111 mac_ctrl_data);
2112
2113 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2114 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2115 /* pcie patch */
2116 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2117 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2118 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2119 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2120 goto suspend_exit;
2121 }
2122 wol_dis:
2123
2124 /* WOL disabled */
2125 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2126
2127 /* pcie patch */
2128 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2129 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2130 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2131
2132 atl1e_force_ps(hw);
2133 hw->phy_configured = false; /* re-init PHY when resume */
2134
2135 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2136
2137 suspend_exit:
2138
2139 if (netif_running(netdev))
2140 atl1e_free_irq(adapter);
2141
2142 pci_disable_device(pdev);
2143
2144 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2145
2146 return 0;
2147 }
2148
2149 #ifdef CONFIG_PM
2150 static int atl1e_resume(struct pci_dev *pdev)
2151 {
2152 struct net_device *netdev = pci_get_drvdata(pdev);
2153 struct atl1e_adapter *adapter = netdev_priv(netdev);
2154 u32 err;
2155
2156 pci_set_power_state(pdev, PCI_D0);
2157 pci_restore_state(pdev);
2158
2159 err = pci_enable_device(pdev);
2160 if (err) {
2161 netdev_err(adapter->netdev,
2162 "Cannot enable PCI device from suspend\n");
2163 return err;
2164 }
2165
2166 pci_set_master(pdev);
2167
2168 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2169
2170 pci_enable_wake(pdev, PCI_D3hot, 0);
2171 pci_enable_wake(pdev, PCI_D3cold, 0);
2172
2173 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2174
2175 if (netif_running(netdev)) {
2176 err = atl1e_request_irq(adapter);
2177 if (err)
2178 return err;
2179 }
2180
2181 atl1e_reset_hw(&adapter->hw);
2182
2183 if (netif_running(netdev))
2184 atl1e_up(adapter);
2185
2186 netif_device_attach(netdev);
2187
2188 return 0;
2189 }
2190 #endif
2191
2192 static void atl1e_shutdown(struct pci_dev *pdev)
2193 {
2194 atl1e_suspend(pdev, PMSG_SUSPEND);
2195 }
2196
2197 static const struct net_device_ops atl1e_netdev_ops = {
2198 .ndo_open = atl1e_open,
2199 .ndo_stop = atl1e_close,
2200 .ndo_start_xmit = atl1e_xmit_frame,
2201 .ndo_get_stats = atl1e_get_stats,
2202 .ndo_set_multicast_list = atl1e_set_multi,
2203 .ndo_validate_addr = eth_validate_addr,
2204 .ndo_set_mac_address = atl1e_set_mac_addr,
2205 .ndo_change_mtu = atl1e_change_mtu,
2206 .ndo_do_ioctl = atl1e_ioctl,
2207 .ndo_tx_timeout = atl1e_tx_timeout,
2208 .ndo_vlan_rx_register = atl1e_vlan_rx_register,
2209 #ifdef CONFIG_NET_POLL_CONTROLLER
2210 .ndo_poll_controller = atl1e_netpoll,
2211 #endif
2212
2213 };
2214
2215 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2216 {
2217 SET_NETDEV_DEV(netdev, &pdev->dev);
2218 pci_set_drvdata(pdev, netdev);
2219
2220 netdev->irq = pdev->irq;
2221 netdev->netdev_ops = &atl1e_netdev_ops;
2222
2223 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2224 atl1e_set_ethtool_ops(netdev);
2225
2226 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM |
2227 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
2228 netdev->features |= NETIF_F_LLTX;
2229 netdev->features |= NETIF_F_TSO;
2230
2231 return 0;
2232 }
2233
2234 /*
2235 * atl1e_probe - Device Initialization Routine
2236 * @pdev: PCI device information struct
2237 * @ent: entry in atl1e_pci_tbl
2238 *
2239 * Returns 0 on success, negative on failure
2240 *
2241 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2242 * The OS initialization, configuring of the adapter private structure,
2243 * and a hardware reset occur.
2244 */
2245 static int __devinit atl1e_probe(struct pci_dev *pdev,
2246 const struct pci_device_id *ent)
2247 {
2248 struct net_device *netdev;
2249 struct atl1e_adapter *adapter = NULL;
2250 static int cards_found;
2251
2252 int err = 0;
2253
2254 err = pci_enable_device(pdev);
2255 if (err) {
2256 dev_err(&pdev->dev, "cannot enable PCI device\n");
2257 return err;
2258 }
2259
2260 /*
2261 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2262 * shared register for the high 32 bits, so only a single, aligned,
2263 * 4 GB physical address range can be used at a time.
2264 *
2265 * Supporting 64-bit DMA on this hardware is more trouble than it's
2266 * worth. It is far easier to limit to 32-bit DMA than update
2267 * various kernel subsystems to support the mechanics required by a
2268 * fixed-high-32-bit system.
2269 */
2270 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2271 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2272 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2273 goto err_dma;
2274 }
2275
2276 err = pci_request_regions(pdev, atl1e_driver_name);
2277 if (err) {
2278 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2279 goto err_pci_reg;
2280 }
2281
2282 pci_set_master(pdev);
2283
2284 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2285 if (netdev == NULL) {
2286 err = -ENOMEM;
2287 dev_err(&pdev->dev, "etherdev alloc failed\n");
2288 goto err_alloc_etherdev;
2289 }
2290
2291 err = atl1e_init_netdev(netdev, pdev);
2292 if (err) {
2293 netdev_err(netdev, "init netdevice failed\n");
2294 goto err_init_netdev;
2295 }
2296 adapter = netdev_priv(netdev);
2297 adapter->bd_number = cards_found;
2298 adapter->netdev = netdev;
2299 adapter->pdev = pdev;
2300 adapter->hw.adapter = adapter;
2301 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2302 if (!adapter->hw.hw_addr) {
2303 err = -EIO;
2304 netdev_err(netdev, "cannot map device registers\n");
2305 goto err_ioremap;
2306 }
2307 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2308
2309 /* init mii data */
2310 adapter->mii.dev = netdev;
2311 adapter->mii.mdio_read = atl1e_mdio_read;
2312 adapter->mii.mdio_write = atl1e_mdio_write;
2313 adapter->mii.phy_id_mask = 0x1f;
2314 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2315
2316 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2317
2318 init_timer(&adapter->phy_config_timer);
2319 adapter->phy_config_timer.function = &atl1e_phy_config;
2320 adapter->phy_config_timer.data = (unsigned long) adapter;
2321
2322 /* get user settings */
2323 atl1e_check_options(adapter);
2324 /*
2325 * Mark all PCI regions associated with PCI device
2326 * pdev as being reserved by owner atl1e_driver_name
2327 * Enables bus-mastering on the device and calls
2328 * pcibios_set_master to do the needed arch specific settings
2329 */
2330 atl1e_setup_pcicmd(pdev);
2331 /* setup the private structure */
2332 err = atl1e_sw_init(adapter);
2333 if (err) {
2334 netdev_err(netdev, "net device private data init failed\n");
2335 goto err_sw_init;
2336 }
2337
2338 /* Init GPHY as early as possible due to power saving issue */
2339 atl1e_phy_init(&adapter->hw);
2340 /* reset the controller to
2341 * put the device in a known good starting state */
2342 err = atl1e_reset_hw(&adapter->hw);
2343 if (err) {
2344 err = -EIO;
2345 goto err_reset;
2346 }
2347
2348 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2349 err = -EIO;
2350 netdev_err(netdev, "get mac address failed\n");
2351 goto err_eeprom;
2352 }
2353
2354 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2355 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2356 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
2357
2358 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2359 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2360 err = register_netdev(netdev);
2361 if (err) {
2362 netdev_err(netdev, "register netdevice failed\n");
2363 goto err_register;
2364 }
2365
2366 /* assume we have no link for now */
2367 netif_stop_queue(netdev);
2368 netif_carrier_off(netdev);
2369
2370 cards_found++;
2371
2372 return 0;
2373
2374 err_reset:
2375 err_register:
2376 err_sw_init:
2377 err_eeprom:
2378 iounmap(adapter->hw.hw_addr);
2379 err_init_netdev:
2380 err_ioremap:
2381 free_netdev(netdev);
2382 err_alloc_etherdev:
2383 pci_release_regions(pdev);
2384 err_pci_reg:
2385 err_dma:
2386 pci_disable_device(pdev);
2387 return err;
2388 }
2389
2390 /*
2391 * atl1e_remove - Device Removal Routine
2392 * @pdev: PCI device information struct
2393 *
2394 * atl1e_remove is called by the PCI subsystem to alert the driver
2395 * that it should release a PCI device. The could be caused by a
2396 * Hot-Plug event, or because the driver is going to be removed from
2397 * memory.
2398 */
2399 static void __devexit atl1e_remove(struct pci_dev *pdev)
2400 {
2401 struct net_device *netdev = pci_get_drvdata(pdev);
2402 struct atl1e_adapter *adapter = netdev_priv(netdev);
2403
2404 /*
2405 * flush_scheduled work may reschedule our watchdog task, so
2406 * explicitly disable watchdog tasks from being rescheduled
2407 */
2408 set_bit(__AT_DOWN, &adapter->flags);
2409
2410 atl1e_del_timer(adapter);
2411 atl1e_cancel_work(adapter);
2412
2413 unregister_netdev(netdev);
2414 atl1e_free_ring_resources(adapter);
2415 atl1e_force_ps(&adapter->hw);
2416 iounmap(adapter->hw.hw_addr);
2417 pci_release_regions(pdev);
2418 free_netdev(netdev);
2419 pci_disable_device(pdev);
2420 }
2421
2422 /*
2423 * atl1e_io_error_detected - called when PCI error is detected
2424 * @pdev: Pointer to PCI device
2425 * @state: The current pci connection state
2426 *
2427 * This function is called after a PCI bus error affecting
2428 * this device has been detected.
2429 */
2430 static pci_ers_result_t
2431 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2432 {
2433 struct net_device *netdev = pci_get_drvdata(pdev);
2434 struct atl1e_adapter *adapter = netdev_priv(netdev);
2435
2436 netif_device_detach(netdev);
2437
2438 if (state == pci_channel_io_perm_failure)
2439 return PCI_ERS_RESULT_DISCONNECT;
2440
2441 if (netif_running(netdev))
2442 atl1e_down(adapter);
2443
2444 pci_disable_device(pdev);
2445
2446 /* Request a slot slot reset. */
2447 return PCI_ERS_RESULT_NEED_RESET;
2448 }
2449
2450 /*
2451 * atl1e_io_slot_reset - called after the pci bus has been reset.
2452 * @pdev: Pointer to PCI device
2453 *
2454 * Restart the card from scratch, as if from a cold-boot. Implementation
2455 * resembles the first-half of the e1000_resume routine.
2456 */
2457 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2458 {
2459 struct net_device *netdev = pci_get_drvdata(pdev);
2460 struct atl1e_adapter *adapter = netdev_priv(netdev);
2461
2462 if (pci_enable_device(pdev)) {
2463 netdev_err(adapter->netdev,
2464 "Cannot re-enable PCI device after reset\n");
2465 return PCI_ERS_RESULT_DISCONNECT;
2466 }
2467 pci_set_master(pdev);
2468
2469 pci_enable_wake(pdev, PCI_D3hot, 0);
2470 pci_enable_wake(pdev, PCI_D3cold, 0);
2471
2472 atl1e_reset_hw(&adapter->hw);
2473
2474 return PCI_ERS_RESULT_RECOVERED;
2475 }
2476
2477 /*
2478 * atl1e_io_resume - called when traffic can start flowing again.
2479 * @pdev: Pointer to PCI device
2480 *
2481 * This callback is called when the error recovery driver tells us that
2482 * its OK to resume normal operation. Implementation resembles the
2483 * second-half of the atl1e_resume routine.
2484 */
2485 static void atl1e_io_resume(struct pci_dev *pdev)
2486 {
2487 struct net_device *netdev = pci_get_drvdata(pdev);
2488 struct atl1e_adapter *adapter = netdev_priv(netdev);
2489
2490 if (netif_running(netdev)) {
2491 if (atl1e_up(adapter)) {
2492 netdev_err(adapter->netdev,
2493 "can't bring device back up after reset\n");
2494 return;
2495 }
2496 }
2497
2498 netif_device_attach(netdev);
2499 }
2500
2501 static struct pci_error_handlers atl1e_err_handler = {
2502 .error_detected = atl1e_io_error_detected,
2503 .slot_reset = atl1e_io_slot_reset,
2504 .resume = atl1e_io_resume,
2505 };
2506
2507 static struct pci_driver atl1e_driver = {
2508 .name = atl1e_driver_name,
2509 .id_table = atl1e_pci_tbl,
2510 .probe = atl1e_probe,
2511 .remove = __devexit_p(atl1e_remove),
2512 /* Power Managment Hooks */
2513 #ifdef CONFIG_PM
2514 .suspend = atl1e_suspend,
2515 .resume = atl1e_resume,
2516 #endif
2517 .shutdown = atl1e_shutdown,
2518 .err_handler = &atl1e_err_handler
2519 };
2520
2521 /*
2522 * atl1e_init_module - Driver Registration Routine
2523 *
2524 * atl1e_init_module is the first routine called when the driver is
2525 * loaded. All it does is register with the PCI subsystem.
2526 */
2527 static int __init atl1e_init_module(void)
2528 {
2529 return pci_register_driver(&atl1e_driver);
2530 }
2531
2532 /*
2533 * atl1e_exit_module - Driver Exit Cleanup Routine
2534 *
2535 * atl1e_exit_module is called just before the driver is removed
2536 * from memory.
2537 */
2538 static void __exit atl1e_exit_module(void)
2539 {
2540 pci_unregister_driver(&atl1e_driver);
2541 }
2542
2543 module_init(atl1e_init_module);
2544 module_exit(atl1e_exit_module);
Linux with added FPC-III support