PM / Runtime: Add no_callbacks flag
[linux/fpc-iii.git] / drivers / net / au1000_eth.c
blob15ae6df2ff00b89885e778f8b1a8241a1959ddc3
1 /*
3 * Alchemy Au1x00 ethernet driver
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
18 * ########################################################################
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
27 * for more details.
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
33 * ########################################################################
37 #include <linux/capability.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/module.h>
40 #include <linux/kernel.h>
41 #include <linux/string.h>
42 #include <linux/timer.h>
43 #include <linux/errno.h>
44 #include <linux/in.h>
45 #include <linux/ioport.h>
46 #include <linux/bitops.h>
47 #include <linux/slab.h>
48 #include <linux/interrupt.h>
49 #include <linux/init.h>
50 #include <linux/netdevice.h>
51 #include <linux/etherdevice.h>
52 #include <linux/ethtool.h>
53 #include <linux/mii.h>
54 #include <linux/skbuff.h>
55 #include <linux/delay.h>
56 #include <linux/crc32.h>
57 #include <linux/phy.h>
58 #include <linux/platform_device.h>
60 #include <asm/cpu.h>
61 #include <asm/mipsregs.h>
62 #include <asm/irq.h>
63 #include <asm/io.h>
64 #include <asm/processor.h>
66 #include <au1000.h>
67 #include <au1xxx_eth.h>
68 #include <prom.h>
70 #include "au1000_eth.h"
72 #ifdef AU1000_ETH_DEBUG
73 static int au1000_debug = 5;
74 #else
75 static int au1000_debug = 3;
76 #endif
78 #define AU1000_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
79 NETIF_MSG_PROBE | \
80 NETIF_MSG_LINK)
82 #define DRV_NAME "au1000_eth"
83 #define DRV_VERSION "1.7"
84 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
85 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
87 MODULE_AUTHOR(DRV_AUTHOR);
88 MODULE_DESCRIPTION(DRV_DESC);
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(DRV_VERSION);
93 * Theory of operation
95 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
96 * There are four receive and four transmit descriptors. These
97 * descriptors are not in memory; rather, they are just a set of
98 * hardware registers.
100 * Since the Au1000 has a coherent data cache, the receive and
101 * transmit buffers are allocated from the KSEG0 segment. The
102 * hardware registers, however, are still mapped at KSEG1 to
103 * make sure there's no out-of-order writes, and that all writes
104 * complete immediately.
107 struct au1000_private *au_macs[NUM_ETH_INTERFACES];
110 * board-specific configurations
112 * PHY detection algorithm
114 * If phy_static_config is undefined, the PHY setup is
115 * autodetected:
117 * mii_probe() first searches the current MAC's MII bus for a PHY,
118 * selecting the first (or last, if phy_search_highest_addr is
119 * defined) PHY address not already claimed by another netdev.
121 * If nothing was found that way when searching for the 2nd ethernet
122 * controller's PHY and phy1_search_mac0 is defined, then
123 * the first MII bus is searched as well for an unclaimed PHY; this is
124 * needed in case of a dual-PHY accessible only through the MAC0's MII
125 * bus.
127 * Finally, if no PHY is found, then the corresponding ethernet
128 * controller is not registered to the network subsystem.
131 /* autodetection defaults: phy1_search_mac0 */
133 /* static PHY setup
135 * most boards PHY setup should be detectable properly with the
136 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
137 * you have a switch attached, or want to use the PHY's interrupt
138 * notification capabilities) you can provide a static PHY
139 * configuration here
141 * IRQs may only be set, if a PHY address was configured
142 * If a PHY address is given, also a bus id is required to be set
144 * ps: make sure the used irqs are configured properly in the board
145 * specific irq-map
148 static void au1000_enable_mac(struct net_device *dev, int force_reset)
150 unsigned long flags;
151 struct au1000_private *aup = netdev_priv(dev);
153 spin_lock_irqsave(&aup->lock, flags);
155 if(force_reset || (!aup->mac_enabled)) {
156 *aup->enable = MAC_EN_CLOCK_ENABLE;
157 au_sync_delay(2);
158 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
159 | MAC_EN_CLOCK_ENABLE);
160 au_sync_delay(2);
162 aup->mac_enabled = 1;
165 spin_unlock_irqrestore(&aup->lock, flags);
169 * MII operations
171 static int au1000_mdio_read(struct net_device *dev, int phy_addr, int reg)
173 struct au1000_private *aup = netdev_priv(dev);
174 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
175 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
176 u32 timedout = 20;
177 u32 mii_control;
179 while (*mii_control_reg & MAC_MII_BUSY) {
180 mdelay(1);
181 if (--timedout == 0) {
182 netdev_err(dev, "read_MII busy timeout!!\n");
183 return -1;
187 mii_control = MAC_SET_MII_SELECT_REG(reg) |
188 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
190 *mii_control_reg = mii_control;
192 timedout = 20;
193 while (*mii_control_reg & MAC_MII_BUSY) {
194 mdelay(1);
195 if (--timedout == 0) {
196 netdev_err(dev, "mdio_read busy timeout!!\n");
197 return -1;
200 return (int)*mii_data_reg;
203 static void au1000_mdio_write(struct net_device *dev, int phy_addr,
204 int reg, u16 value)
206 struct au1000_private *aup = netdev_priv(dev);
207 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
208 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
209 u32 timedout = 20;
210 u32 mii_control;
212 while (*mii_control_reg & MAC_MII_BUSY) {
213 mdelay(1);
214 if (--timedout == 0) {
215 netdev_err(dev, "mdio_write busy timeout!!\n");
216 return;
220 mii_control = MAC_SET_MII_SELECT_REG(reg) |
221 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
223 *mii_data_reg = value;
224 *mii_control_reg = mii_control;
227 static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
229 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
230 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
231 struct net_device *const dev = bus->priv;
233 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
234 * mii_bus is enabled */
235 return au1000_mdio_read(dev, phy_addr, regnum);
238 static int au1000_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
239 u16 value)
241 struct net_device *const dev = bus->priv;
243 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
244 * mii_bus is enabled */
245 au1000_mdio_write(dev, phy_addr, regnum, value);
246 return 0;
249 static int au1000_mdiobus_reset(struct mii_bus *bus)
251 struct net_device *const dev = bus->priv;
253 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
254 * mii_bus is enabled */
255 return 0;
258 static void au1000_hard_stop(struct net_device *dev)
260 struct au1000_private *aup = netdev_priv(dev);
262 netif_dbg(aup, drv, dev, "hard stop\n");
264 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
265 au_sync_delay(10);
268 static void au1000_enable_rx_tx(struct net_device *dev)
270 struct au1000_private *aup = netdev_priv(dev);
272 netif_dbg(aup, hw, dev, "enable_rx_tx\n");
274 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
275 au_sync_delay(10);
278 static void
279 au1000_adjust_link(struct net_device *dev)
281 struct au1000_private *aup = netdev_priv(dev);
282 struct phy_device *phydev = aup->phy_dev;
283 unsigned long flags;
285 int status_change = 0;
287 BUG_ON(!aup->phy_dev);
289 spin_lock_irqsave(&aup->lock, flags);
291 if (phydev->link && (aup->old_speed != phydev->speed)) {
292 /* speed changed */
294 switch (phydev->speed) {
295 case SPEED_10:
296 case SPEED_100:
297 break;
298 default:
299 netdev_warn(dev, "Speed (%d) is not 10/100 ???\n",
300 phydev->speed);
301 break;
304 aup->old_speed = phydev->speed;
306 status_change = 1;
309 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
310 /* duplex mode changed */
312 /* switching duplex mode requires to disable rx and tx! */
313 au1000_hard_stop(dev);
315 if (DUPLEX_FULL == phydev->duplex)
316 aup->mac->control = ((aup->mac->control
317 | MAC_FULL_DUPLEX)
318 & ~MAC_DISABLE_RX_OWN);
319 else
320 aup->mac->control = ((aup->mac->control
321 & ~MAC_FULL_DUPLEX)
322 | MAC_DISABLE_RX_OWN);
323 au_sync_delay(1);
325 au1000_enable_rx_tx(dev);
326 aup->old_duplex = phydev->duplex;
328 status_change = 1;
331 if (phydev->link != aup->old_link) {
332 /* link state changed */
334 if (!phydev->link) {
335 /* link went down */
336 aup->old_speed = 0;
337 aup->old_duplex = -1;
340 aup->old_link = phydev->link;
341 status_change = 1;
344 spin_unlock_irqrestore(&aup->lock, flags);
346 if (status_change) {
347 if (phydev->link)
348 netdev_info(dev, "link up (%d/%s)\n",
349 phydev->speed,
350 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
351 else
352 netdev_info(dev, "link down\n");
356 static int au1000_mii_probe (struct net_device *dev)
358 struct au1000_private *const aup = netdev_priv(dev);
359 struct phy_device *phydev = NULL;
361 if (aup->phy_static_config) {
362 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
364 if (aup->phy_addr)
365 phydev = aup->mii_bus->phy_map[aup->phy_addr];
366 else
367 netdev_info(dev, "using PHY-less setup\n");
368 return 0;
369 } else {
370 int phy_addr;
372 /* find the first (lowest address) PHY on the current MAC's MII bus */
373 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
374 if (aup->mii_bus->phy_map[phy_addr]) {
375 phydev = aup->mii_bus->phy_map[phy_addr];
376 if (!aup->phy_search_highest_addr)
377 break; /* break out with first one found */
380 if (aup->phy1_search_mac0) {
381 /* try harder to find a PHY */
382 if (!phydev && (aup->mac_id == 1)) {
383 /* no PHY found, maybe we have a dual PHY? */
384 dev_info(&dev->dev, ": no PHY found on MAC1, "
385 "let's see if it's attached to MAC0...\n");
387 /* find the first (lowest address) non-attached PHY on
388 * the MAC0 MII bus */
389 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
390 struct phy_device *const tmp_phydev =
391 aup->mii_bus->phy_map[phy_addr];
393 if (aup->mac_id == 1)
394 break;
396 if (!tmp_phydev)
397 continue; /* no PHY here... */
399 if (tmp_phydev->attached_dev)
400 continue; /* already claimed by MAC0 */
402 phydev = tmp_phydev;
403 break; /* found it */
409 if (!phydev) {
410 netdev_err(dev, "no PHY found\n");
411 return -1;
414 /* now we are supposed to have a proper phydev, to attach to... */
415 BUG_ON(phydev->attached_dev);
417 phydev = phy_connect(dev, dev_name(&phydev->dev), &au1000_adjust_link,
418 0, PHY_INTERFACE_MODE_MII);
420 if (IS_ERR(phydev)) {
421 netdev_err(dev, "Could not attach to PHY\n");
422 return PTR_ERR(phydev);
425 /* mask with MAC supported features */
426 phydev->supported &= (SUPPORTED_10baseT_Half
427 | SUPPORTED_10baseT_Full
428 | SUPPORTED_100baseT_Half
429 | SUPPORTED_100baseT_Full
430 | SUPPORTED_Autoneg
431 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
432 | SUPPORTED_MII
433 | SUPPORTED_TP);
435 phydev->advertising = phydev->supported;
437 aup->old_link = 0;
438 aup->old_speed = 0;
439 aup->old_duplex = -1;
440 aup->phy_dev = phydev;
442 netdev_info(dev, "attached PHY driver [%s] "
443 "(mii_bus:phy_addr=%s, irq=%d)\n",
444 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
446 return 0;
451 * Buffer allocation/deallocation routines. The buffer descriptor returned
452 * has the virtual and dma address of a buffer suitable for
453 * both, receive and transmit operations.
455 static db_dest_t *au1000_GetFreeDB(struct au1000_private *aup)
457 db_dest_t *pDB;
458 pDB = aup->pDBfree;
460 if (pDB) {
461 aup->pDBfree = pDB->pnext;
463 return pDB;
466 void au1000_ReleaseDB(struct au1000_private *aup, db_dest_t *pDB)
468 db_dest_t *pDBfree = aup->pDBfree;
469 if (pDBfree)
470 pDBfree->pnext = pDB;
471 aup->pDBfree = pDB;
474 static void au1000_reset_mac_unlocked(struct net_device *dev)
476 struct au1000_private *const aup = netdev_priv(dev);
477 int i;
479 au1000_hard_stop(dev);
481 *aup->enable = MAC_EN_CLOCK_ENABLE;
482 au_sync_delay(2);
483 *aup->enable = 0;
484 au_sync_delay(2);
486 aup->tx_full = 0;
487 for (i = 0; i < NUM_RX_DMA; i++) {
488 /* reset control bits */
489 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
491 for (i = 0; i < NUM_TX_DMA; i++) {
492 /* reset control bits */
493 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
496 aup->mac_enabled = 0;
500 static void au1000_reset_mac(struct net_device *dev)
502 struct au1000_private *const aup = netdev_priv(dev);
503 unsigned long flags;
505 netif_dbg(aup, hw, dev, "reset mac, aup %x\n",
506 (unsigned)aup);
508 spin_lock_irqsave(&aup->lock, flags);
510 au1000_reset_mac_unlocked (dev);
512 spin_unlock_irqrestore(&aup->lock, flags);
516 * Setup the receive and transmit "rings". These pointers are the addresses
517 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
518 * these are not descriptors sitting in memory.
520 static void
521 au1000_setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
523 int i;
525 for (i = 0; i < NUM_RX_DMA; i++) {
526 aup->rx_dma_ring[i] =
527 (volatile rx_dma_t *) (rx_base + sizeof(rx_dma_t)*i);
529 for (i = 0; i < NUM_TX_DMA; i++) {
530 aup->tx_dma_ring[i] =
531 (volatile tx_dma_t *) (tx_base + sizeof(tx_dma_t)*i);
536 * ethtool operations
539 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
541 struct au1000_private *aup = netdev_priv(dev);
543 if (aup->phy_dev)
544 return phy_ethtool_gset(aup->phy_dev, cmd);
546 return -EINVAL;
549 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
551 struct au1000_private *aup = netdev_priv(dev);
553 if (!capable(CAP_NET_ADMIN))
554 return -EPERM;
556 if (aup->phy_dev)
557 return phy_ethtool_sset(aup->phy_dev, cmd);
559 return -EINVAL;
562 static void
563 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
565 struct au1000_private *aup = netdev_priv(dev);
567 strcpy(info->driver, DRV_NAME);
568 strcpy(info->version, DRV_VERSION);
569 info->fw_version[0] = '\0';
570 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
571 info->regdump_len = 0;
574 static void au1000_set_msglevel(struct net_device *dev, u32 value)
576 struct au1000_private *aup = netdev_priv(dev);
577 aup->msg_enable = value;
580 static u32 au1000_get_msglevel(struct net_device *dev)
582 struct au1000_private *aup = netdev_priv(dev);
583 return aup->msg_enable;
586 static const struct ethtool_ops au1000_ethtool_ops = {
587 .get_settings = au1000_get_settings,
588 .set_settings = au1000_set_settings,
589 .get_drvinfo = au1000_get_drvinfo,
590 .get_link = ethtool_op_get_link,
591 .get_msglevel = au1000_get_msglevel,
592 .set_msglevel = au1000_set_msglevel,
597 * Initialize the interface.
599 * When the device powers up, the clocks are disabled and the
600 * mac is in reset state. When the interface is closed, we
601 * do the same -- reset the device and disable the clocks to
602 * conserve power. Thus, whenever au1000_init() is called,
603 * the device should already be in reset state.
605 static int au1000_init(struct net_device *dev)
607 struct au1000_private *aup = netdev_priv(dev);
608 unsigned long flags;
609 int i;
610 u32 control;
612 netif_dbg(aup, hw, dev, "au1000_init\n");
614 /* bring the device out of reset */
615 au1000_enable_mac(dev, 1);
617 spin_lock_irqsave(&aup->lock, flags);
619 aup->mac->control = 0;
620 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
621 aup->tx_tail = aup->tx_head;
622 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
624 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
625 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
626 dev->dev_addr[1]<<8 | dev->dev_addr[0];
628 for (i = 0; i < NUM_RX_DMA; i++) {
629 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
631 au_sync();
633 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
634 #ifndef CONFIG_CPU_LITTLE_ENDIAN
635 control |= MAC_BIG_ENDIAN;
636 #endif
637 if (aup->phy_dev) {
638 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
639 control |= MAC_FULL_DUPLEX;
640 else
641 control |= MAC_DISABLE_RX_OWN;
642 } else { /* PHY-less op, assume full-duplex */
643 control |= MAC_FULL_DUPLEX;
646 aup->mac->control = control;
647 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
648 au_sync();
650 spin_unlock_irqrestore(&aup->lock, flags);
651 return 0;
654 static inline void au1000_update_rx_stats(struct net_device *dev, u32 status)
656 struct net_device_stats *ps = &dev->stats;
658 ps->rx_packets++;
659 if (status & RX_MCAST_FRAME)
660 ps->multicast++;
662 if (status & RX_ERROR) {
663 ps->rx_errors++;
664 if (status & RX_MISSED_FRAME)
665 ps->rx_missed_errors++;
666 if (status & (RX_OVERLEN | RX_RUNT | RX_LEN_ERROR))
667 ps->rx_length_errors++;
668 if (status & RX_CRC_ERROR)
669 ps->rx_crc_errors++;
670 if (status & RX_COLL)
671 ps->collisions++;
672 } else
673 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
678 * Au1000 receive routine.
680 static int au1000_rx(struct net_device *dev)
682 struct au1000_private *aup = netdev_priv(dev);
683 struct sk_buff *skb;
684 volatile rx_dma_t *prxd;
685 u32 buff_stat, status;
686 db_dest_t *pDB;
687 u32 frmlen;
689 netif_dbg(aup, rx_status, dev, "au1000_rx head %d\n", aup->rx_head);
691 prxd = aup->rx_dma_ring[aup->rx_head];
692 buff_stat = prxd->buff_stat;
693 while (buff_stat & RX_T_DONE) {
694 status = prxd->status;
695 pDB = aup->rx_db_inuse[aup->rx_head];
696 au1000_update_rx_stats(dev, status);
697 if (!(status & RX_ERROR)) {
699 /* good frame */
700 frmlen = (status & RX_FRAME_LEN_MASK);
701 frmlen -= 4; /* Remove FCS */
702 skb = dev_alloc_skb(frmlen + 2);
703 if (skb == NULL) {
704 netdev_err(dev, "Memory squeeze, dropping packet.\n");
705 dev->stats.rx_dropped++;
706 continue;
708 skb_reserve(skb, 2); /* 16 byte IP header align */
709 skb_copy_to_linear_data(skb,
710 (unsigned char *)pDB->vaddr, frmlen);
711 skb_put(skb, frmlen);
712 skb->protocol = eth_type_trans(skb, dev);
713 netif_rx(skb); /* pass the packet to upper layers */
714 } else {
715 if (au1000_debug > 4) {
716 if (status & RX_MISSED_FRAME)
717 printk("rx miss\n");
718 if (status & RX_WDOG_TIMER)
719 printk("rx wdog\n");
720 if (status & RX_RUNT)
721 printk("rx runt\n");
722 if (status & RX_OVERLEN)
723 printk("rx overlen\n");
724 if (status & RX_COLL)
725 printk("rx coll\n");
726 if (status & RX_MII_ERROR)
727 printk("rx mii error\n");
728 if (status & RX_CRC_ERROR)
729 printk("rx crc error\n");
730 if (status & RX_LEN_ERROR)
731 printk("rx len error\n");
732 if (status & RX_U_CNTRL_FRAME)
733 printk("rx u control frame\n");
736 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
737 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
738 au_sync();
740 /* next descriptor */
741 prxd = aup->rx_dma_ring[aup->rx_head];
742 buff_stat = prxd->buff_stat;
744 return 0;
747 static void au1000_update_tx_stats(struct net_device *dev, u32 status)
749 struct au1000_private *aup = netdev_priv(dev);
750 struct net_device_stats *ps = &dev->stats;
752 if (status & TX_FRAME_ABORTED) {
753 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
754 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
755 /* any other tx errors are only valid
756 * in half duplex mode */
757 ps->tx_errors++;
758 ps->tx_aborted_errors++;
760 } else {
761 ps->tx_errors++;
762 ps->tx_aborted_errors++;
763 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
764 ps->tx_carrier_errors++;
770 * Called from the interrupt service routine to acknowledge
771 * the TX DONE bits. This is a must if the irq is setup as
772 * edge triggered.
774 static void au1000_tx_ack(struct net_device *dev)
776 struct au1000_private *aup = netdev_priv(dev);
777 volatile tx_dma_t *ptxd;
779 ptxd = aup->tx_dma_ring[aup->tx_tail];
781 while (ptxd->buff_stat & TX_T_DONE) {
782 au1000_update_tx_stats(dev, ptxd->status);
783 ptxd->buff_stat &= ~TX_T_DONE;
784 ptxd->len = 0;
785 au_sync();
787 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
788 ptxd = aup->tx_dma_ring[aup->tx_tail];
790 if (aup->tx_full) {
791 aup->tx_full = 0;
792 netif_wake_queue(dev);
798 * Au1000 interrupt service routine.
800 static irqreturn_t au1000_interrupt(int irq, void *dev_id)
802 struct net_device *dev = dev_id;
804 /* Handle RX interrupts first to minimize chance of overrun */
806 au1000_rx(dev);
807 au1000_tx_ack(dev);
808 return IRQ_RETVAL(1);
811 static int au1000_open(struct net_device *dev)
813 int retval;
814 struct au1000_private *aup = netdev_priv(dev);
816 netif_dbg(aup, drv, dev, "open: dev=%p\n", dev);
818 retval = request_irq(dev->irq, au1000_interrupt, 0,
819 dev->name, dev);
820 if (retval) {
821 netdev_err(dev, "unable to get IRQ %d\n", dev->irq);
822 return retval;
825 retval = au1000_init(dev);
826 if (retval) {
827 netdev_err(dev, "error in au1000_init\n");
828 free_irq(dev->irq, dev);
829 return retval;
832 if (aup->phy_dev) {
833 /* cause the PHY state machine to schedule a link state check */
834 aup->phy_dev->state = PHY_CHANGELINK;
835 phy_start(aup->phy_dev);
838 netif_start_queue(dev);
840 netif_dbg(aup, drv, dev, "open: Initialization done.\n");
842 return 0;
845 static int au1000_close(struct net_device *dev)
847 unsigned long flags;
848 struct au1000_private *const aup = netdev_priv(dev);
850 netif_dbg(aup, drv, dev, "close: dev=%p\n", dev);
852 if (aup->phy_dev)
853 phy_stop(aup->phy_dev);
855 spin_lock_irqsave(&aup->lock, flags);
857 au1000_reset_mac_unlocked (dev);
859 /* stop the device */
860 netif_stop_queue(dev);
862 /* disable the interrupt */
863 free_irq(dev->irq, dev);
864 spin_unlock_irqrestore(&aup->lock, flags);
866 return 0;
870 * Au1000 transmit routine.
872 static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)
874 struct au1000_private *aup = netdev_priv(dev);
875 struct net_device_stats *ps = &dev->stats;
876 volatile tx_dma_t *ptxd;
877 u32 buff_stat;
878 db_dest_t *pDB;
879 int i;
881 netif_dbg(aup, tx_queued, dev, "tx: aup %x len=%d, data=%p, head %d\n",
882 (unsigned)aup, skb->len,
883 skb->data, aup->tx_head);
885 ptxd = aup->tx_dma_ring[aup->tx_head];
886 buff_stat = ptxd->buff_stat;
887 if (buff_stat & TX_DMA_ENABLE) {
888 /* We've wrapped around and the transmitter is still busy */
889 netif_stop_queue(dev);
890 aup->tx_full = 1;
891 return NETDEV_TX_BUSY;
892 } else if (buff_stat & TX_T_DONE) {
893 au1000_update_tx_stats(dev, ptxd->status);
894 ptxd->len = 0;
897 if (aup->tx_full) {
898 aup->tx_full = 0;
899 netif_wake_queue(dev);
902 pDB = aup->tx_db_inuse[aup->tx_head];
903 skb_copy_from_linear_data(skb, (void *)pDB->vaddr, skb->len);
904 if (skb->len < ETH_ZLEN) {
905 for (i = skb->len; i < ETH_ZLEN; i++) {
906 ((char *)pDB->vaddr)[i] = 0;
908 ptxd->len = ETH_ZLEN;
909 } else
910 ptxd->len = skb->len;
912 ps->tx_packets++;
913 ps->tx_bytes += ptxd->len;
915 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
916 au_sync();
917 dev_kfree_skb(skb);
918 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
919 return NETDEV_TX_OK;
923 * The Tx ring has been full longer than the watchdog timeout
924 * value. The transmitter must be hung?
926 static void au1000_tx_timeout(struct net_device *dev)
928 netdev_err(dev, "au1000_tx_timeout: dev=%p\n", dev);
929 au1000_reset_mac(dev);
930 au1000_init(dev);
931 dev->trans_start = jiffies; /* prevent tx timeout */
932 netif_wake_queue(dev);
935 static void au1000_multicast_list(struct net_device *dev)
937 struct au1000_private *aup = netdev_priv(dev);
939 netif_dbg(aup, drv, dev, "au1000_multicast_list: flags=%x\n", dev->flags);
941 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
942 aup->mac->control |= MAC_PROMISCUOUS;
943 } else if ((dev->flags & IFF_ALLMULTI) ||
944 netdev_mc_count(dev) > MULTICAST_FILTER_LIMIT) {
945 aup->mac->control |= MAC_PASS_ALL_MULTI;
946 aup->mac->control &= ~MAC_PROMISCUOUS;
947 netdev_info(dev, "Pass all multicast\n");
948 } else {
949 struct netdev_hw_addr *ha;
950 u32 mc_filter[2]; /* Multicast hash filter */
952 mc_filter[1] = mc_filter[0] = 0;
953 netdev_for_each_mc_addr(ha, dev)
954 set_bit(ether_crc(ETH_ALEN, ha->addr)>>26,
955 (long *)mc_filter);
956 aup->mac->multi_hash_high = mc_filter[1];
957 aup->mac->multi_hash_low = mc_filter[0];
958 aup->mac->control &= ~MAC_PROMISCUOUS;
959 aup->mac->control |= MAC_HASH_MODE;
963 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
965 struct au1000_private *aup = netdev_priv(dev);
967 if (!netif_running(dev))
968 return -EINVAL;
970 if (!aup->phy_dev)
971 return -EINVAL; /* PHY not controllable */
973 return phy_mii_ioctl(aup->phy_dev, rq, cmd);
976 static const struct net_device_ops au1000_netdev_ops = {
977 .ndo_open = au1000_open,
978 .ndo_stop = au1000_close,
979 .ndo_start_xmit = au1000_tx,
980 .ndo_set_multicast_list = au1000_multicast_list,
981 .ndo_do_ioctl = au1000_ioctl,
982 .ndo_tx_timeout = au1000_tx_timeout,
983 .ndo_set_mac_address = eth_mac_addr,
984 .ndo_validate_addr = eth_validate_addr,
985 .ndo_change_mtu = eth_change_mtu,
988 static int __devinit au1000_probe(struct platform_device *pdev)
990 static unsigned version_printed;
991 struct au1000_private *aup = NULL;
992 struct au1000_eth_platform_data *pd;
993 struct net_device *dev = NULL;
994 db_dest_t *pDB, *pDBfree;
995 int irq, i, err = 0;
996 struct resource *base, *macen;
998 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
999 if (!base) {
1000 dev_err(&pdev->dev, "failed to retrieve base register\n");
1001 err = -ENODEV;
1002 goto out;
1005 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1006 if (!macen) {
1007 dev_err(&pdev->dev, "failed to retrieve MAC Enable register\n");
1008 err = -ENODEV;
1009 goto out;
1012 irq = platform_get_irq(pdev, 0);
1013 if (irq < 0) {
1014 dev_err(&pdev->dev, "failed to retrieve IRQ\n");
1015 err = -ENODEV;
1016 goto out;
1019 if (!request_mem_region(base->start, resource_size(base), pdev->name)) {
1020 dev_err(&pdev->dev, "failed to request memory region for base registers\n");
1021 err = -ENXIO;
1022 goto out;
1025 if (!request_mem_region(macen->start, resource_size(macen), pdev->name)) {
1026 dev_err(&pdev->dev, "failed to request memory region for MAC enable register\n");
1027 err = -ENXIO;
1028 goto err_request;
1031 dev = alloc_etherdev(sizeof(struct au1000_private));
1032 if (!dev) {
1033 dev_err(&pdev->dev, "alloc_etherdev failed\n");
1034 err = -ENOMEM;
1035 goto err_alloc;
1038 SET_NETDEV_DEV(dev, &pdev->dev);
1039 platform_set_drvdata(pdev, dev);
1040 aup = netdev_priv(dev);
1042 spin_lock_init(&aup->lock);
1043 aup->msg_enable = (au1000_debug < 4 ? AU1000_DEF_MSG_ENABLE : au1000_debug);
1045 /* Allocate the data buffers */
1046 /* Snooping works fine with eth on all au1xxx */
1047 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
1048 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1049 &aup->dma_addr, 0);
1050 if (!aup->vaddr) {
1051 dev_err(&pdev->dev, "failed to allocate data buffers\n");
1052 err = -ENOMEM;
1053 goto err_vaddr;
1056 /* aup->mac is the base address of the MAC's registers */
1057 aup->mac = (volatile mac_reg_t *)ioremap_nocache(base->start, resource_size(base));
1058 if (!aup->mac) {
1059 dev_err(&pdev->dev, "failed to ioremap MAC registers\n");
1060 err = -ENXIO;
1061 goto err_remap1;
1064 /* Setup some variables for quick register address access */
1065 aup->enable = (volatile u32 *)ioremap_nocache(macen->start, resource_size(macen));
1066 if (!aup->enable) {
1067 dev_err(&pdev->dev, "failed to ioremap MAC enable register\n");
1068 err = -ENXIO;
1069 goto err_remap2;
1071 aup->mac_id = pdev->id;
1073 if (pdev->id == 0)
1074 au1000_setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
1075 else if (pdev->id == 1)
1076 au1000_setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
1078 /* set a random MAC now in case platform_data doesn't provide one */
1079 random_ether_addr(dev->dev_addr);
1081 *aup->enable = 0;
1082 aup->mac_enabled = 0;
1084 pd = pdev->dev.platform_data;
1085 if (!pd) {
1086 dev_info(&pdev->dev, "no platform_data passed, PHY search on MAC0\n");
1087 aup->phy1_search_mac0 = 1;
1088 } else {
1089 if (is_valid_ether_addr(pd->mac))
1090 memcpy(dev->dev_addr, pd->mac, 6);
1092 aup->phy_static_config = pd->phy_static_config;
1093 aup->phy_search_highest_addr = pd->phy_search_highest_addr;
1094 aup->phy1_search_mac0 = pd->phy1_search_mac0;
1095 aup->phy_addr = pd->phy_addr;
1096 aup->phy_busid = pd->phy_busid;
1097 aup->phy_irq = pd->phy_irq;
1100 if (aup->phy_busid && aup->phy_busid > 0) {
1101 dev_err(&pdev->dev, "MAC0-associated PHY attached 2nd MACs MII"
1102 "bus not supported yet\n");
1103 err = -ENODEV;
1104 goto err_mdiobus_alloc;
1107 aup->mii_bus = mdiobus_alloc();
1108 if (aup->mii_bus == NULL) {
1109 dev_err(&pdev->dev, "failed to allocate mdiobus structure\n");
1110 err = -ENOMEM;
1111 goto err_mdiobus_alloc;
1114 aup->mii_bus->priv = dev;
1115 aup->mii_bus->read = au1000_mdiobus_read;
1116 aup->mii_bus->write = au1000_mdiobus_write;
1117 aup->mii_bus->reset = au1000_mdiobus_reset;
1118 aup->mii_bus->name = "au1000_eth_mii";
1119 snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%x", aup->mac_id);
1120 aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1121 if (aup->mii_bus->irq == NULL)
1122 goto err_out;
1124 for (i = 0; i < PHY_MAX_ADDR; ++i)
1125 aup->mii_bus->irq[i] = PHY_POLL;
1126 /* if known, set corresponding PHY IRQs */
1127 if (aup->phy_static_config)
1128 if (aup->phy_irq && aup->phy_busid == aup->mac_id)
1129 aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq;
1131 err = mdiobus_register(aup->mii_bus);
1132 if (err) {
1133 dev_err(&pdev->dev, "failed to register MDIO bus\n");
1134 goto err_mdiobus_reg;
1137 if (au1000_mii_probe(dev) != 0)
1138 goto err_out;
1140 pDBfree = NULL;
1141 /* setup the data buffer descriptors and attach a buffer to each one */
1142 pDB = aup->db;
1143 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
1144 pDB->pnext = pDBfree;
1145 pDBfree = pDB;
1146 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
1147 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
1148 pDB++;
1150 aup->pDBfree = pDBfree;
1152 for (i = 0; i < NUM_RX_DMA; i++) {
1153 pDB = au1000_GetFreeDB(aup);
1154 if (!pDB) {
1155 goto err_out;
1157 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1158 aup->rx_db_inuse[i] = pDB;
1160 for (i = 0; i < NUM_TX_DMA; i++) {
1161 pDB = au1000_GetFreeDB(aup);
1162 if (!pDB) {
1163 goto err_out;
1165 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1166 aup->tx_dma_ring[i]->len = 0;
1167 aup->tx_db_inuse[i] = pDB;
1170 dev->base_addr = base->start;
1171 dev->irq = irq;
1172 dev->netdev_ops = &au1000_netdev_ops;
1173 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
1174 dev->watchdog_timeo = ETH_TX_TIMEOUT;
1177 * The boot code uses the ethernet controller, so reset it to start
1178 * fresh. au1000_init() expects that the device is in reset state.
1180 au1000_reset_mac(dev);
1182 err = register_netdev(dev);
1183 if (err) {
1184 netdev_err(dev, "Cannot register net device, aborting.\n");
1185 goto err_out;
1188 netdev_info(dev, "Au1xx0 Ethernet found at 0x%lx, irq %d\n",
1189 (unsigned long)base->start, irq);
1190 if (version_printed++ == 0)
1191 printk("%s version %s %s\n", DRV_NAME, DRV_VERSION, DRV_AUTHOR);
1193 return 0;
1195 err_out:
1196 if (aup->mii_bus != NULL)
1197 mdiobus_unregister(aup->mii_bus);
1199 /* here we should have a valid dev plus aup-> register addresses
1200 * so we can reset the mac properly.*/
1201 au1000_reset_mac(dev);
1203 for (i = 0; i < NUM_RX_DMA; i++) {
1204 if (aup->rx_db_inuse[i])
1205 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1207 for (i = 0; i < NUM_TX_DMA; i++) {
1208 if (aup->tx_db_inuse[i])
1209 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1211 err_mdiobus_reg:
1212 mdiobus_free(aup->mii_bus);
1213 err_mdiobus_alloc:
1214 iounmap(aup->enable);
1215 err_remap2:
1216 iounmap(aup->mac);
1217 err_remap1:
1218 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
1219 (void *)aup->vaddr, aup->dma_addr);
1220 err_vaddr:
1221 free_netdev(dev);
1222 err_alloc:
1223 release_mem_region(macen->start, resource_size(macen));
1224 err_request:
1225 release_mem_region(base->start, resource_size(base));
1226 out:
1227 return err;
1230 static int __devexit au1000_remove(struct platform_device *pdev)
1232 struct net_device *dev = platform_get_drvdata(pdev);
1233 struct au1000_private *aup = netdev_priv(dev);
1234 int i;
1235 struct resource *base, *macen;
1237 platform_set_drvdata(pdev, NULL);
1239 unregister_netdev(dev);
1240 mdiobus_unregister(aup->mii_bus);
1241 mdiobus_free(aup->mii_bus);
1243 for (i = 0; i < NUM_RX_DMA; i++)
1244 if (aup->rx_db_inuse[i])
1245 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1247 for (i = 0; i < NUM_TX_DMA; i++)
1248 if (aup->tx_db_inuse[i])
1249 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1251 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1252 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1253 (void *)aup->vaddr, aup->dma_addr);
1255 iounmap(aup->mac);
1256 iounmap(aup->enable);
1258 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1259 release_mem_region(base->start, resource_size(base));
1261 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1262 release_mem_region(macen->start, resource_size(macen));
1264 free_netdev(dev);
1266 return 0;
1269 static struct platform_driver au1000_eth_driver = {
1270 .probe = au1000_probe,
1271 .remove = __devexit_p(au1000_remove),
1272 .driver = {
1273 .name = "au1000-eth",
1274 .owner = THIS_MODULE,
1277 MODULE_ALIAS("platform:au1000-eth");
1280 static int __init au1000_init_module(void)
1282 return platform_driver_register(&au1000_eth_driver);
1285 static void __exit au1000_exit_module(void)
1287 platform_driver_unregister(&au1000_eth_driver);
1290 module_init(au1000_init_module);
1291 module_exit(au1000_exit_module);