2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License version 2 as published
4 * by the Free Software Foundation.
6 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
7 * Based on EP93xx wdt driver
10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12 #include <linux/module.h>
14 #include <linux/miscdevice.h>
15 #include <linux/watchdog.h>
16 #include <linux/of_platform.h>
17 #include <linux/uaccess.h>
18 #include <linux/clk.h>
21 #include <lantiq_soc.h>
24 * Section 3.4 of the datasheet
25 * The password sequence protects the WDT control register from unintended
26 * write actions, which might cause malfunction of the WDT.
28 * essentially the following two magic passwords need to be written to allow
29 * IO access to the WDT core
31 #define LTQ_WDT_PW1 0x00BE0000
32 #define LTQ_WDT_PW2 0x00DC0000
34 #define LTQ_WDT_CR 0x0 /* watchdog control register */
35 #define LTQ_WDT_SR 0x8 /* watchdog status register */
37 #define LTQ_WDT_SR_EN (0x1 << 31) /* enable bit */
38 #define LTQ_WDT_SR_PWD (0x3 << 26) /* turn on power */
39 #define LTQ_WDT_SR_CLKDIV (0x3 << 24) /* turn on clock and set */
40 /* divider to 0x40000 */
41 #define LTQ_WDT_DIVIDER 0x40000
42 #define LTQ_MAX_TIMEOUT ((1 << 16) - 1) /* the reload field is 16 bit */
44 static bool nowayout
= WATCHDOG_NOWAYOUT
;
46 static void __iomem
*ltq_wdt_membase
;
47 static unsigned long ltq_io_region_clk_rate
;
49 static unsigned long ltq_wdt_bootstatus
;
50 static unsigned long ltq_wdt_in_use
;
51 static int ltq_wdt_timeout
= 30;
52 static int ltq_wdt_ok_to_close
;
57 unsigned long int timeout
= ltq_wdt_timeout
*
58 (ltq_io_region_clk_rate
/ LTQ_WDT_DIVIDER
) + 0x1000;
59 if (timeout
> LTQ_MAX_TIMEOUT
)
60 timeout
= LTQ_MAX_TIMEOUT
;
62 /* write the first password magic */
63 ltq_w32(LTQ_WDT_PW1
, ltq_wdt_membase
+ LTQ_WDT_CR
);
64 /* write the second magic plus the configuration and new timeout */
65 ltq_w32(LTQ_WDT_SR_EN
| LTQ_WDT_SR_PWD
| LTQ_WDT_SR_CLKDIV
|
66 LTQ_WDT_PW2
| timeout
, ltq_wdt_membase
+ LTQ_WDT_CR
);
72 /* write the first password magic */
73 ltq_w32(LTQ_WDT_PW1
, ltq_wdt_membase
+ LTQ_WDT_CR
);
75 * write the second password magic with no config
76 * this turns the watchdog off
78 ltq_w32(LTQ_WDT_PW2
, ltq_wdt_membase
+ LTQ_WDT_CR
);
82 ltq_wdt_write(struct file
*file
, const char __user
*data
,
83 size_t len
, loff_t
*ppos
)
89 ltq_wdt_ok_to_close
= 0;
90 for (i
= 0; i
!= len
; i
++) {
93 if (get_user(c
, data
+ i
))
96 ltq_wdt_ok_to_close
= 1;
98 ltq_wdt_ok_to_close
= 0;
107 static struct watchdog_info ident
= {
108 .options
= WDIOF_MAGICCLOSE
| WDIOF_SETTIMEOUT
| WDIOF_KEEPALIVEPING
|
110 .identity
= "ltq_wdt",
114 ltq_wdt_ioctl(struct file
*file
,
115 unsigned int cmd
, unsigned long arg
)
120 case WDIOC_GETSUPPORT
:
121 ret
= copy_to_user((struct watchdog_info __user
*)arg
, &ident
,
122 sizeof(ident
)) ? -EFAULT
: 0;
125 case WDIOC_GETBOOTSTATUS
:
126 ret
= put_user(ltq_wdt_bootstatus
, (int __user
*)arg
);
129 case WDIOC_GETSTATUS
:
130 ret
= put_user(0, (int __user
*)arg
);
133 case WDIOC_SETTIMEOUT
:
134 ret
= get_user(ltq_wdt_timeout
, (int __user
*)arg
);
137 /* intentional drop through */
138 case WDIOC_GETTIMEOUT
:
139 ret
= put_user(ltq_wdt_timeout
, (int __user
*)arg
);
142 case WDIOC_KEEPALIVE
:
151 ltq_wdt_open(struct inode
*inode
, struct file
*file
)
153 if (test_and_set_bit(0, <q_wdt_in_use
))
158 return nonseekable_open(inode
, file
);
162 ltq_wdt_release(struct inode
*inode
, struct file
*file
)
164 if (ltq_wdt_ok_to_close
)
167 pr_err("watchdog closed without warning\n");
168 ltq_wdt_ok_to_close
= 0;
169 clear_bit(0, <q_wdt_in_use
);
174 static const struct file_operations ltq_wdt_fops
= {
175 .owner
= THIS_MODULE
,
176 .write
= ltq_wdt_write
,
177 .unlocked_ioctl
= ltq_wdt_ioctl
,
178 .open
= ltq_wdt_open
,
179 .release
= ltq_wdt_release
,
183 static struct miscdevice ltq_wdt_miscdev
= {
184 .minor
= WATCHDOG_MINOR
,
186 .fops
= <q_wdt_fops
,
190 ltq_wdt_probe(struct platform_device
*pdev
)
192 struct resource
*res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
196 dev_err(&pdev
->dev
, "cannot obtain I/O memory region");
200 ltq_wdt_membase
= devm_ioremap_resource(&pdev
->dev
, res
);
201 if (IS_ERR(ltq_wdt_membase
))
202 return PTR_ERR(ltq_wdt_membase
);
204 /* we do not need to enable the clock as it is always running */
207 dev_err(&pdev
->dev
, "Failed to get clock\n");
210 ltq_io_region_clk_rate
= clk_get_rate(clk
);
213 /* find out if the watchdog caused the last reboot */
214 if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST
)
215 ltq_wdt_bootstatus
= WDIOF_CARDRESET
;
217 dev_info(&pdev
->dev
, "Init done\n");
218 return misc_register(<q_wdt_miscdev
);
222 ltq_wdt_remove(struct platform_device
*pdev
)
224 misc_deregister(<q_wdt_miscdev
);
229 static const struct of_device_id ltq_wdt_match
[] = {
230 { .compatible
= "lantiq,wdt" },
233 MODULE_DEVICE_TABLE(of
, ltq_wdt_match
);
235 static struct platform_driver ltq_wdt_driver
= {
236 .probe
= ltq_wdt_probe
,
237 .remove
= ltq_wdt_remove
,
240 .owner
= THIS_MODULE
,
241 .of_match_table
= ltq_wdt_match
,
245 module_platform_driver(ltq_wdt_driver
);
247 module_param(nowayout
, bool, 0);
248 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started");
249 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
250 MODULE_DESCRIPTION("Lantiq SoC Watchdog");
251 MODULE_LICENSE("GPL");