staging:iio:adc:ad7606 move to info_mask_(shared_by_type/separate)
[linux/fpc-iii.git] / arch / alpha / include / asm / pal.h
blob6fcd2b5b08f0d5ac4462ba6616a66519c2819d7d
1 #ifndef __ALPHA_PAL_H
2 #define __ALPHA_PAL_H
4 #include <uapi/asm/pal.h>
6 #ifndef __ASSEMBLY__
8 extern void halt(void) __attribute__((noreturn));
9 #define __halt() __asm__ __volatile__ ("call_pal %0 #halt" : : "i" (PAL_halt))
11 #define imb() \
12 __asm__ __volatile__ ("call_pal %0 #imb" : : "i" (PAL_imb) : "memory")
14 #define draina() \
15 __asm__ __volatile__ ("call_pal %0 #draina" : : "i" (PAL_draina) : "memory")
17 #define __CALL_PAL_R0(NAME, TYPE) \
18 extern inline TYPE NAME(void) \
19 { \
20 register TYPE __r0 __asm__("$0"); \
21 __asm__ __volatile__( \
22 "call_pal %1 # " #NAME \
23 :"=r" (__r0) \
24 :"i" (PAL_ ## NAME) \
25 :"$1", "$16", "$22", "$23", "$24", "$25"); \
26 return __r0; \
29 #define __CALL_PAL_W1(NAME, TYPE0) \
30 extern inline void NAME(TYPE0 arg0) \
31 { \
32 register TYPE0 __r16 __asm__("$16") = arg0; \
33 __asm__ __volatile__( \
34 "call_pal %1 # "#NAME \
35 : "=r"(__r16) \
36 : "i"(PAL_ ## NAME), "0"(__r16) \
37 : "$1", "$22", "$23", "$24", "$25"); \
40 #define __CALL_PAL_W2(NAME, TYPE0, TYPE1) \
41 extern inline void NAME(TYPE0 arg0, TYPE1 arg1) \
42 { \
43 register TYPE0 __r16 __asm__("$16") = arg0; \
44 register TYPE1 __r17 __asm__("$17") = arg1; \
45 __asm__ __volatile__( \
46 "call_pal %2 # "#NAME \
47 : "=r"(__r16), "=r"(__r17) \
48 : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \
49 : "$1", "$22", "$23", "$24", "$25"); \
52 #define __CALL_PAL_RW1(NAME, RTYPE, TYPE0) \
53 extern inline RTYPE NAME(TYPE0 arg0) \
54 { \
55 register RTYPE __r0 __asm__("$0"); \
56 register TYPE0 __r16 __asm__("$16") = arg0; \
57 __asm__ __volatile__( \
58 "call_pal %2 # "#NAME \
59 : "=r"(__r16), "=r"(__r0) \
60 : "i"(PAL_ ## NAME), "0"(__r16) \
61 : "$1", "$22", "$23", "$24", "$25"); \
62 return __r0; \
65 #define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1) \
66 extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1) \
67 { \
68 register RTYPE __r0 __asm__("$0"); \
69 register TYPE0 __r16 __asm__("$16") = arg0; \
70 register TYPE1 __r17 __asm__("$17") = arg1; \
71 __asm__ __volatile__( \
72 "call_pal %3 # "#NAME \
73 : "=r"(__r16), "=r"(__r17), "=r"(__r0) \
74 : "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17) \
75 : "$1", "$22", "$23", "$24", "$25"); \
76 return __r0; \
79 __CALL_PAL_W1(cflush, unsigned long);
80 __CALL_PAL_R0(rdmces, unsigned long);
81 __CALL_PAL_R0(rdps, unsigned long);
82 __CALL_PAL_R0(rdusp, unsigned long);
83 __CALL_PAL_RW1(swpipl, unsigned long, unsigned long);
84 __CALL_PAL_R0(whami, unsigned long);
85 __CALL_PAL_W2(wrent, void*, unsigned long);
86 __CALL_PAL_W1(wripir, unsigned long);
87 __CALL_PAL_W1(wrkgp, unsigned long);
88 __CALL_PAL_W1(wrmces, unsigned long);
89 __CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long);
90 __CALL_PAL_W1(wrusp, unsigned long);
91 __CALL_PAL_W1(wrvptptr, unsigned long);
94 * TB routines..
96 #define __tbi(nr,arg,arg1...) \
97 ({ \
98 register unsigned long __r16 __asm__("$16") = (nr); \
99 register unsigned long __r17 __asm__("$17"); arg; \
100 __asm__ __volatile__( \
101 "call_pal %3 #__tbi" \
102 :"=r" (__r16),"=r" (__r17) \
103 :"0" (__r16),"i" (PAL_tbi) ,##arg1 \
104 :"$0", "$1", "$22", "$23", "$24", "$25"); \
107 #define tbi(x,y) __tbi(x,__r17=(y),"1" (__r17))
108 #define tbisi(x) __tbi(1,__r17=(x),"1" (__r17))
109 #define tbisd(x) __tbi(2,__r17=(x),"1" (__r17))
110 #define tbis(x) __tbi(3,__r17=(x),"1" (__r17))
111 #define tbiap() __tbi(-1, /* no second argument */)
112 #define tbia() __tbi(-2, /* no second argument */)
114 #endif /* !__ASSEMBLY__ */
115 #endif /* __ALPHA_PAL_H */