staging:iio:adc:ad7606 move to info_mask_(shared_by_type/separate)
[linux/fpc-iii.git] / arch / arm / boot / dts / armada-xp-gp.dts
blob1c8afe2ffebc38710260a95cebbe13ae82f51330
1 /*
2  * Device Tree file for Marvell Armada XP development board
3  * (DB-MV784MP-GP)
4  *
5  * Copyright (C) 2013 Marvell
6  *
7  * Lior Amsalem <alior@marvell.com>
8  * Gregory CLEMENT <gregory.clement@free-electrons.com>
9  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10  *
11  * This file is licensed under the terms of the GNU General Public
12  * License version 2.  This program is licensed "as is" without any
13  * warranty of any kind, whether express or implied.
14  */
16 /dts-v1/;
17 /include/ "armada-xp-mv78460.dtsi"
19 / {
20         model = "Marvell Armada XP Development Board DB-MV784MP-GP";
21         compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
23         chosen {
24                 bootargs = "console=ttyS0,115200 earlyprintk";
25         };
27         memory {
28                 device_type = "memory";
30                 /*
31                  * 4 GB of plug-in RAM modules by default but only 3GB
32                  * are visible, the amount of memory available can be
33                  * changed by the bootloader according the size of the
34                  * module actually plugged
35                  */
36                 reg = <0x00000000 0xC0000000>;
37         };
39         soc {
40                 serial@d0012000 {
41                         clock-frequency = <250000000>;
42                         status = "okay";
43                 };
44                 serial@d0012100 {
45                         clock-frequency = <250000000>;
46                         status = "okay";
47                 };
48                 serial@d0012200 {
49                         clock-frequency = <250000000>;
50                         status = "okay";
51                 };
52                 serial@d0012300 {
53                         clock-frequency = <250000000>;
54                         status = "okay";
55                 };
57                 sata@d00a0000 {
58                         nr-ports = <2>;
59                         status = "okay";
60                 };
62                 mdio {
63                         phy0: ethernet-phy@0 {
64                                 reg = <16>;
65                         };
67                         phy1: ethernet-phy@1 {
68                                 reg = <17>;
69                         };
71                         phy2: ethernet-phy@2 {
72                                 reg = <18>;
73                         };
75                         phy3: ethernet-phy@3 {
76                                 reg = <19>;
77                         };
78                 };
80                 ethernet@d0070000 {
81                         status = "okay";
82                         phy = <&phy0>;
83                         phy-mode = "rgmii-id";
84                 };
85                 ethernet@d0074000 {
86                         status = "okay";
87                         phy = <&phy1>;
88                         phy-mode = "rgmii-id";
89                 };
90                 ethernet@d0030000 {
91                         status = "okay";
92                         phy = <&phy2>;
93                         phy-mode = "rgmii-id";
94                 };
95                 ethernet@d0034000 {
96                         status = "okay";
97                         phy = <&phy3>;
98                         phy-mode = "rgmii-id";
99                 };
101                 spi0: spi@d0010600 {
102                         status = "okay";
104                         spi-flash@0 {
105                                 #address-cells = <1>;
106                                 #size-cells = <1>;
107                                 compatible = "n25q128a13";
108                                 reg = <0>; /* Chip select 0 */
109                                 spi-max-frequency = <108000000>;
110                         };
111                 };
112         };