staging:iio:adc:ad7606 move to info_mask_(shared_by_type/separate)
[linux/fpc-iii.git] / arch / arm / common / via82c505.c
blob6cb362e56d2936eb496f4feac67321c66b5e0c7d
1 #include <linux/kernel.h>
2 #include <linux/pci.h>
3 #include <linux/interrupt.h>
4 #include <linux/mm.h>
5 #include <linux/init.h>
6 #include <linux/ioport.h>
7 #include <linux/io.h>
10 #include <asm/mach/pci.h>
12 #define MAX_SLOTS 7
14 #define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
16 static int
17 via82c505_read_config(struct pci_bus *bus, unsigned int devfn, int where,
18 int size, u32 *value)
20 outl(CONFIG_CMD(bus,devfn,where),0xCF8);
21 switch (size) {
22 case 1:
23 *value=inb(0xCFC + (where&3));
24 break;
25 case 2:
26 *value=inw(0xCFC + (where&2));
27 break;
28 case 4:
29 *value=inl(0xCFC);
30 break;
32 return PCIBIOS_SUCCESSFUL;
35 static int
36 via82c505_write_config(struct pci_bus *bus, unsigned int devfn, int where,
37 int size, u32 value)
39 outl(CONFIG_CMD(bus,devfn,where),0xCF8);
40 switch (size) {
41 case 1:
42 outb(value, 0xCFC + (where&3));
43 break;
44 case 2:
45 outw(value, 0xCFC + (where&2));
46 break;
47 case 4:
48 outl(value, 0xCFC);
49 break;
51 return PCIBIOS_SUCCESSFUL;
54 struct pci_ops via82c505_ops = {
55 .read = via82c505_read_config,
56 .write = via82c505_write_config,
59 void __init via82c505_preinit(void)
61 printk(KERN_DEBUG "PCI: VIA 82c505\n");
62 if (!request_region(0xA8,2,"via config")) {
63 printk(KERN_WARNING"VIA 82c505: Unable to request region 0xA8\n");
64 return;
66 if (!request_region(0xCF8,8,"pci config")) {
67 printk(KERN_WARNING"VIA 82c505: Unable to request region 0xCF8\n");
68 release_region(0xA8, 2);
69 return;
72 /* Enable compatible Mode */
73 outb(0x96,0xA8);
74 outb(0x18,0xA9);
75 outb(0x93,0xA8);
76 outb(0xd0,0xA9);
80 int __init via82c505_setup(int nr, struct pci_sys_data *sys)
82 return (nr == 0);