arch/arm/mach-cns3xxx/cns3420vb.c

   1 /*
   2  * Cavium Networks CNS3420 Validation Board
   3  *
   4  * Copyright 2000 Deep Blue Solutions Ltd
   5  * Copyright 2008 ARM Limited
   6  * Copyright 2008 Cavium Networks
   7  *                Scott Shu
   8  * Copyright 2010 MontaVista Software, LLC.
   9  *                Anton Vorontsov <avorontsov@mvista.com>
  10  *
  11  * This file is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License, Version 2, as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/kernel.h>
  18 #include <linux/compiler.h>
  19 #include <linux/io.h>
  20 #include <linux/dma-mapping.h>
  21 #include <linux/serial_core.h>
  22 #include <linux/serial_8250.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/physmap.h>
  26 #include <linux/mtd/partitions.h>
  27 #include <linux/usb/ehci_pdriver.h>
  28 #include <linux/usb/ohci_pdriver.h>
  29 #include <asm/setup.h>
  30 #include <asm/mach-types.h>
  31 #include <asm/mach/arch.h>
  32 #include <asm/mach/map.h>
  33 #include <asm/mach/time.h>
  34 #include <mach/cns3xxx.h>
  35 #include <mach/irqs.h>
  36 #include <mach/pm.h>
  37 #include "core.h"
  38 #include "devices.h"
  39
  40 /*
  41  * NOR Flash
  42  */
  43 static struct mtd_partition cns3420_nor_partitions[] = {
  44         {
  45                 .name           = "uboot",
  46                 .size           = 0x00040000,
  47                 .offset         = 0,
  48                 .mask_flags     = MTD_WRITEABLE,
  49         }, {
  50                 .name           = "kernel",
  51                 .size           = 0x004C0000,
  52                 .offset         = MTDPART_OFS_APPEND,
  53         }, {
  54                 .name           = "filesystem",
  55                 .size           = 0x7000000,
  56                 .offset         = MTDPART_OFS_APPEND,
  57         }, {
  58                 .name           = "filesystem2",
  59                 .size           = 0x0AE0000,
  60                 .offset         = MTDPART_OFS_APPEND,
  61         }, {
  62                 .name           = "ubootenv",
  63                 .size           = MTDPART_SIZ_FULL,
  64                 .offset         = MTDPART_OFS_APPEND,
  65         },
  66 };
  67
  68 static struct physmap_flash_data cns3420_nor_pdata = {
  69         .width = 2,
  70         .parts = cns3420_nor_partitions,
  71         .nr_parts = ARRAY_SIZE(cns3420_nor_partitions),
  72 };
  73
  74 static struct resource cns3420_nor_res = {
  75         .start = CNS3XXX_FLASH_BASE,
  76         .end = CNS3XXX_FLASH_BASE + SZ_128M - 1,
  77         .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
  78 };
  79
  80 static struct platform_device cns3420_nor_pdev = {
  81         .name = "physmap-flash",
  82         .id = 0,
  83         .resource = &cns3420_nor_res,
  84         .num_resources = 1,
  85         .dev = {
  86                 .platform_data = &cns3420_nor_pdata,
  87         },
  88 };
  89
  90 /*
  91  * UART
  92  */
  93 static void __init cns3420_early_serial_setup(void)
  94 {
  95 #ifdef CONFIG_SERIAL_8250_CONSOLE
  96         static struct uart_port cns3420_serial_port = {
  97                 .membase        = (void __iomem *)CNS3XXX_UART0_BASE_VIRT,
  98                 .mapbase        = CNS3XXX_UART0_BASE,
  99                 .irq            = IRQ_CNS3XXX_UART0,
 100                 .iotype         = UPIO_MEM,
 101                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
 102                 .regshift       = 2,
 103                 .uartclk        = 24000000,
 104                 .line           = 0,
 105                 .type           = PORT_16550A,
 106                 .fifosize       = 16,
 107         };
 108
 109         early_serial_setup(&cns3420_serial_port);
 110 #endif
 111 }
 112
 113 /*
 114  * USB
 115  */
 116 static struct resource cns3xxx_usb_ehci_resources[] = {
 117         [0] = {
 118                 .start = CNS3XXX_USB_BASE,
 119                 .end   = CNS3XXX_USB_BASE + SZ_16M - 1,
 120                 .flags = IORESOURCE_MEM,
 121         },
 122         [1] = {
 123                 .start = IRQ_CNS3XXX_USB_EHCI,
 124                 .flags = IORESOURCE_IRQ,
 125         },
 126 };
 127
 128 static u64 cns3xxx_usb_ehci_dma_mask = DMA_BIT_MASK(32);
 129
 130 static int csn3xxx_usb_power_on(struct platform_device *pdev)
 131 {
 132         /*
 133          * EHCI and OHCI share the same clock and power,
 134          * resetting twice would cause the 1st controller been reset.
 135          * Therefore only do power up  at the first up device, and
 136          * power down at the last down device.
 137          *
 138          * Set USB AHB INCR length to 16
 139          */
 140         if (atomic_inc_return(&usb_pwr_ref) == 1) {
 141                 cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB);
 142                 cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
 143                 cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST);
 144                 __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)),
 145                         MISC_CHIP_CONFIG_REG);
 146         }
 147
 148         return 0;
 149 }
 150
 151 static void csn3xxx_usb_power_off(struct platform_device *pdev)
 152 {
 153         /*
 154          * EHCI and OHCI share the same clock and power,
 155          * resetting twice would cause the 1st controller been reset.
 156          * Therefore only do power up  at the first up device, and
 157          * power down at the last down device.
 158          */
 159         if (atomic_dec_return(&usb_pwr_ref) == 0)
 160                 cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST);
 161 }
 162
 163 static struct usb_ehci_pdata cns3xxx_usb_ehci_pdata = {
 164         .power_on       = csn3xxx_usb_power_on,
 165         .power_off      = csn3xxx_usb_power_off,
 166 };
 167
 168 static struct platform_device cns3xxx_usb_ehci_device = {
 169         .name          = "ehci-platform",
 170         .num_resources = ARRAY_SIZE(cns3xxx_usb_ehci_resources),
 171         .resource      = cns3xxx_usb_ehci_resources,
 172         .dev           = {
 173                 .dma_mask          = &cns3xxx_usb_ehci_dma_mask,
 174                 .coherent_dma_mask = DMA_BIT_MASK(32),
 175                 .platform_data     = &cns3xxx_usb_ehci_pdata,
 176         },
 177 };
 178
 179 static struct resource cns3xxx_usb_ohci_resources[] = {
 180         [0] = {
 181                 .start = CNS3XXX_USB_OHCI_BASE,
 182                 .end   = CNS3XXX_USB_OHCI_BASE + SZ_16M - 1,
 183                 .flags = IORESOURCE_MEM,
 184         },
 185         [1] = {
 186                 .start = IRQ_CNS3XXX_USB_OHCI,
 187                 .flags = IORESOURCE_IRQ,
 188         },
 189 };
 190
 191 static u64 cns3xxx_usb_ohci_dma_mask = DMA_BIT_MASK(32);
 192
 193 static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = {
 194         .num_ports      = 1,
 195         .power_on       = csn3xxx_usb_power_on,
 196         .power_off      = csn3xxx_usb_power_off,
 197 };
 198
 199 static struct platform_device cns3xxx_usb_ohci_device = {
 200         .name          = "ohci-platform",
 201         .num_resources = ARRAY_SIZE(cns3xxx_usb_ohci_resources),
 202         .resource      = cns3xxx_usb_ohci_resources,
 203         .dev           = {
 204                 .dma_mask          = &cns3xxx_usb_ohci_dma_mask,
 205                 .coherent_dma_mask = DMA_BIT_MASK(32),
 206                 .platform_data     = &cns3xxx_usb_ohci_pdata,
 207         },
 208 };
 209
 210 /*
 211  * Initialization
 212  */
 213 static struct platform_device *cns3420_pdevs[] __initdata = {
 214         &cns3420_nor_pdev,
 215         &cns3xxx_usb_ehci_device,
 216         &cns3xxx_usb_ohci_device,
 217 };
 218
 219 static void __init cns3420_init(void)
 220 {
 221         cns3xxx_l2x0_init();
 222
 223         platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs));
 224
 225         cns3xxx_ahci_init();
 226         cns3xxx_sdhci_init();
 227
 228         pm_power_off = cns3xxx_power_off;
 229 }
 230
 231 static struct map_desc cns3420_io_desc[] __initdata = {
 232         {
 233                 .virtual        = CNS3XXX_UART0_BASE_VIRT,
 234                 .pfn            = __phys_to_pfn(CNS3XXX_UART0_BASE),
 235                 .length         = SZ_4K,
 236                 .type           = MT_DEVICE,
 237         },
 238 };
 239
 240 static void __init cns3420_map_io(void)
 241 {
 242         cns3xxx_map_io();
 243         iotable_init(cns3420_io_desc, ARRAY_SIZE(cns3420_io_desc));
 244
 245         cns3420_early_serial_setup();
 246 }
 247
 248 MACHINE_START(CNS3420VB, "Cavium Networks CNS3420 Validation Board")
 249         .atag_offset    = 0x100,
 250         .map_io         = cns3420_map_io,
 251         .init_irq       = cns3xxx_init_irq,
 252         .init_time      = cns3xxx_timer_init,
 253         .init_machine   = cns3420_init,
 254         .restart        = cns3xxx_restart,
 255 MACHINE_END