staging:iio:adc:ad7606 move to info_mask_(shared_by_type/separate)
[linux/fpc-iii.git] / arch / arm / mach-shmobile / setup-r8a7779.c
blobc54ff9b29fe541aaa211f792bc9c3978a41f9724
1 /*
2 * r8a7779 processor support
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/platform_device.h>
25 #include <linux/delay.h>
26 #include <linux/input.h>
27 #include <linux/io.h>
28 #include <linux/serial_sci.h>
29 #include <linux/sh_intc.h>
30 #include <linux/sh_timer.h>
31 #include <mach/hardware.h>
32 #include <mach/irqs.h>
33 #include <mach/r8a7779.h>
34 #include <mach/common.h>
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/time.h>
38 #include <asm/mach/map.h>
39 #include <asm/hardware/cache-l2x0.h>
41 static struct map_desc r8a7779_io_desc[] __initdata = {
42 /* 2M entity map for 0xf0000000 (MPCORE) */
44 .virtual = 0xf0000000,
45 .pfn = __phys_to_pfn(0xf0000000),
46 .length = SZ_2M,
47 .type = MT_DEVICE_NONSHARED
49 /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
51 .virtual = 0xfe000000,
52 .pfn = __phys_to_pfn(0xfe000000),
53 .length = SZ_16M,
54 .type = MT_DEVICE_NONSHARED
58 void __init r8a7779_map_io(void)
60 iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
63 static struct resource r8a7779_pfc_resources[] = {
64 [0] = {
65 .start = 0xfffc0000,
66 .end = 0xfffc023b,
67 .flags = IORESOURCE_MEM,
69 [1] = {
70 .start = 0xffc40000,
71 .end = 0xffc46fff,
72 .flags = IORESOURCE_MEM,
76 static struct platform_device r8a7779_pfc_device = {
77 .name = "pfc-r8a7779",
78 .id = -1,
79 .resource = r8a7779_pfc_resources,
80 .num_resources = ARRAY_SIZE(r8a7779_pfc_resources),
83 void __init r8a7779_pinmux_init(void)
85 platform_device_register(&r8a7779_pfc_device);
88 static struct plat_sci_port scif0_platform_data = {
89 .mapbase = 0xffe40000,
90 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
91 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
92 .scbrr_algo_id = SCBRR_ALGO_2,
93 .type = PORT_SCIF,
94 .irqs = SCIx_IRQ_MUXED(gic_spi(88)),
97 static struct platform_device scif0_device = {
98 .name = "sh-sci",
99 .id = 0,
100 .dev = {
101 .platform_data = &scif0_platform_data,
105 static struct plat_sci_port scif1_platform_data = {
106 .mapbase = 0xffe41000,
107 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
108 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
109 .scbrr_algo_id = SCBRR_ALGO_2,
110 .type = PORT_SCIF,
111 .irqs = SCIx_IRQ_MUXED(gic_spi(89)),
114 static struct platform_device scif1_device = {
115 .name = "sh-sci",
116 .id = 1,
117 .dev = {
118 .platform_data = &scif1_platform_data,
122 static struct plat_sci_port scif2_platform_data = {
123 .mapbase = 0xffe42000,
124 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
125 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
126 .scbrr_algo_id = SCBRR_ALGO_2,
127 .type = PORT_SCIF,
128 .irqs = SCIx_IRQ_MUXED(gic_spi(90)),
131 static struct platform_device scif2_device = {
132 .name = "sh-sci",
133 .id = 2,
134 .dev = {
135 .platform_data = &scif2_platform_data,
139 static struct plat_sci_port scif3_platform_data = {
140 .mapbase = 0xffe43000,
141 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
142 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
143 .scbrr_algo_id = SCBRR_ALGO_2,
144 .type = PORT_SCIF,
145 .irqs = SCIx_IRQ_MUXED(gic_spi(91)),
148 static struct platform_device scif3_device = {
149 .name = "sh-sci",
150 .id = 3,
151 .dev = {
152 .platform_data = &scif3_platform_data,
156 static struct plat_sci_port scif4_platform_data = {
157 .mapbase = 0xffe44000,
158 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
159 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
160 .scbrr_algo_id = SCBRR_ALGO_2,
161 .type = PORT_SCIF,
162 .irqs = SCIx_IRQ_MUXED(gic_spi(92)),
165 static struct platform_device scif4_device = {
166 .name = "sh-sci",
167 .id = 4,
168 .dev = {
169 .platform_data = &scif4_platform_data,
173 static struct plat_sci_port scif5_platform_data = {
174 .mapbase = 0xffe45000,
175 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
176 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
177 .scbrr_algo_id = SCBRR_ALGO_2,
178 .type = PORT_SCIF,
179 .irqs = SCIx_IRQ_MUXED(gic_spi(93)),
182 static struct platform_device scif5_device = {
183 .name = "sh-sci",
184 .id = 5,
185 .dev = {
186 .platform_data = &scif5_platform_data,
190 /* TMU */
191 static struct sh_timer_config tmu00_platform_data = {
192 .name = "TMU00",
193 .channel_offset = 0x4,
194 .timer_bit = 0,
195 .clockevent_rating = 200,
198 static struct resource tmu00_resources[] = {
199 [0] = {
200 .name = "TMU00",
201 .start = 0xffd80008,
202 .end = 0xffd80013,
203 .flags = IORESOURCE_MEM,
205 [1] = {
206 .start = gic_spi(32),
207 .flags = IORESOURCE_IRQ,
211 static struct platform_device tmu00_device = {
212 .name = "sh_tmu",
213 .id = 0,
214 .dev = {
215 .platform_data = &tmu00_platform_data,
217 .resource = tmu00_resources,
218 .num_resources = ARRAY_SIZE(tmu00_resources),
221 static struct sh_timer_config tmu01_platform_data = {
222 .name = "TMU01",
223 .channel_offset = 0x10,
224 .timer_bit = 1,
225 .clocksource_rating = 200,
228 static struct resource tmu01_resources[] = {
229 [0] = {
230 .name = "TMU01",
231 .start = 0xffd80014,
232 .end = 0xffd8001f,
233 .flags = IORESOURCE_MEM,
235 [1] = {
236 .start = gic_spi(33),
237 .flags = IORESOURCE_IRQ,
241 static struct platform_device tmu01_device = {
242 .name = "sh_tmu",
243 .id = 1,
244 .dev = {
245 .platform_data = &tmu01_platform_data,
247 .resource = tmu01_resources,
248 .num_resources = ARRAY_SIZE(tmu01_resources),
251 /* I2C */
252 static struct resource rcar_i2c0_res[] = {
254 .start = 0xffc70000,
255 .end = 0xffc70fff,
256 .flags = IORESOURCE_MEM,
257 }, {
258 .start = gic_spi(79),
259 .flags = IORESOURCE_IRQ,
263 static struct platform_device i2c0_device = {
264 .name = "i2c-rcar",
265 .id = 0,
266 .resource = rcar_i2c0_res,
267 .num_resources = ARRAY_SIZE(rcar_i2c0_res),
270 static struct resource rcar_i2c1_res[] = {
272 .start = 0xffc71000,
273 .end = 0xffc71fff,
274 .flags = IORESOURCE_MEM,
275 }, {
276 .start = gic_spi(82),
277 .flags = IORESOURCE_IRQ,
281 static struct platform_device i2c1_device = {
282 .name = "i2c-rcar",
283 .id = 1,
284 .resource = rcar_i2c1_res,
285 .num_resources = ARRAY_SIZE(rcar_i2c1_res),
288 static struct resource rcar_i2c2_res[] = {
290 .start = 0xffc72000,
291 .end = 0xffc72fff,
292 .flags = IORESOURCE_MEM,
293 }, {
294 .start = gic_spi(80),
295 .flags = IORESOURCE_IRQ,
299 static struct platform_device i2c2_device = {
300 .name = "i2c-rcar",
301 .id = 2,
302 .resource = rcar_i2c2_res,
303 .num_resources = ARRAY_SIZE(rcar_i2c2_res),
306 static struct resource rcar_i2c3_res[] = {
308 .start = 0xffc73000,
309 .end = 0xffc73fff,
310 .flags = IORESOURCE_MEM,
311 }, {
312 .start = gic_spi(81),
313 .flags = IORESOURCE_IRQ,
317 static struct platform_device i2c3_device = {
318 .name = "i2c-rcar",
319 .id = 3,
320 .resource = rcar_i2c3_res,
321 .num_resources = ARRAY_SIZE(rcar_i2c3_res),
324 static struct platform_device *r8a7779_early_devices[] __initdata = {
325 &scif0_device,
326 &scif1_device,
327 &scif2_device,
328 &scif3_device,
329 &scif4_device,
330 &scif5_device,
331 &tmu00_device,
332 &tmu01_device,
333 &i2c0_device,
334 &i2c1_device,
335 &i2c2_device,
336 &i2c3_device,
339 static struct platform_device *r8a7779_late_devices[] __initdata = {
342 void __init r8a7779_add_standard_devices(void)
344 #ifdef CONFIG_CACHE_L2X0
345 /* Early BRESP enable, Shared attribute override enable, 64K*16way */
346 l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
347 #endif
348 r8a7779_pm_init();
350 r8a7779_init_pm_domains();
352 platform_add_devices(r8a7779_early_devices,
353 ARRAY_SIZE(r8a7779_early_devices));
354 platform_add_devices(r8a7779_late_devices,
355 ARRAY_SIZE(r8a7779_late_devices));
358 /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
359 void __init __weak r8a7779_register_twd(void) { }
361 void __init r8a7779_earlytimer_init(void)
363 r8a7779_clock_init();
364 shmobile_earlytimer_init();
365 r8a7779_register_twd();
368 void __init r8a7779_add_early_devices(void)
370 early_platform_add_devices(r8a7779_early_devices,
371 ARRAY_SIZE(r8a7779_early_devices));
373 /* Early serial console setup is not included here due to
374 * memory map collisions. The SCIF serial ports in r8a7779
375 * are difficult to entity map 1:1 due to collision with the
376 * virtual memory range used by the coherent DMA code on ARM.
378 * Anyone wanting to debug early can remove UPF_IOREMAP from
379 * the sh-sci serial console platform data, adjust mapbase
380 * to a static M:N virt:phys mapping that needs to be added to
381 * the mappings passed with iotable_init() above.
383 * Then add a call to shmobile_setup_console() from this function.
385 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
386 * command line in case of the marzen board.