arch/arm/mach-socfpga/platsmp.c

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  * Copyright 2012 Pavel Machek <pavel@denx.de>
   4  * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
   5  * Copyright (C) 2012 Altera Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include <linux/delay.h>
  20 #include <linux/init.h>
  21 #include <linux/smp.h>
  22 #include <linux/io.h>
  23 #include <linux/of.h>
  24 #include <linux/of_address.h>
  25 #include <linux/irqchip/arm-gic.h>
  26
  27 #include <asm/cacheflush.h>
  28 #include <asm/smp_scu.h>
  29 #include <asm/smp_plat.h>
  30
  31 #include "core.h"
  32
  33 extern void __iomem *sys_manager_base_addr;
  34 extern void __iomem *rst_manager_base_addr;
  35
  36 static void __cpuinit socfpga_secondary_init(unsigned int cpu)
  37 {
  38         /*
  39          * if any interrupts are already enabled for the primary
  40          * core (e.g. timer irq), then they will not have been enabled
  41          * for us: do so
  42          */
  43         gic_secondary_init(0);
  44 }
  45
  46 static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
  47 {
  48         int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
  49
  50         if (cpu1start_addr) {
  51                 memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
  52
  53                 __raw_writel(virt_to_phys(socfpga_secondary_startup),
  54                         (sys_manager_base_addr + (cpu1start_addr & 0x000000ff)));
  55
  56                 flush_cache_all();
  57                 smp_wmb();
  58                 outer_clean_range(0, trampoline_size);
  59
  60                 /* This will release CPU #1 out of reset.*/
  61                 __raw_writel(0, rst_manager_base_addr + 0x10);
  62         }
  63
  64         return 0;
  65 }
  66
  67 /*
  68  * Initialise the CPU possible map early - this describes the CPUs
  69  * which may be present or become present in the system.
  70  */
  71 static void __init socfpga_smp_init_cpus(void)
  72 {
  73         unsigned int i, ncores;
  74
  75         ncores = scu_get_core_count(socfpga_scu_base_addr);
  76
  77         for (i = 0; i < ncores; i++)
  78                 set_cpu_possible(i, true);
  79
  80         /* sanity check */
  81         if (ncores > num_possible_cpus()) {
  82                 pr_warn("socfpga: no. of cores (%d) greater than configured"
  83                         "maximum of %d - clipping\n", ncores, num_possible_cpus());
  84                 ncores = num_possible_cpus();
  85         }
  86
  87         for (i = 0; i < ncores; i++)
  88                 set_cpu_possible(i, true);
  89 }
  90
  91 static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
  92 {
  93         scu_enable(socfpga_scu_base_addr);
  94 }
  95
  96 /*
  97  * platform-specific code to shutdown a CPU
  98  *
  99  * Called with IRQs disabled
 100  */
 101 static void socfpga_cpu_die(unsigned int cpu)
 102 {
 103         cpu_do_idle();
 104
 105         /* We should have never returned from idle */
 106         panic("cpu %d unexpectedly exit from shutdown\n", cpu);
 107 }
 108
 109 struct smp_operations socfpga_smp_ops __initdata = {
 110         .smp_init_cpus          = socfpga_smp_init_cpus,
 111         .smp_prepare_cpus       = socfpga_smp_prepare_cpus,
 112         .smp_secondary_init     = socfpga_secondary_init,
 113         .smp_boot_secondary     = socfpga_boot_secondary,
 114 #ifdef CONFIG_HOTPLUG_CPU
 115         .cpu_die                = socfpga_cpu_die,
 116 #endif
 117 };