arch/blackfin/mach-bf537/boards/cm_bf537e.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *           2008-2009 Bluetechnix
   4  *                2005 National ICT Australia (NICTA)
   5  *                      Aidan Williams <aidan@nicta.com.au>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/export.h>
  12 #include <linux/etherdevice.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/mtd/physmap.h>
  17 #include <linux/spi/spi.h>
  18 #include <linux/spi/flash.h>
  19 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  20 #include <linux/usb/isp1362.h>
  21 #endif
  22 #include <linux/ata_platform.h>
  23 #include <linux/irq.h>
  24 #include <asm/dma.h>
  25 #include <asm/bfin5xx_spi.h>
  26 #include <asm/portmux.h>
  27 #include <asm/dpmc.h>
  28 #include <asm/bfin_sport.h>
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "Bluetechnix CM BF537E";
  34
  35 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
  36 /* all SPI peripherals info goes here */
  37
  38 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  39 static struct mtd_partition bfin_spi_flash_partitions[] = {
  40         {
  41                 .name = "bootloader(spi)",
  42                 .size = 0x00020000,
  43                 .offset = 0,
  44                 .mask_flags = MTD_CAP_ROM
  45         }, {
  46                 .name = "linux kernel(spi)",
  47                 .size = 0xe0000,
  48                 .offset = 0x20000
  49         }, {
  50                 .name = "file system(spi)",
  51                 .size = 0x700000,
  52                 .offset = 0x00100000,
  53         }
  54 };
  55
  56 static struct flash_platform_data bfin_spi_flash_data = {
  57         .name = "m25p80",
  58         .parts = bfin_spi_flash_partitions,
  59         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  60         .type = "m25p64",
  61 };
  62
  63 /* SPI flash chip (m25p64) */
  64 static struct bfin5xx_spi_chip spi_flash_chip_info = {
  65         .enable_dma = 0,         /* use dma transfer with this chip*/
  66 };
  67 #endif
  68
  69 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  70 static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
  71         .enable_dma = 0,
  72 };
  73 #endif
  74
  75 static struct spi_board_info bfin_spi_board_info[] __initdata = {
  76 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  77         {
  78                 /* the modalias must be the same as spi device driver name */
  79                 .modalias = "m25p80", /* Name of spi_driver for this device */
  80                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
  81                 .bus_num = 0, /* Framework bus number */
  82                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  83                 .platform_data = &bfin_spi_flash_data,
  84                 .controller_data = &spi_flash_chip_info,
  85                 .mode = SPI_MODE_3,
  86         },
  87 #endif
  88
  89 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
  90         {
  91                 .modalias = "ad183x",
  92                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
  93                 .bus_num = 0,
  94                 .chip_select = 4,
  95         },
  96 #endif
  97
  98 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  99         {
 100                 .modalias = "mmc_spi",
 101                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 102                 .bus_num = 0,
 103                 .chip_select = 1,
 104                 .controller_data = &mmc_spi_chip_info,
 105                 .mode = SPI_MODE_3,
 106         },
 107 #endif
 108 };
 109
 110 /* SPI (0) */
 111 static struct resource bfin_spi0_resource[] = {
 112         [0] = {
 113                 .start = SPI0_REGBASE,
 114                 .end   = SPI0_REGBASE + 0xFF,
 115                 .flags = IORESOURCE_MEM,
 116                 },
 117         [1] = {
 118                 .start = CH_SPI,
 119                 .end   = CH_SPI,
 120                 .flags = IORESOURCE_DMA,
 121         },
 122         [2] = {
 123                 .start = IRQ_SPI,
 124                 .end   = IRQ_SPI,
 125                 .flags = IORESOURCE_IRQ,
 126         },
 127 };
 128
 129 /* SPI controller data */
 130 static struct bfin5xx_spi_master bfin_spi0_info = {
 131         .num_chipselect = 8,
 132         .enable_dma = 1,  /* master has the ability to do dma transfer */
 133         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 134 };
 135
 136 static struct platform_device bfin_spi0_device = {
 137         .name = "bfin-spi",
 138         .id = 0, /* Bus number */
 139         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 140         .resource = bfin_spi0_resource,
 141         .dev = {
 142                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 143         },
 144 };
 145 #endif  /* spi master and devices */
 146
 147 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
 148
 149 /* SPORT SPI controller data */
 150 static struct bfin5xx_spi_master bfin_sport_spi0_info = {
 151         .num_chipselect = MAX_BLACKFIN_GPIOS,
 152         .enable_dma = 0,  /* master don't support DMA */
 153         .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
 154                 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
 155 };
 156
 157 static struct resource bfin_sport_spi0_resource[] = {
 158         [0] = {
 159                 .start = SPORT0_TCR1,
 160                 .end   = SPORT0_TCR1 + 0xFF,
 161                 .flags = IORESOURCE_MEM,
 162                 },
 163         [1] = {
 164                 .start = IRQ_SPORT0_ERROR,
 165                 .end   = IRQ_SPORT0_ERROR,
 166                 .flags = IORESOURCE_IRQ,
 167                 },
 168 };
 169
 170 static struct platform_device bfin_sport_spi0_device = {
 171         .name = "bfin-sport-spi",
 172         .id = 1, /* Bus number */
 173         .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
 174         .resource = bfin_sport_spi0_resource,
 175         .dev = {
 176                 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
 177         },
 178 };
 179
 180 static struct bfin5xx_spi_master bfin_sport_spi1_info = {
 181         .num_chipselect = MAX_BLACKFIN_GPIOS,
 182         .enable_dma = 0,  /* master don't support DMA */
 183         .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
 184                 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
 185 };
 186
 187 static struct resource bfin_sport_spi1_resource[] = {
 188         [0] = {
 189                 .start = SPORT1_TCR1,
 190                 .end   = SPORT1_TCR1 + 0xFF,
 191                 .flags = IORESOURCE_MEM,
 192                 },
 193         [1] = {
 194                 .start = IRQ_SPORT1_ERROR,
 195                 .end   = IRQ_SPORT1_ERROR,
 196                 .flags = IORESOURCE_IRQ,
 197                 },
 198 };
 199
 200 static struct platform_device bfin_sport_spi1_device = {
 201         .name = "bfin-sport-spi",
 202         .id = 2, /* Bus number */
 203         .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
 204         .resource = bfin_sport_spi1_resource,
 205         .dev = {
 206                 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
 207         },
 208 };
 209
 210 #endif  /* sport spi master and devices */
 211
 212 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 213 static struct platform_device rtc_device = {
 214         .name = "rtc-bfin",
 215         .id   = -1,
 216 };
 217 #endif
 218
 219 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 220 static struct platform_device hitachi_fb_device = {
 221         .name = "hitachi-tx09",
 222 };
 223 #endif
 224
 225 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 226 #include <linux/smc91x.h>
 227
 228 static struct smc91x_platdata smc91x_info = {
 229         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
 230         .leda = RPC_LED_100_10,
 231         .ledb = RPC_LED_TX_RX,
 232 };
 233
 234 static struct resource smc91x_resources[] = {
 235         {
 236                 .start = 0x20200300,
 237                 .end = 0x20200300 + 16,
 238                 .flags = IORESOURCE_MEM,
 239         }, {
 240                 .start = IRQ_PF14,
 241                 .end = IRQ_PF14,
 242                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 243                 },
 244 };
 245
 246 static struct platform_device smc91x_device = {
 247         .name = "smc91x",
 248         .id = 0,
 249         .num_resources = ARRAY_SIZE(smc91x_resources),
 250         .resource = smc91x_resources,
 251         .dev    = {
 252                 .platform_data  = &smc91x_info,
 253         },
 254 };
 255 #endif
 256
 257 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 258 static struct resource isp1362_hcd_resources[] = {
 259         {
 260                 .start = 0x20308000,
 261                 .end = 0x20308000,
 262                 .flags = IORESOURCE_MEM,
 263         }, {
 264                 .start = 0x20308004,
 265                 .end = 0x20308004,
 266                 .flags = IORESOURCE_MEM,
 267         }, {
 268                 .start = IRQ_PG15,
 269                 .end = IRQ_PG15,
 270                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 271         },
 272 };
 273
 274 static struct isp1362_platform_data isp1362_priv = {
 275         .sel15Kres = 1,
 276         .clknotstop = 0,
 277         .oc_enable = 0,
 278         .int_act_high = 0,
 279         .int_edge_triggered = 0,
 280         .remote_wakeup_connected = 0,
 281         .no_power_switching = 1,
 282         .power_switching_mode = 0,
 283 };
 284
 285 static struct platform_device isp1362_hcd_device = {
 286         .name = "isp1362-hcd",
 287         .id = 0,
 288         .dev = {
 289                 .platform_data = &isp1362_priv,
 290         },
 291         .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 292         .resource = isp1362_hcd_resources,
 293 };
 294 #endif
 295
 296 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 297 static struct resource net2272_bfin_resources[] = {
 298         {
 299                 .start = 0x20300000,
 300                 .end = 0x20300000 + 0x100,
 301                 .flags = IORESOURCE_MEM,
 302         }, {
 303                 .start = IRQ_PG13,
 304                 .end = IRQ_PG13,
 305                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 306         },
 307 };
 308
 309 static struct platform_device net2272_bfin_device = {
 310         .name = "net2272",
 311         .id = -1,
 312         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 313         .resource = net2272_bfin_resources,
 314 };
 315 #endif
 316
 317 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 318 static struct mtd_partition cm_partitions[] = {
 319         {
 320                 .name   = "bootloader(nor)",
 321                 .size   = 0x40000,
 322                 .offset = 0,
 323         }, {
 324                 .name   = "linux kernel(nor)",
 325                 .size   = 0x100000,
 326                 .offset = MTDPART_OFS_APPEND,
 327         }, {
 328                 .name   = "file system(nor)",
 329                 .size   = MTDPART_SIZ_FULL,
 330                 .offset = MTDPART_OFS_APPEND,
 331         }
 332 };
 333
 334 static struct physmap_flash_data cm_flash_data = {
 335         .width    = 2,
 336         .parts    = cm_partitions,
 337         .nr_parts = ARRAY_SIZE(cm_partitions),
 338 };
 339
 340 static unsigned cm_flash_gpios[] = { GPIO_PF4 };
 341
 342 static struct resource cm_flash_resource[] = {
 343         {
 344                 .name  = "cfi_probe",
 345                 .start = 0x20000000,
 346                 .end   = 0x201fffff,
 347                 .flags = IORESOURCE_MEM,
 348         }, {
 349                 .start = (unsigned long)cm_flash_gpios,
 350                 .end   = ARRAY_SIZE(cm_flash_gpios),
 351                 .flags = IORESOURCE_IRQ,
 352         }
 353 };
 354
 355 static struct platform_device cm_flash_device = {
 356         .name          = "gpio-addr-flash",
 357         .id            = 0,
 358         .dev = {
 359                 .platform_data = &cm_flash_data,
 360         },
 361         .num_resources = ARRAY_SIZE(cm_flash_resource),
 362         .resource      = cm_flash_resource,
 363 };
 364 #endif
 365
 366 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 367 #ifdef CONFIG_SERIAL_BFIN_UART0
 368 static struct resource bfin_uart0_resources[] = {
 369         {
 370                 .start = UART0_THR,
 371                 .end = UART0_GCTL+2,
 372                 .flags = IORESOURCE_MEM,
 373         },
 374         {
 375                 .start = IRQ_UART0_TX,
 376                 .end = IRQ_UART0_TX,
 377                 .flags = IORESOURCE_IRQ,
 378         },
 379         {
 380                 .start = IRQ_UART0_RX,
 381                 .end = IRQ_UART0_RX,
 382                 .flags = IORESOURCE_IRQ,
 383         },
 384         {
 385                 .start = IRQ_UART0_ERROR,
 386                 .end = IRQ_UART0_ERROR,
 387                 .flags = IORESOURCE_IRQ,
 388         },
 389         {
 390                 .start = CH_UART0_TX,
 391                 .end = CH_UART0_TX,
 392                 .flags = IORESOURCE_DMA,
 393         },
 394         {
 395                 .start = CH_UART0_RX,
 396                 .end = CH_UART0_RX,
 397                 .flags = IORESOURCE_DMA,
 398         },
 399 #ifdef CONFIG_BFIN_UART0_CTSRTS
 400         {
 401                 /*
 402                  * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 403                  */
 404                 .start = -1,
 405                 .end = -1,
 406                 .flags = IORESOURCE_IO,
 407         },
 408         {
 409                 /*
 410                  * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 411                  */
 412                 .start = -1,
 413                 .end = -1,
 414                 .flags = IORESOURCE_IO,
 415         },
 416 #endif
 417 };
 418
 419 static unsigned short bfin_uart0_peripherals[] = {
 420         P_UART0_TX, P_UART0_RX, 0
 421 };
 422
 423 static struct platform_device bfin_uart0_device = {
 424         .name = "bfin-uart",
 425         .id = 0,
 426         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 427         .resource = bfin_uart0_resources,
 428         .dev = {
 429                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 430         },
 431 };
 432 #endif
 433 #ifdef CONFIG_SERIAL_BFIN_UART1
 434 static struct resource bfin_uart1_resources[] = {
 435         {
 436                 .start = UART1_THR,
 437                 .end = UART1_GCTL+2,
 438                 .flags = IORESOURCE_MEM,
 439         },
 440         {
 441                 .start = IRQ_UART1_TX,
 442                 .end = IRQ_UART1_TX,
 443                 .flags = IORESOURCE_IRQ,
 444         },
 445         {
 446                 .start = IRQ_UART1_RX,
 447                 .end = IRQ_UART1_RX,
 448                 .flags = IORESOURCE_IRQ,
 449         },
 450         {
 451                 .start = IRQ_UART1_ERROR,
 452                 .end = IRQ_UART1_ERROR,
 453                 .flags = IORESOURCE_IRQ,
 454         },
 455         {
 456                 .start = CH_UART1_TX,
 457                 .end = CH_UART1_TX,
 458                 .flags = IORESOURCE_DMA,
 459         },
 460         {
 461                 .start = CH_UART1_RX,
 462                 .end = CH_UART1_RX,
 463                 .flags = IORESOURCE_DMA,
 464         },
 465 #ifdef CONFIG_BFIN_UART1_CTSRTS
 466         {
 467                 /*
 468                  * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 469                  */
 470                 .start = -1,
 471                 .end = -1,
 472                 .flags = IORESOURCE_IO,
 473         },
 474         {
 475                 /*
 476                  * Refer to arch/blackfin/mach-xxx/include/mach/gpio.h for the GPIO map.
 477                  */
 478                 .start = -1,
 479                 .end = -1,
 480                 .flags = IORESOURCE_IO,
 481         },
 482 #endif
 483 };
 484
 485 static unsigned short bfin_uart1_peripherals[] = {
 486         P_UART1_TX, P_UART1_RX, 0
 487 };
 488
 489 static struct platform_device bfin_uart1_device = {
 490         .name = "bfin-uart",
 491         .id = 1,
 492         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 493         .resource = bfin_uart1_resources,
 494         .dev = {
 495                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 496         },
 497 };
 498 #endif
 499 #endif
 500
 501 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 502 #ifdef CONFIG_BFIN_SIR0
 503 static struct resource bfin_sir0_resources[] = {
 504         {
 505                 .start = 0xFFC00400,
 506                 .end = 0xFFC004FF,
 507                 .flags = IORESOURCE_MEM,
 508         },
 509         {
 510                 .start = IRQ_UART0_RX,
 511                 .end = IRQ_UART0_RX+1,
 512                 .flags = IORESOURCE_IRQ,
 513         },
 514         {
 515                 .start = CH_UART0_RX,
 516                 .end = CH_UART0_RX+1,
 517                 .flags = IORESOURCE_DMA,
 518         },
 519 };
 520 static struct platform_device bfin_sir0_device = {
 521         .name = "bfin_sir",
 522         .id = 0,
 523         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 524         .resource = bfin_sir0_resources,
 525 };
 526 #endif
 527 #ifdef CONFIG_BFIN_SIR1
 528 static struct resource bfin_sir1_resources[] = {
 529         {
 530                 .start = 0xFFC02000,
 531                 .end = 0xFFC020FF,
 532                 .flags = IORESOURCE_MEM,
 533         },
 534         {
 535                 .start = IRQ_UART1_RX,
 536                 .end = IRQ_UART1_RX+1,
 537                 .flags = IORESOURCE_IRQ,
 538         },
 539         {
 540                 .start = CH_UART1_RX,
 541                 .end = CH_UART1_RX+1,
 542                 .flags = IORESOURCE_DMA,
 543         },
 544 };
 545 static struct platform_device bfin_sir1_device = {
 546         .name = "bfin_sir",
 547         .id = 1,
 548         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 549         .resource = bfin_sir1_resources,
 550 };
 551 #endif
 552 #endif
 553
 554 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 555 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
 556
 557 static struct resource bfin_twi0_resource[] = {
 558         [0] = {
 559                 .start = TWI0_REGBASE,
 560                 .end   = TWI0_REGBASE,
 561                 .flags = IORESOURCE_MEM,
 562         },
 563         [1] = {
 564                 .start = IRQ_TWI,
 565                 .end   = IRQ_TWI,
 566                 .flags = IORESOURCE_IRQ,
 567         },
 568 };
 569
 570 static struct platform_device i2c_bfin_twi_device = {
 571         .name = "i2c-bfin-twi",
 572         .id = 0,
 573         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 574         .resource = bfin_twi0_resource,
 575         .dev = {
 576                 .platform_data = &bfin_twi0_pins,
 577         },
 578 };
 579 #endif
 580
 581 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \
 582 || defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
 583 unsigned short bfin_sport0_peripherals[] = {
 584         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 585         P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
 586 };
 587 #endif
 588 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 589 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 590 static struct resource bfin_sport0_uart_resources[] = {
 591         {
 592                 .start = SPORT0_TCR1,
 593                 .end = SPORT0_MRCS3+4,
 594                 .flags = IORESOURCE_MEM,
 595         },
 596         {
 597                 .start = IRQ_SPORT0_RX,
 598                 .end = IRQ_SPORT0_RX+1,
 599                 .flags = IORESOURCE_IRQ,
 600         },
 601         {
 602                 .start = IRQ_SPORT0_ERROR,
 603                 .end = IRQ_SPORT0_ERROR,
 604                 .flags = IORESOURCE_IRQ,
 605         },
 606 };
 607
 608 static struct platform_device bfin_sport0_uart_device = {
 609         .name = "bfin-sport-uart",
 610         .id = 0,
 611         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 612         .resource = bfin_sport0_uart_resources,
 613         .dev = {
 614                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 615         },
 616 };
 617 #endif
 618 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 619 static struct resource bfin_sport1_uart_resources[] = {
 620         {
 621                 .start = SPORT1_TCR1,
 622                 .end = SPORT1_MRCS3+4,
 623                 .flags = IORESOURCE_MEM,
 624         },
 625         {
 626                 .start = IRQ_SPORT1_RX,
 627                 .end = IRQ_SPORT1_RX+1,
 628                 .flags = IORESOURCE_IRQ,
 629         },
 630         {
 631                 .start = IRQ_SPORT1_ERROR,
 632                 .end = IRQ_SPORT1_ERROR,
 633                 .flags = IORESOURCE_IRQ,
 634         },
 635 };
 636
 637 static unsigned short bfin_sport1_peripherals[] = {
 638         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 639         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 640 };
 641
 642 static struct platform_device bfin_sport1_uart_device = {
 643         .name = "bfin-sport-uart",
 644         .id = 1,
 645         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 646         .resource = bfin_sport1_uart_resources,
 647         .dev = {
 648                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 649         },
 650 };
 651 #endif
 652 #endif
 653 #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
 654 static struct resource bfin_sport0_resources[] = {
 655         {
 656                 .start = SPORT0_TCR1,
 657                 .end = SPORT0_MRCS3+4,
 658                 .flags = IORESOURCE_MEM,
 659         },
 660         {
 661                 .start = IRQ_SPORT0_RX,
 662                 .end = IRQ_SPORT0_RX+1,
 663                 .flags = IORESOURCE_IRQ,
 664         },
 665         {
 666                 .start = IRQ_SPORT0_TX,
 667                 .end = IRQ_SPORT0_TX+1,
 668                 .flags = IORESOURCE_IRQ,
 669         },
 670         {
 671                 .start = IRQ_SPORT0_ERROR,
 672                 .end = IRQ_SPORT0_ERROR,
 673                 .flags = IORESOURCE_IRQ,
 674         },
 675         {
 676                 .start = CH_SPORT0_TX,
 677                 .end = CH_SPORT0_TX,
 678                 .flags = IORESOURCE_DMA,
 679         },
 680         {
 681                 .start = CH_SPORT0_RX,
 682                 .end = CH_SPORT0_RX,
 683                 .flags = IORESOURCE_DMA,
 684         },
 685 };
 686 static struct platform_device bfin_sport0_device = {
 687         .name = "bfin_sport_raw",
 688         .id = 0,
 689         .num_resources = ARRAY_SIZE(bfin_sport0_resources),
 690         .resource = bfin_sport0_resources,
 691         .dev = {
 692                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 693         },
 694 };
 695 #endif
 696
 697 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 698 #include <linux/bfin_mac.h>
 699 static const unsigned short bfin_mac_peripherals[] = P_MII0;
 700
 701 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 702         {
 703                 .addr = 1,
 704                 .irq = IRQ_MAC_PHYINT,
 705         },
 706 };
 707
 708 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 709         .phydev_number = 1,
 710         .phydev_data = bfin_phydev_data,
 711         .phy_mode = PHY_INTERFACE_MODE_MII,
 712         .mac_peripherals = bfin_mac_peripherals,
 713 };
 714
 715 static struct platform_device bfin_mii_bus = {
 716         .name = "bfin_mii_bus",
 717         .dev = {
 718                 .platform_data = &bfin_mii_bus_data,
 719         }
 720 };
 721
 722 static struct platform_device bfin_mac_device = {
 723         .name = "bfin_mac",
 724         .dev = {
 725                 .platform_data = &bfin_mii_bus,
 726         }
 727 };
 728 #endif
 729
 730 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 731 #define PATA_INT        IRQ_PF14
 732
 733 static struct pata_platform_info bfin_pata_platform_data = {
 734         .ioport_shift = 2,
 735         .irq_type = IRQF_TRIGGER_HIGH,
 736 };
 737
 738 static struct resource bfin_pata_resources[] = {
 739         {
 740                 .start = 0x2030C000,
 741                 .end = 0x2030C01F,
 742                 .flags = IORESOURCE_MEM,
 743         },
 744         {
 745                 .start = 0x2030D018,
 746                 .end = 0x2030D01B,
 747                 .flags = IORESOURCE_MEM,
 748         },
 749         {
 750                 .start = PATA_INT,
 751                 .end = PATA_INT,
 752                 .flags = IORESOURCE_IRQ,
 753         },
 754 };
 755
 756 static struct platform_device bfin_pata_device = {
 757         .name = "pata_platform",
 758         .id = -1,
 759         .num_resources = ARRAY_SIZE(bfin_pata_resources),
 760         .resource = bfin_pata_resources,
 761         .dev = {
 762                 .platform_data = &bfin_pata_platform_data,
 763         }
 764 };
 765 #endif
 766
 767 static const unsigned int cclk_vlev_datasheet[] =
 768 {
 769         VRPAIR(VLEV_085, 250000000),
 770         VRPAIR(VLEV_090, 376000000),
 771         VRPAIR(VLEV_095, 426000000),
 772         VRPAIR(VLEV_100, 426000000),
 773         VRPAIR(VLEV_105, 476000000),
 774         VRPAIR(VLEV_110, 476000000),
 775         VRPAIR(VLEV_115, 476000000),
 776         VRPAIR(VLEV_120, 500000000),
 777         VRPAIR(VLEV_125, 533000000),
 778         VRPAIR(VLEV_130, 600000000),
 779 };
 780
 781 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 782         .tuple_tab = cclk_vlev_datasheet,
 783         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 784         .vr_settling_time = 25 /* us */,
 785 };
 786
 787 static struct platform_device bfin_dpmc = {
 788         .name = "bfin dpmc",
 789         .dev = {
 790                 .platform_data = &bfin_dmpc_vreg_data,
 791         },
 792 };
 793
 794 static struct platform_device *cm_bf537e_devices[] __initdata = {
 795
 796         &bfin_dpmc,
 797
 798 #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
 799         &bfin_sport0_device,
 800 #endif
 801
 802 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
 803         &hitachi_fb_device,
 804 #endif
 805
 806 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 807         &rtc_device,
 808 #endif
 809
 810 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 811 #ifdef CONFIG_SERIAL_BFIN_UART0
 812         &bfin_uart0_device,
 813 #endif
 814 #ifdef CONFIG_SERIAL_BFIN_UART1
 815         &bfin_uart1_device,
 816 #endif
 817 #endif
 818
 819 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 820 #ifdef CONFIG_BFIN_SIR0
 821         &bfin_sir0_device,
 822 #endif
 823 #ifdef CONFIG_BFIN_SIR1
 824         &bfin_sir1_device,
 825 #endif
 826 #endif
 827
 828 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 829         &i2c_bfin_twi_device,
 830 #endif
 831
 832 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 833 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 834         &bfin_sport0_uart_device,
 835 #endif
 836 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 837         &bfin_sport1_uart_device,
 838 #endif
 839 #endif
 840
 841 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 842         &isp1362_hcd_device,
 843 #endif
 844
 845 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 846         &smc91x_device,
 847 #endif
 848
 849 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 850         &bfin_mii_bus,
 851         &bfin_mac_device,
 852 #endif
 853
 854 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 855         &net2272_bfin_device,
 856 #endif
 857
 858 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 859         &bfin_spi0_device,
 860 #endif
 861
 862 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
 863         &bfin_sport_spi0_device,
 864         &bfin_sport_spi1_device,
 865 #endif
 866
 867 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 868         &bfin_pata_device,
 869 #endif
 870
 871 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
 872         &cm_flash_device,
 873 #endif
 874 };
 875
 876 static int __init net2272_init(void)
 877 {
 878 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 879         int ret;
 880
 881         ret = gpio_request(GPIO_PG14, "net2272");
 882         if (ret)
 883                 return ret;
 884
 885         /* Reset USB Chip, PG14 */
 886         gpio_direction_output(GPIO_PG14, 0);
 887         mdelay(2);
 888         gpio_set_value(GPIO_PG14, 1);
 889 #endif
 890
 891         return 0;
 892 }
 893
 894 static int __init cm_bf537e_init(void)
 895 {
 896         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 897         platform_add_devices(cm_bf537e_devices, ARRAY_SIZE(cm_bf537e_devices));
 898 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 899         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 900 #endif
 901
 902 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
 903         irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
 904 #endif
 905
 906         if (net2272_init())
 907                 pr_warning("unable to configure net2272; it probably won't work\n");
 908
 909         return 0;
 910 }
 911
 912 arch_initcall(cm_bf537e_init);
 913
 914 static struct platform_device *cm_bf537e_early_devices[] __initdata = {
 915 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 916 #ifdef CONFIG_SERIAL_BFIN_UART0
 917         &bfin_uart0_device,
 918 #endif
 919 #ifdef CONFIG_SERIAL_BFIN_UART1
 920         &bfin_uart1_device,
 921 #endif
 922 #endif
 923
 924 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 925 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 926         &bfin_sport0_uart_device,
 927 #endif
 928 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 929         &bfin_sport1_uart_device,
 930 #endif
 931 #endif
 932 };
 933
 934 void __init native_machine_early_platform_add_devices(void)
 935 {
 936         printk(KERN_INFO "register early platform devices\n");
 937         early_platform_add_devices(cm_bf537e_early_devices,
 938                 ARRAY_SIZE(cm_bf537e_early_devices));
 939 }
 940
 941 int bfin_get_ether_addr(char *addr)
 942 {
 943         return 1;
 944 }
 945 EXPORT_SYMBOL(bfin_get_ether_addr);