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x86: Cleanup highmap after brk is concluded
[linux/fpc-iii.git] / arch / x86 / kernel / mpparse.c
blobe07bc4ef282912f3747d94a9402f911dd80198b2
1 /*
2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
8 */
9
10 #include <linux/mm.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/mc146818rtc.h>
16 #include <linux/bitops.h>
17 #include <linux/acpi.h>
18 #include <linux/module.h>
19 #include <linux/smp.h>
20 #include <linux/pci.h>
21
22 #include <asm/mtrr.h>
23 #include <asm/mpspec.h>
24 #include <asm/pgalloc.h>
25 #include <asm/io_apic.h>
26 #include <asm/proto.h>
27 #include <asm/bios_ebda.h>
28 #include <asm/e820.h>
29 #include <asm/trampoline.h>
30 #include <asm/setup.h>
31 #include <asm/smp.h>
32
33 #include <asm/apic.h>
34 /*
35 * Checksum an MP configuration block.
36 */
37
38 static int __init mpf_checksum(unsigned char *mp, int len)
39 {
40 int sum = 0;
41
42 while (len--)
43 sum += *mp++;
44
45 return sum & 0xFF;
46 }
47
48 int __init default_mpc_apic_id(struct mpc_cpu *m)
49 {
50 return m->apicid;
51 }
52
53 static void __init MP_processor_info(struct mpc_cpu *m)
54 {
55 int apicid;
56 char *bootup_cpu = "";
57
58 if (!(m->cpuflag & CPU_ENABLED)) {
59 disabled_cpus++;
60 return;
61 }
62
63 apicid = x86_init.mpparse.mpc_apic_id(m);
64
65 if (m->cpuflag & CPU_BOOTPROCESSOR) {
66 bootup_cpu = " (Bootup-CPU)";
67 boot_cpu_physical_apicid = m->apicid;
68 }
69
70 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
71 generic_processor_info(apicid, m->apicver);
72 }
73
74 #ifdef CONFIG_X86_IO_APIC
75 void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
76 {
77 memcpy(str, m->bustype, 6);
78 str[6] = 0;
79 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
80 }
81
82 static void __init MP_bus_info(struct mpc_bus *m)
83 {
84 char str[7];
85
86 x86_init.mpparse.mpc_oem_bus_info(m, str);
87
88 #if MAX_MP_BUSSES < 256
89 if (m->busid >= MAX_MP_BUSSES) {
90 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
91 " is too large, max. supported is %d\n",
92 m->busid, str, MAX_MP_BUSSES - 1);
93 return;
94 }
95 #endif
96
97 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
98 set_bit(m->busid, mp_bus_not_pci);
99 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
100 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
101 #endif
102 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
103 if (x86_init.mpparse.mpc_oem_pci_bus)
104 x86_init.mpparse.mpc_oem_pci_bus(m);
105
106 clear_bit(m->busid, mp_bus_not_pci);
107 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
108 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
109 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
110 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
111 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
112 mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
113 #endif
114 } else
115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
116 }
117
118 static int bad_ioapic(unsigned long address)
119 {
120 if (nr_ioapics >= MAX_IO_APICS) {
121 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
122 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
123 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
124 }
125 if (!address) {
126 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
127 " found in table, skipping!\n");
128 return 1;
129 }
130 return 0;
131 }
132
133 static void __init MP_ioapic_info(struct mpc_ioapic *m)
134 {
135 if (!(m->flags & MPC_APIC_USABLE))
136 return;
137
138 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
139 m->apicid, m->apicver, m->apicaddr);
140
141 if (bad_ioapic(m->apicaddr))
142 return;
143
144 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
145 mp_ioapics[nr_ioapics].apicid = m->apicid;
146 mp_ioapics[nr_ioapics].type = m->type;
147 mp_ioapics[nr_ioapics].apicver = m->apicver;
148 mp_ioapics[nr_ioapics].flags = m->flags;
149 nr_ioapics++;
150 }
151
152 static void print_MP_intsrc_info(struct mpc_intsrc *m)
153 {
154 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
155 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
156 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
157 m->srcbusirq, m->dstapic, m->dstirq);
158 }
159
160 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
161 {
162 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
163 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
164 mp_irq->irqtype, mp_irq->irqflag & 3,
165 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
166 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
167 }
168
169 static void __init assign_to_mp_irq(struct mpc_intsrc *m,
170 struct mpc_intsrc *mp_irq)
171 {
172 mp_irq->dstapic = m->dstapic;
173 mp_irq->type = m->type;
174 mp_irq->irqtype = m->irqtype;
175 mp_irq->irqflag = m->irqflag;
176 mp_irq->srcbus = m->srcbus;
177 mp_irq->srcbusirq = m->srcbusirq;
178 mp_irq->dstirq = m->dstirq;
179 }
180
181 static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
182 struct mpc_intsrc *m)
183 {
184 m->dstapic = mp_irq->dstapic;
185 m->type = mp_irq->type;
186 m->irqtype = mp_irq->irqtype;
187 m->irqflag = mp_irq->irqflag;
188 m->srcbus = mp_irq->srcbus;
189 m->srcbusirq = mp_irq->srcbusirq;
190 m->dstirq = mp_irq->dstirq;
191 }
192
193 static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
194 struct mpc_intsrc *m)
195 {
196 if (mp_irq->dstapic != m->dstapic)
197 return 1;
198 if (mp_irq->type != m->type)
199 return 2;
200 if (mp_irq->irqtype != m->irqtype)
201 return 3;
202 if (mp_irq->irqflag != m->irqflag)
203 return 4;
204 if (mp_irq->srcbus != m->srcbus)
205 return 5;
206 if (mp_irq->srcbusirq != m->srcbusirq)
207 return 6;
208 if (mp_irq->dstirq != m->dstirq)
209 return 7;
210
211 return 0;
212 }
213
214 static void __init MP_intsrc_info(struct mpc_intsrc *m)
215 {
216 int i;
217
218 print_MP_intsrc_info(m);
219
220 for (i = 0; i < mp_irq_entries; i++) {
221 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
222 return;
223 }
224
225 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
226 if (++mp_irq_entries == MAX_IRQ_SOURCES)
227 panic("Max # of irq sources exceeded!!\n");
228 }
229 #else /* CONFIG_X86_IO_APIC */
230 static inline void __init MP_bus_info(struct mpc_bus *m) {}
231 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
232 static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
233 #endif /* CONFIG_X86_IO_APIC */
234
235
236 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
237 {
238 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
239 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
240 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
241 m->srcbusirq, m->destapic, m->destapiclint);
242 }
243
244 /*
245 * Read/parse the MPC
246 */
247
248 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
249 {
250
251 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
252 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
253 mpc->signature[0], mpc->signature[1],
254 mpc->signature[2], mpc->signature[3]);
255 return 0;
256 }
257 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
258 printk(KERN_ERR "MPTABLE: checksum error!\n");
259 return 0;
260 }
261 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
262 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
263 mpc->spec);
264 return 0;
265 }
266 if (!mpc->lapic) {
267 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
268 return 0;
269 }
270 memcpy(oem, mpc->oem, 8);
271 oem[8] = 0;
272 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
273
274 memcpy(str, mpc->productid, 12);
275 str[12] = 0;
276
277 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
278
279 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
280
281 return 1;
282 }
283
284 static void skip_entry(unsigned char **ptr, int *count, int size)
285 {
286 *ptr += size;
287 *count += size;
288 }
289
290 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
291 {
292 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
293 "type %x\n", *mpt);
294 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
295 1, mpc, mpc->length, 1);
296 }
297
298 void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
299
300 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
301 {
302 char str[16];
303 char oem[10];
304
305 int count = sizeof(*mpc);
306 unsigned char *mpt = ((unsigned char *)mpc) + count;
307
308 if (!smp_check_mpc(mpc, oem, str))
309 return 0;
310
311 #ifdef CONFIG_X86_32
312 generic_mps_oem_check(mpc, oem, str);
313 #endif
314 /* save the local APIC address, it might be non-default */
315 if (!acpi_lapic)
316 mp_lapic_addr = mpc->lapic;
317
318 if (early)
319 return 1;
320
321 if (mpc->oemptr)
322 x86_init.mpparse.smp_read_mpc_oem(mpc);
323
324 /*
325 * Now process the configuration blocks.
326 */
327 x86_init.mpparse.mpc_record(0);
328
329 while (count < mpc->length) {
330 switch (*mpt) {
331 case MP_PROCESSOR:
332 /* ACPI may have already provided this data */
333 if (!acpi_lapic)
334 MP_processor_info((struct mpc_cpu *)mpt);
335 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
336 break;
337 case MP_BUS:
338 MP_bus_info((struct mpc_bus *)mpt);
339 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
340 break;
341 case MP_IOAPIC:
342 MP_ioapic_info((struct mpc_ioapic *)mpt);
343 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
344 break;
345 case MP_INTSRC:
346 MP_intsrc_info((struct mpc_intsrc *)mpt);
347 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
348 break;
349 case MP_LINTSRC:
350 MP_lintsrc_info((struct mpc_lintsrc *)mpt);
351 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
352 break;
353 default:
354 /* wrong mptable */
355 smp_dump_mptable(mpc, mpt);
356 count = mpc->length;
357 break;
358 }
359 x86_init.mpparse.mpc_record(1);
360 }
361
362 if (!num_processors)
363 printk(KERN_ERR "MPTABLE: no processors registered!\n");
364 return num_processors;
365 }
366
367 #ifdef CONFIG_X86_IO_APIC
368
369 static int __init ELCR_trigger(unsigned int irq)
370 {
371 unsigned int port;
372
373 port = 0x4d0 + (irq >> 3);
374 return (inb(port) >> (irq & 7)) & 1;
375 }
376
377 static void __init construct_default_ioirq_mptable(int mpc_default_type)
378 {
379 struct mpc_intsrc intsrc;
380 int i;
381 int ELCR_fallback = 0;
382
383 intsrc.type = MP_INTSRC;
384 intsrc.irqflag = 0; /* conforming */
385 intsrc.srcbus = 0;
386 intsrc.dstapic = mp_ioapics[0].apicid;
387
388 intsrc.irqtype = mp_INT;
389
390 /*
391 * If true, we have an ISA/PCI system with no IRQ entries
392 * in the MP table. To prevent the PCI interrupts from being set up
393 * incorrectly, we try to use the ELCR. The sanity check to see if
394 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
395 * never be level sensitive, so we simply see if the ELCR agrees.
396 * If it does, we assume it's valid.
397 */
398 if (mpc_default_type == 5) {
399 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
400 "falling back to ELCR\n");
401
402 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
403 ELCR_trigger(13))
404 printk(KERN_ERR "ELCR contains invalid data... "
405 "not using ELCR\n");
406 else {
407 printk(KERN_INFO
408 "Using ELCR to identify PCI interrupts\n");
409 ELCR_fallback = 1;
410 }
411 }
412
413 for (i = 0; i < 16; i++) {
414 switch (mpc_default_type) {
415 case 2:
416 if (i == 0 || i == 13)
417 continue; /* IRQ0 & IRQ13 not connected */
418 /* fall through */
419 default:
420 if (i == 2)
421 continue; /* IRQ2 is never connected */
422 }
423
424 if (ELCR_fallback) {
425 /*
426 * If the ELCR indicates a level-sensitive interrupt, we
427 * copy that information over to the MP table in the
428 * irqflag field (level sensitive, active high polarity).
429 */
430 if (ELCR_trigger(i))
431 intsrc.irqflag = 13;
432 else
433 intsrc.irqflag = 0;
434 }
435
436 intsrc.srcbusirq = i;
437 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
438 MP_intsrc_info(&intsrc);
439 }
440
441 intsrc.irqtype = mp_ExtINT;
442 intsrc.srcbusirq = 0;
443 intsrc.dstirq = 0; /* 8259A to INTIN0 */
444 MP_intsrc_info(&intsrc);
445 }
446
447
448 static void __init construct_ioapic_table(int mpc_default_type)
449 {
450 struct mpc_ioapic ioapic;
451 struct mpc_bus bus;
452
453 bus.type = MP_BUS;
454 bus.busid = 0;
455 switch (mpc_default_type) {
456 default:
457 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
458 mpc_default_type);
459 /* fall through */
460 case 1:
461 case 5:
462 memcpy(bus.bustype, "ISA ", 6);
463 break;
464 case 2:
465 case 6:
466 case 3:
467 memcpy(bus.bustype, "EISA ", 6);
468 break;
469 case 4:
470 case 7:
471 memcpy(bus.bustype, "MCA ", 6);
472 }
473 MP_bus_info(&bus);
474 if (mpc_default_type > 4) {
475 bus.busid = 1;
476 memcpy(bus.bustype, "PCI ", 6);
477 MP_bus_info(&bus);
478 }
479
480 ioapic.type = MP_IOAPIC;
481 ioapic.apicid = 2;
482 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
483 ioapic.flags = MPC_APIC_USABLE;
484 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
485 MP_ioapic_info(&ioapic);
486
487 /*
488 * We set up most of the low 16 IO-APIC pins according to MPS rules.
489 */
490 construct_default_ioirq_mptable(mpc_default_type);
491 }
492 #else
493 static inline void __init construct_ioapic_table(int mpc_default_type) { }
494 #endif
495
496 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
497 {
498 struct mpc_cpu processor;
499 struct mpc_lintsrc lintsrc;
500 int linttypes[2] = { mp_ExtINT, mp_NMI };
501 int i;
502
503 /*
504 * local APIC has default address
505 */
506 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
507
508 /*
509 * 2 CPUs, numbered 0 & 1.
510 */
511 processor.type = MP_PROCESSOR;
512 /* Either an integrated APIC or a discrete 82489DX. */
513 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
514 processor.cpuflag = CPU_ENABLED;
515 processor.cpufeature = (boot_cpu_data.x86 << 8) |
516 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
517 processor.featureflag = boot_cpu_data.x86_capability[0];
518 processor.reserved[0] = 0;
519 processor.reserved[1] = 0;
520 for (i = 0; i < 2; i++) {
521 processor.apicid = i;
522 MP_processor_info(&processor);
523 }
524
525 construct_ioapic_table(mpc_default_type);
526
527 lintsrc.type = MP_LINTSRC;
528 lintsrc.irqflag = 0; /* conforming */
529 lintsrc.srcbusid = 0;
530 lintsrc.srcbusirq = 0;
531 lintsrc.destapic = MP_APIC_ALL;
532 for (i = 0; i < 2; i++) {
533 lintsrc.irqtype = linttypes[i];
534 lintsrc.destapiclint = i;
535 MP_lintsrc_info(&lintsrc);
536 }
537 }
538
539 static struct mpf_intel *mpf_found;
540
541 static unsigned long __init get_mpc_size(unsigned long physptr)
542 {
543 struct mpc_table *mpc;
544 unsigned long size;
545
546 mpc = early_ioremap(physptr, PAGE_SIZE);
547 size = mpc->length;
548 early_iounmap(mpc, PAGE_SIZE);
549 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
550
551 return size;
552 }
553
554 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
555 {
556 struct mpc_table *mpc;
557 unsigned long size;
558
559 size = get_mpc_size(mpf->physptr);
560 mpc = early_ioremap(mpf->physptr, size);
561 /*
562 * Read the physical hardware table. Anything here will
563 * override the defaults.
564 */
565 if (!smp_read_mpc(mpc, early)) {
566 #ifdef CONFIG_X86_LOCAL_APIC
567 smp_found_config = 0;
568 #endif
569 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
570 "... disabling SMP support. (tell your hw vendor)\n");
571 early_iounmap(mpc, size);
572 return -1;
573 }
574 early_iounmap(mpc, size);
575
576 if (early)
577 return -1;
578
579 #ifdef CONFIG_X86_IO_APIC
580 /*
581 * If there are no explicit MP IRQ entries, then we are
582 * broken. We set up most of the low 16 IO-APIC pins to
583 * ISA defaults and hope it will work.
584 */
585 if (!mp_irq_entries) {
586 struct mpc_bus bus;
587
588 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
589 "using default mptable. (tell your hw vendor)\n");
590
591 bus.type = MP_BUS;
592 bus.busid = 0;
593 memcpy(bus.bustype, "ISA ", 6);
594 MP_bus_info(&bus);
595
596 construct_default_ioirq_mptable(0);
597 }
598 #endif
599
600 return 0;
601 }
602
603 /*
604 * Scan the memory blocks for an SMP configuration block.
605 */
606 void __init default_get_smp_config(unsigned int early)
607 {
608 struct mpf_intel *mpf = mpf_found;
609
610 if (!mpf)
611 return;
612
613 if (acpi_lapic && early)
614 return;
615
616 /*
617 * MPS doesn't support hyperthreading, aka only have
618 * thread 0 apic id in MPS table
619 */
620 if (acpi_lapic && acpi_ioapic)
621 return;
622
623 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
624 mpf->specification);
625 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
626 if (mpf->feature2 & (1 << 7)) {
627 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
628 pic_mode = 1;
629 } else {
630 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
631 pic_mode = 0;
632 }
633 #endif
634 /*
635 * Now see if we need to read further.
636 */
637 if (mpf->feature1 != 0) {
638 if (early) {
639 /*
640 * local APIC has default address
641 */
642 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
643 return;
644 }
645
646 printk(KERN_INFO "Default MP configuration #%d\n",
647 mpf->feature1);
648 construct_default_ISA_mptable(mpf->feature1);
649
650 } else if (mpf->physptr) {
651 if (check_physptr(mpf, early))
652 return;
653 } else
654 BUG();
655
656 if (!early)
657 printk(KERN_INFO "Processors: %d\n", num_processors);
658 /*
659 * Only use the first configuration found.
660 */
661 }
662
663 static void __init smp_reserve_bootmem(struct mpf_intel *mpf)
664 {
665 unsigned long size = get_mpc_size(mpf->physptr);
666 #ifdef CONFIG_X86_32
667 /*
668 * We cannot access to MPC table to compute table size yet,
669 * as only few megabytes from the bottom is mapped now.
670 * PC-9800's MPC table places on the very last of physical
671 * memory; so that simply reserving PAGE_SIZE from mpf->physptr
672 * yields BUG() in reserve_bootmem.
673 * also need to make sure physptr is below than max_low_pfn
674 * we don't need reserve the area above max_low_pfn
675 */
676 unsigned long end = max_low_pfn * PAGE_SIZE;
677
678 if (mpf->physptr < end) {
679 if (mpf->physptr + size > end)
680 size = end - mpf->physptr;
681 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
682 }
683 #else
684 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
685 #endif
686 }
687
688 static int __init smp_scan_config(unsigned long base, unsigned long length,
689 unsigned reserve)
690 {
691 unsigned int *bp = phys_to_virt(base);
692 struct mpf_intel *mpf;
693
694 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
695 bp, length);
696 BUILD_BUG_ON(sizeof(*mpf) != 16);
697
698 while (length > 0) {
699 mpf = (struct mpf_intel *)bp;
700 if ((*bp == SMP_MAGIC_IDENT) &&
701 (mpf->length == 1) &&
702 !mpf_checksum((unsigned char *)bp, 16) &&
703 ((mpf->specification == 1)
704 || (mpf->specification == 4))) {
705 #ifdef CONFIG_X86_LOCAL_APIC
706 smp_found_config = 1;
707 #endif
708 mpf_found = mpf;
709
710 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
711 mpf, (u64)virt_to_phys(mpf));
712
713 if (!reserve)
714 return 1;
715 reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf),
716 BOOTMEM_DEFAULT);
717 if (mpf->physptr)
718 smp_reserve_bootmem(mpf);
719
720 return 1;
721 }
722 bp += 4;
723 length -= 16;
724 }
725 return 0;
726 }
727
728 void __init default_find_smp_config(unsigned int reserve)
729 {
730 unsigned int address;
731
732 /*
733 * FIXME: Linux assumes you have 640K of base ram..
734 * this continues the error...
735 *
736 * 1) Scan the bottom 1K for a signature
737 * 2) Scan the top 1K of base RAM
738 * 3) Scan the 64K of bios
739 */
740 if (smp_scan_config(0x0, 0x400, reserve) ||
741 smp_scan_config(639 * 0x400, 0x400, reserve) ||
742 smp_scan_config(0xF0000, 0x10000, reserve))
743 return;
744 /*
745 * If it is an SMP machine we should know now, unless the
746 * configuration is in an EISA/MCA bus machine with an
747 * extended bios data area.
748 *
749 * there is a real-mode segmented pointer pointing to the
750 * 4K EBDA area at 0x40E, calculate and scan it here.
751 *
752 * NOTE! There are Linux loaders that will corrupt the EBDA
753 * area, and as such this kind of SMP config may be less
754 * trustworthy, simply because the SMP table may have been
755 * stomped on during early boot. These loaders are buggy and
756 * should be fixed.
757 *
758 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
759 */
760
761 address = get_bios_ebda();
762 if (address)
763 smp_scan_config(address, 0x400, reserve);
764 }
765
766 #ifdef CONFIG_X86_IO_APIC
767 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
768
769 static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
770 {
771 int i;
772
773 if (m->irqtype != mp_INT)
774 return 0;
775
776 if (m->irqflag != 0x0f)
777 return 0;
778
779 /* not legacy */
780
781 for (i = 0; i < mp_irq_entries; i++) {
782 if (mp_irqs[i].irqtype != mp_INT)
783 continue;
784
785 if (mp_irqs[i].irqflag != 0x0f)
786 continue;
787
788 if (mp_irqs[i].srcbus != m->srcbus)
789 continue;
790 if (mp_irqs[i].srcbusirq != m->srcbusirq)
791 continue;
792 if (irq_used[i]) {
793 /* already claimed */
794 return -2;
795 }
796 irq_used[i] = 1;
797 return i;
798 }
799
800 /* not found */
801 return -1;
802 }
803
804 #define SPARE_SLOT_NUM 20
805
806 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
807
808 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
809 {
810 int i;
811
812 apic_printk(APIC_VERBOSE, "OLD ");
813 print_MP_intsrc_info(m);
814
815 i = get_MP_intsrc_index(m);
816 if (i > 0) {
817 assign_to_mpc_intsrc(&mp_irqs[i], m);
818 apic_printk(APIC_VERBOSE, "NEW ");
819 print_mp_irq_info(&mp_irqs[i]);
820 return;
821 }
822 if (!i) {
823 /* legacy, do nothing */
824 return;
825 }
826 if (*nr_m_spare < SPARE_SLOT_NUM) {
827 /*
828 * not found (-1), or duplicated (-2) are invalid entries,
829 * we need to use the slot later
830 */
831 m_spare[*nr_m_spare] = m;
832 *nr_m_spare += 1;
833 }
834 }
835 #else /* CONFIG_X86_IO_APIC */
836 static
837 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
838 #endif /* CONFIG_X86_IO_APIC */
839
840 static int
841 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
842 {
843 int ret = 0;
844
845 if (!mpc_new_phys || count <= mpc_new_length) {
846 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
847 return -1;
848 }
849
850 return ret;
851 }
852
853 static int __init replace_intsrc_all(struct mpc_table *mpc,
854 unsigned long mpc_new_phys,
855 unsigned long mpc_new_length)
856 {
857 #ifdef CONFIG_X86_IO_APIC
858 int i;
859 #endif
860 int count = sizeof(*mpc);
861 int nr_m_spare = 0;
862 unsigned char *mpt = ((unsigned char *)mpc) + count;
863
864 printk(KERN_INFO "mpc_length %x\n", mpc->length);
865 while (count < mpc->length) {
866 switch (*mpt) {
867 case MP_PROCESSOR:
868 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
869 break;
870 case MP_BUS:
871 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
872 break;
873 case MP_IOAPIC:
874 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
875 break;
876 case MP_INTSRC:
877 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
878 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
879 break;
880 case MP_LINTSRC:
881 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
882 break;
883 default:
884 /* wrong mptable */
885 smp_dump_mptable(mpc, mpt);
886 goto out;
887 }
888 }
889
890 #ifdef CONFIG_X86_IO_APIC
891 for (i = 0; i < mp_irq_entries; i++) {
892 if (irq_used[i])
893 continue;
894
895 if (mp_irqs[i].irqtype != mp_INT)
896 continue;
897
898 if (mp_irqs[i].irqflag != 0x0f)
899 continue;
900
901 if (nr_m_spare > 0) {
902 apic_printk(APIC_VERBOSE, "*NEW* found\n");
903 nr_m_spare--;
904 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
905 m_spare[nr_m_spare] = NULL;
906 } else {
907 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
908 count += sizeof(struct mpc_intsrc);
909 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
910 goto out;
911 assign_to_mpc_intsrc(&mp_irqs[i], m);
912 mpc->length = count;
913 mpt += sizeof(struct mpc_intsrc);
914 }
915 print_mp_irq_info(&mp_irqs[i]);
916 }
917 #endif
918 out:
919 /* update checksum */
920 mpc->checksum = 0;
921 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
922
923 return 0;
924 }
925
926 int enable_update_mptable;
927
928 static int __init update_mptable_setup(char *str)
929 {
930 enable_update_mptable = 1;
931 #ifdef CONFIG_PCI
932 pci_routeirq = 1;
933 #endif
934 return 0;
935 }
936 early_param("update_mptable", update_mptable_setup);
937
938 static unsigned long __initdata mpc_new_phys;
939 static unsigned long mpc_new_length __initdata = 4096;
940
941 /* alloc_mptable or alloc_mptable=4k */
942 static int __initdata alloc_mptable;
943 static int __init parse_alloc_mptable_opt(char *p)
944 {
945 enable_update_mptable = 1;
946 #ifdef CONFIG_PCI
947 pci_routeirq = 1;
948 #endif
949 alloc_mptable = 1;
950 if (!p)
951 return 0;
952 mpc_new_length = memparse(p, &p);
953 return 0;
954 }
955 early_param("alloc_mptable", parse_alloc_mptable_opt);
956
957 void __init early_reserve_e820_mpc_new(void)
958 {
959 if (enable_update_mptable && alloc_mptable) {
960 u64 startt = 0;
961 #ifdef CONFIG_X86_TRAMPOLINE
962 startt = TRAMPOLINE_BASE;
963 #endif
964 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
965 }
966 }
967
968 static int __init update_mp_table(void)
969 {
970 char str[16];
971 char oem[10];
972 struct mpf_intel *mpf;
973 struct mpc_table *mpc, *mpc_new;
974
975 if (!enable_update_mptable)
976 return 0;
977
978 mpf = mpf_found;
979 if (!mpf)
980 return 0;
981
982 /*
983 * Now see if we need to go further.
984 */
985 if (mpf->feature1 != 0)
986 return 0;
987
988 if (!mpf->physptr)
989 return 0;
990
991 mpc = phys_to_virt(mpf->physptr);
992
993 if (!smp_check_mpc(mpc, oem, str))
994 return 0;
995
996 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
997 printk(KERN_INFO "physptr: %x\n", mpf->physptr);
998
999 if (mpc_new_phys && mpc->length > mpc_new_length) {
1000 mpc_new_phys = 0;
1001 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
1002 mpc_new_length);
1003 }
1004
1005 if (!mpc_new_phys) {
1006 unsigned char old, new;
1007 /* check if we can change the postion */
1008 mpc->checksum = 0;
1009 old = mpf_checksum((unsigned char *)mpc, mpc->length);
1010 mpc->checksum = 0xff;
1011 new = mpf_checksum((unsigned char *)mpc, mpc->length);
1012 if (old == new) {
1013 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
1014 return 0;
1015 }
1016 printk(KERN_INFO "use in-positon replacing\n");
1017 } else {
1018 mpf->physptr = mpc_new_phys;
1019 mpc_new = phys_to_virt(mpc_new_phys);
1020 memcpy(mpc_new, mpc, mpc->length);
1021 mpc = mpc_new;
1022 /* check if we can modify that */
1023 if (mpc_new_phys - mpf->physptr) {
1024 struct mpf_intel *mpf_new;
1025 /* steal 16 bytes from [0, 1k) */
1026 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1027 mpf_new = phys_to_virt(0x400 - 16);
1028 memcpy(mpf_new, mpf, 16);
1029 mpf = mpf_new;
1030 mpf->physptr = mpc_new_phys;
1031 }
1032 mpf->checksum = 0;
1033 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
1034 printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
1035 }
1036
1037 /*
1038 * only replace the one with mp_INT and
1039 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1040 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1041 * may need pci=routeirq for all coverage
1042 */
1043 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1044
1045 return 0;
1046 }
1047
1048 late_initcall(update_mp_table);
Linux with added FPC-III support