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x86: Cleanup highmap after brk is concluded
[linux/fpc-iii.git] / drivers / net / e1000e / netdev.c
blob4920a4eae529e7b3698c6571569ce881828bca8d
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include <linux/module.h>
30 #include <linux/types.h>
31 #include <linux/init.h>
32 #include <linux/pci.h>
33 #include <linux/vmalloc.h>
34 #include <linux/pagemap.h>
35 #include <linux/delay.h>
36 #include <linux/netdevice.h>
37 #include <linux/tcp.h>
38 #include <linux/ipv6.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/mii.h>
42 #include <linux/ethtool.h>
43 #include <linux/if_vlan.h>
44 #include <linux/cpu.h>
45 #include <linux/smp.h>
46 #include <linux/pm_qos_params.h>
47 #include <linux/aer.h>
48
49 #include "e1000.h"
50
51 #define DRV_VERSION "1.0.2-k2"
52 char e1000e_driver_name[] = "e1000e";
53 const char e1000e_driver_version[] = DRV_VERSION;
54
55 static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
59 [board_82574] = &e1000_82574_info,
60 [board_82583] = &e1000_82583_info,
61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
64 [board_ich10lan] = &e1000_ich10_info,
65 [board_pchlan] = &e1000_pch_info,
66 };
67
68 #ifdef DEBUG
69 /**
70 * e1000_get_hw_dev_name - return device name string
71 * used by hardware layer to print debugging information
72 **/
73 char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
74 {
75 return hw->adapter->netdev->name;
76 }
77 #endif
78
79 /**
80 * e1000_desc_unused - calculate if we have unused descriptors
81 **/
82 static int e1000_desc_unused(struct e1000_ring *ring)
83 {
84 if (ring->next_to_clean > ring->next_to_use)
85 return ring->next_to_clean - ring->next_to_use - 1;
86
87 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
88 }
89
90 /**
91 * e1000_receive_skb - helper function to handle Rx indications
92 * @adapter: board private structure
93 * @status: descriptor status field as written by hardware
94 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
95 * @skb: pointer to sk_buff to be indicated to stack
96 **/
97 static void e1000_receive_skb(struct e1000_adapter *adapter,
98 struct net_device *netdev,
99 struct sk_buff *skb,
100 u8 status, __le16 vlan)
101 {
102 skb->protocol = eth_type_trans(skb, netdev);
103
104 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
105 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
106 le16_to_cpu(vlan), skb);
107 else
108 napi_gro_receive(&adapter->napi, skb);
109 }
110
111 /**
112 * e1000_rx_checksum - Receive Checksum Offload for 82543
113 * @adapter: board private structure
114 * @status_err: receive descriptor status and error fields
115 * @csum: receive descriptor csum field
116 * @sk_buff: socket buffer with received data
117 **/
118 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
119 u32 csum, struct sk_buff *skb)
120 {
121 u16 status = (u16)status_err;
122 u8 errors = (u8)(status_err >> 24);
123 skb->ip_summed = CHECKSUM_NONE;
124
125 /* Ignore Checksum bit is set */
126 if (status & E1000_RXD_STAT_IXSM)
127 return;
128 /* TCP/UDP checksum error bit is set */
129 if (errors & E1000_RXD_ERR_TCPE) {
130 /* let the stack verify checksum errors */
131 adapter->hw_csum_err++;
132 return;
133 }
134
135 /* TCP/UDP Checksum has not been calculated */
136 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
137 return;
138
139 /* It must be a TCP or UDP packet with a valid checksum */
140 if (status & E1000_RXD_STAT_TCPCS) {
141 /* TCP checksum is good */
142 skb->ip_summed = CHECKSUM_UNNECESSARY;
143 } else {
144 /*
145 * IP fragment with UDP payload
146 * Hardware complements the payload checksum, so we undo it
147 * and then put the value in host order for further stack use.
148 */
149 __sum16 sum = (__force __sum16)htons(csum);
150 skb->csum = csum_unfold(~sum);
151 skb->ip_summed = CHECKSUM_COMPLETE;
152 }
153 adapter->hw_csum_good++;
154 }
155
156 /**
157 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
158 * @adapter: address of board private structure
159 **/
160 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
161 int cleaned_count)
162 {
163 struct net_device *netdev = adapter->netdev;
164 struct pci_dev *pdev = adapter->pdev;
165 struct e1000_ring *rx_ring = adapter->rx_ring;
166 struct e1000_rx_desc *rx_desc;
167 struct e1000_buffer *buffer_info;
168 struct sk_buff *skb;
169 unsigned int i;
170 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
171
172 i = rx_ring->next_to_use;
173 buffer_info = &rx_ring->buffer_info[i];
174
175 while (cleaned_count--) {
176 skb = buffer_info->skb;
177 if (skb) {
178 skb_trim(skb, 0);
179 goto map_skb;
180 }
181
182 skb = netdev_alloc_skb(netdev, bufsz);
183 if (!skb) {
184 /* Better luck next round */
185 adapter->alloc_rx_buff_failed++;
186 break;
187 }
188
189 /*
190 * Make buffer alignment 2 beyond a 16 byte boundary
191 * this will result in a 16 byte aligned IP header after
192 * the 14 byte MAC header is removed
193 */
194 skb_reserve(skb, NET_IP_ALIGN);
195
196 buffer_info->skb = skb;
197 map_skb:
198 buffer_info->dma = pci_map_single(pdev, skb->data,
199 adapter->rx_buffer_len,
200 PCI_DMA_FROMDEVICE);
201 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
202 dev_err(&pdev->dev, "RX DMA map failed\n");
203 adapter->rx_dma_failed++;
204 break;
205 }
206
207 rx_desc = E1000_RX_DESC(*rx_ring, i);
208 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
209
210 i++;
211 if (i == rx_ring->count)
212 i = 0;
213 buffer_info = &rx_ring->buffer_info[i];
214 }
215
216 if (rx_ring->next_to_use != i) {
217 rx_ring->next_to_use = i;
218 if (i-- == 0)
219 i = (rx_ring->count - 1);
220
221 /*
222 * Force memory writes to complete before letting h/w
223 * know there are new descriptors to fetch. (Only
224 * applicable for weak-ordered memory model archs,
225 * such as IA-64).
226 */
227 wmb();
228 writel(i, adapter->hw.hw_addr + rx_ring->tail);
229 }
230 }
231
232 /**
233 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
234 * @adapter: address of board private structure
235 **/
236 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
237 int cleaned_count)
238 {
239 struct net_device *netdev = adapter->netdev;
240 struct pci_dev *pdev = adapter->pdev;
241 union e1000_rx_desc_packet_split *rx_desc;
242 struct e1000_ring *rx_ring = adapter->rx_ring;
243 struct e1000_buffer *buffer_info;
244 struct e1000_ps_page *ps_page;
245 struct sk_buff *skb;
246 unsigned int i, j;
247
248 i = rx_ring->next_to_use;
249 buffer_info = &rx_ring->buffer_info[i];
250
251 while (cleaned_count--) {
252 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
253
254 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
255 ps_page = &buffer_info->ps_pages[j];
256 if (j >= adapter->rx_ps_pages) {
257 /* all unused desc entries get hw null ptr */
258 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
259 continue;
260 }
261 if (!ps_page->page) {
262 ps_page->page = alloc_page(GFP_ATOMIC);
263 if (!ps_page->page) {
264 adapter->alloc_rx_buff_failed++;
265 goto no_buffers;
266 }
267 ps_page->dma = pci_map_page(pdev,
268 ps_page->page,
269 0, PAGE_SIZE,
270 PCI_DMA_FROMDEVICE);
271 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
272 dev_err(&adapter->pdev->dev,
273 "RX DMA page map failed\n");
274 adapter->rx_dma_failed++;
275 goto no_buffers;
276 }
277 }
278 /*
279 * Refresh the desc even if buffer_addrs
280 * didn't change because each write-back
281 * erases this info.
282 */
283 rx_desc->read.buffer_addr[j+1] =
284 cpu_to_le64(ps_page->dma);
285 }
286
287 skb = netdev_alloc_skb(netdev,
288 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
289
290 if (!skb) {
291 adapter->alloc_rx_buff_failed++;
292 break;
293 }
294
295 /*
296 * Make buffer alignment 2 beyond a 16 byte boundary
297 * this will result in a 16 byte aligned IP header after
298 * the 14 byte MAC header is removed
299 */
300 skb_reserve(skb, NET_IP_ALIGN);
301
302 buffer_info->skb = skb;
303 buffer_info->dma = pci_map_single(pdev, skb->data,
304 adapter->rx_ps_bsize0,
305 PCI_DMA_FROMDEVICE);
306 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
307 dev_err(&pdev->dev, "RX DMA map failed\n");
308 adapter->rx_dma_failed++;
309 /* cleanup skb */
310 dev_kfree_skb_any(skb);
311 buffer_info->skb = NULL;
312 break;
313 }
314
315 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
316
317 i++;
318 if (i == rx_ring->count)
319 i = 0;
320 buffer_info = &rx_ring->buffer_info[i];
321 }
322
323 no_buffers:
324 if (rx_ring->next_to_use != i) {
325 rx_ring->next_to_use = i;
326
327 if (!(i--))
328 i = (rx_ring->count - 1);
329
330 /*
331 * Force memory writes to complete before letting h/w
332 * know there are new descriptors to fetch. (Only
333 * applicable for weak-ordered memory model archs,
334 * such as IA-64).
335 */
336 wmb();
337 /*
338 * Hardware increments by 16 bytes, but packet split
339 * descriptors are 32 bytes...so we increment tail
340 * twice as much.
341 */
342 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
343 }
344 }
345
346 /**
347 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
348 * @adapter: address of board private structure
349 * @cleaned_count: number of buffers to allocate this pass
350 **/
351
352 static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
353 int cleaned_count)
354 {
355 struct net_device *netdev = adapter->netdev;
356 struct pci_dev *pdev = adapter->pdev;
357 struct e1000_rx_desc *rx_desc;
358 struct e1000_ring *rx_ring = adapter->rx_ring;
359 struct e1000_buffer *buffer_info;
360 struct sk_buff *skb;
361 unsigned int i;
362 unsigned int bufsz = 256 -
363 16 /* for skb_reserve */ -
364 NET_IP_ALIGN;
365
366 i = rx_ring->next_to_use;
367 buffer_info = &rx_ring->buffer_info[i];
368
369 while (cleaned_count--) {
370 skb = buffer_info->skb;
371 if (skb) {
372 skb_trim(skb, 0);
373 goto check_page;
374 }
375
376 skb = netdev_alloc_skb(netdev, bufsz);
377 if (unlikely(!skb)) {
378 /* Better luck next round */
379 adapter->alloc_rx_buff_failed++;
380 break;
381 }
382
383 /* Make buffer alignment 2 beyond a 16 byte boundary
384 * this will result in a 16 byte aligned IP header after
385 * the 14 byte MAC header is removed
386 */
387 skb_reserve(skb, NET_IP_ALIGN);
388
389 buffer_info->skb = skb;
390 check_page:
391 /* allocate a new page if necessary */
392 if (!buffer_info->page) {
393 buffer_info->page = alloc_page(GFP_ATOMIC);
394 if (unlikely(!buffer_info->page)) {
395 adapter->alloc_rx_buff_failed++;
396 break;
397 }
398 }
399
400 if (!buffer_info->dma)
401 buffer_info->dma = pci_map_page(pdev,
402 buffer_info->page, 0,
403 PAGE_SIZE,
404 PCI_DMA_FROMDEVICE);
405
406 rx_desc = E1000_RX_DESC(*rx_ring, i);
407 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
408
409 if (unlikely(++i == rx_ring->count))
410 i = 0;
411 buffer_info = &rx_ring->buffer_info[i];
412 }
413
414 if (likely(rx_ring->next_to_use != i)) {
415 rx_ring->next_to_use = i;
416 if (unlikely(i-- == 0))
417 i = (rx_ring->count - 1);
418
419 /* Force memory writes to complete before letting h/w
420 * know there are new descriptors to fetch. (Only
421 * applicable for weak-ordered memory model archs,
422 * such as IA-64). */
423 wmb();
424 writel(i, adapter->hw.hw_addr + rx_ring->tail);
425 }
426 }
427
428 /**
429 * e1000_clean_rx_irq - Send received data up the network stack; legacy
430 * @adapter: board private structure
431 *
432 * the return value indicates whether actual cleaning was done, there
433 * is no guarantee that everything was cleaned
434 **/
435 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
436 int *work_done, int work_to_do)
437 {
438 struct net_device *netdev = adapter->netdev;
439 struct pci_dev *pdev = adapter->pdev;
440 struct e1000_ring *rx_ring = adapter->rx_ring;
441 struct e1000_rx_desc *rx_desc, *next_rxd;
442 struct e1000_buffer *buffer_info, *next_buffer;
443 u32 length;
444 unsigned int i;
445 int cleaned_count = 0;
446 bool cleaned = 0;
447 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
448
449 i = rx_ring->next_to_clean;
450 rx_desc = E1000_RX_DESC(*rx_ring, i);
451 buffer_info = &rx_ring->buffer_info[i];
452
453 while (rx_desc->status & E1000_RXD_STAT_DD) {
454 struct sk_buff *skb;
455 u8 status;
456
457 if (*work_done >= work_to_do)
458 break;
459 (*work_done)++;
460
461 status = rx_desc->status;
462 skb = buffer_info->skb;
463 buffer_info->skb = NULL;
464
465 prefetch(skb->data - NET_IP_ALIGN);
466
467 i++;
468 if (i == rx_ring->count)
469 i = 0;
470 next_rxd = E1000_RX_DESC(*rx_ring, i);
471 prefetch(next_rxd);
472
473 next_buffer = &rx_ring->buffer_info[i];
474
475 cleaned = 1;
476 cleaned_count++;
477 pci_unmap_single(pdev,
478 buffer_info->dma,
479 adapter->rx_buffer_len,
480 PCI_DMA_FROMDEVICE);
481 buffer_info->dma = 0;
482
483 length = le16_to_cpu(rx_desc->length);
484
485 /*
486 * !EOP means multiple descriptors were used to store a single
487 * packet, if that's the case we need to toss it. In fact, we
488 * need to toss every packet with the EOP bit clear and the
489 * next frame that _does_ have the EOP bit set, as it is by
490 * definition only a frame fragment
491 */
492 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
493 adapter->flags2 |= FLAG2_IS_DISCARDING;
494
495 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
496 /* All receives must fit into a single buffer */
497 e_dbg("%s: Receive packet consumed multiple buffers\n",
498 netdev->name);
499 /* recycle */
500 buffer_info->skb = skb;
501 if (status & E1000_RXD_STAT_EOP)
502 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
503 goto next_desc;
504 }
505
506 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
507 /* recycle */
508 buffer_info->skb = skb;
509 goto next_desc;
510 }
511
512 /* adjust length to remove Ethernet CRC */
513 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
514 length -= 4;
515
516 total_rx_bytes += length;
517 total_rx_packets++;
518
519 /*
520 * code added for copybreak, this should improve
521 * performance for small packets with large amounts
522 * of reassembly being done in the stack
523 */
524 if (length < copybreak) {
525 struct sk_buff *new_skb =
526 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
527 if (new_skb) {
528 skb_reserve(new_skb, NET_IP_ALIGN);
529 skb_copy_to_linear_data_offset(new_skb,
530 -NET_IP_ALIGN,
531 (skb->data -
532 NET_IP_ALIGN),
533 (length +
534 NET_IP_ALIGN));
535 /* save the skb in buffer_info as good */
536 buffer_info->skb = skb;
537 skb = new_skb;
538 }
539 /* else just continue with the old one */
540 }
541 /* end copybreak code */
542 skb_put(skb, length);
543
544 /* Receive Checksum Offload */
545 e1000_rx_checksum(adapter,
546 (u32)(status) |
547 ((u32)(rx_desc->errors) << 24),
548 le16_to_cpu(rx_desc->csum), skb);
549
550 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
551
552 next_desc:
553 rx_desc->status = 0;
554
555 /* return some buffers to hardware, one at a time is too slow */
556 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
557 adapter->alloc_rx_buf(adapter, cleaned_count);
558 cleaned_count = 0;
559 }
560
561 /* use prefetched values */
562 rx_desc = next_rxd;
563 buffer_info = next_buffer;
564 }
565 rx_ring->next_to_clean = i;
566
567 cleaned_count = e1000_desc_unused(rx_ring);
568 if (cleaned_count)
569 adapter->alloc_rx_buf(adapter, cleaned_count);
570
571 adapter->total_rx_bytes += total_rx_bytes;
572 adapter->total_rx_packets += total_rx_packets;
573 adapter->net_stats.rx_bytes += total_rx_bytes;
574 adapter->net_stats.rx_packets += total_rx_packets;
575 return cleaned;
576 }
577
578 static void e1000_put_txbuf(struct e1000_adapter *adapter,
579 struct e1000_buffer *buffer_info)
580 {
581 buffer_info->dma = 0;
582 if (buffer_info->skb) {
583 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
584 DMA_TO_DEVICE);
585 dev_kfree_skb_any(buffer_info->skb);
586 buffer_info->skb = NULL;
587 }
588 buffer_info->time_stamp = 0;
589 }
590
591 static void e1000_print_tx_hang(struct e1000_adapter *adapter)
592 {
593 struct e1000_ring *tx_ring = adapter->tx_ring;
594 unsigned int i = tx_ring->next_to_clean;
595 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
596 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
597
598 /* detected Tx unit hang */
599 e_err("Detected Tx Unit Hang:\n"
600 " TDH <%x>\n"
601 " TDT <%x>\n"
602 " next_to_use <%x>\n"
603 " next_to_clean <%x>\n"
604 "buffer_info[next_to_clean]:\n"
605 " time_stamp <%lx>\n"
606 " next_to_watch <%x>\n"
607 " jiffies <%lx>\n"
608 " next_to_watch.status <%x>\n",
609 readl(adapter->hw.hw_addr + tx_ring->head),
610 readl(adapter->hw.hw_addr + tx_ring->tail),
611 tx_ring->next_to_use,
612 tx_ring->next_to_clean,
613 tx_ring->buffer_info[eop].time_stamp,
614 eop,
615 jiffies,
616 eop_desc->upper.fields.status);
617 }
618
619 /**
620 * e1000_clean_tx_irq - Reclaim resources after transmit completes
621 * @adapter: board private structure
622 *
623 * the return value indicates whether actual cleaning was done, there
624 * is no guarantee that everything was cleaned
625 **/
626 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
627 {
628 struct net_device *netdev = adapter->netdev;
629 struct e1000_hw *hw = &adapter->hw;
630 struct e1000_ring *tx_ring = adapter->tx_ring;
631 struct e1000_tx_desc *tx_desc, *eop_desc;
632 struct e1000_buffer *buffer_info;
633 unsigned int i, eop;
634 unsigned int count = 0;
635 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
636
637 i = tx_ring->next_to_clean;
638 eop = tx_ring->buffer_info[i].next_to_watch;
639 eop_desc = E1000_TX_DESC(*tx_ring, eop);
640
641 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
642 (count < tx_ring->count)) {
643 bool cleaned = false;
644 for (; !cleaned; count++) {
645 tx_desc = E1000_TX_DESC(*tx_ring, i);
646 buffer_info = &tx_ring->buffer_info[i];
647 cleaned = (i == eop);
648
649 if (cleaned) {
650 struct sk_buff *skb = buffer_info->skb;
651 unsigned int segs, bytecount;
652 segs = skb_shinfo(skb)->gso_segs ?: 1;
653 /* multiply data chunks by size of headers */
654 bytecount = ((segs - 1) * skb_headlen(skb)) +
655 skb->len;
656 total_tx_packets += segs;
657 total_tx_bytes += bytecount;
658 }
659
660 e1000_put_txbuf(adapter, buffer_info);
661 tx_desc->upper.data = 0;
662
663 i++;
664 if (i == tx_ring->count)
665 i = 0;
666 }
667
668 if (i == tx_ring->next_to_use)
669 break;
670 eop = tx_ring->buffer_info[i].next_to_watch;
671 eop_desc = E1000_TX_DESC(*tx_ring, eop);
672 }
673
674 tx_ring->next_to_clean = i;
675
676 #define TX_WAKE_THRESHOLD 32
677 if (count && netif_carrier_ok(netdev) &&
678 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
679 /* Make sure that anybody stopping the queue after this
680 * sees the new next_to_clean.
681 */
682 smp_mb();
683
684 if (netif_queue_stopped(netdev) &&
685 !(test_bit(__E1000_DOWN, &adapter->state))) {
686 netif_wake_queue(netdev);
687 ++adapter->restart_queue;
688 }
689 }
690
691 if (adapter->detect_tx_hung) {
692 /* Detect a transmit hang in hardware, this serializes the
693 * check with the clearing of time_stamp and movement of i */
694 adapter->detect_tx_hung = 0;
695 if (tx_ring->buffer_info[i].time_stamp &&
696 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
697 + (adapter->tx_timeout_factor * HZ))
698 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
699 e1000_print_tx_hang(adapter);
700 netif_stop_queue(netdev);
701 }
702 }
703 adapter->total_tx_bytes += total_tx_bytes;
704 adapter->total_tx_packets += total_tx_packets;
705 adapter->net_stats.tx_bytes += total_tx_bytes;
706 adapter->net_stats.tx_packets += total_tx_packets;
707 return (count < tx_ring->count);
708 }
709
710 /**
711 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
712 * @adapter: board private structure
713 *
714 * the return value indicates whether actual cleaning was done, there
715 * is no guarantee that everything was cleaned
716 **/
717 static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
718 int *work_done, int work_to_do)
719 {
720 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
721 struct net_device *netdev = adapter->netdev;
722 struct pci_dev *pdev = adapter->pdev;
723 struct e1000_ring *rx_ring = adapter->rx_ring;
724 struct e1000_buffer *buffer_info, *next_buffer;
725 struct e1000_ps_page *ps_page;
726 struct sk_buff *skb;
727 unsigned int i, j;
728 u32 length, staterr;
729 int cleaned_count = 0;
730 bool cleaned = 0;
731 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
732
733 i = rx_ring->next_to_clean;
734 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
735 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
736 buffer_info = &rx_ring->buffer_info[i];
737
738 while (staterr & E1000_RXD_STAT_DD) {
739 if (*work_done >= work_to_do)
740 break;
741 (*work_done)++;
742 skb = buffer_info->skb;
743
744 /* in the packet split case this is header only */
745 prefetch(skb->data - NET_IP_ALIGN);
746
747 i++;
748 if (i == rx_ring->count)
749 i = 0;
750 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
751 prefetch(next_rxd);
752
753 next_buffer = &rx_ring->buffer_info[i];
754
755 cleaned = 1;
756 cleaned_count++;
757 pci_unmap_single(pdev, buffer_info->dma,
758 adapter->rx_ps_bsize0,
759 PCI_DMA_FROMDEVICE);
760 buffer_info->dma = 0;
761
762 /* see !EOP comment in other rx routine */
763 if (!(staterr & E1000_RXD_STAT_EOP))
764 adapter->flags2 |= FLAG2_IS_DISCARDING;
765
766 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
767 e_dbg("%s: Packet Split buffers didn't pick up the "
768 "full packet\n", netdev->name);
769 dev_kfree_skb_irq(skb);
770 if (staterr & E1000_RXD_STAT_EOP)
771 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
772 goto next_desc;
773 }
774
775 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
776 dev_kfree_skb_irq(skb);
777 goto next_desc;
778 }
779
780 length = le16_to_cpu(rx_desc->wb.middle.length0);
781
782 if (!length) {
783 e_dbg("%s: Last part of the packet spanning multiple "
784 "descriptors\n", netdev->name);
785 dev_kfree_skb_irq(skb);
786 goto next_desc;
787 }
788
789 /* Good Receive */
790 skb_put(skb, length);
791
792 {
793 /*
794 * this looks ugly, but it seems compiler issues make it
795 * more efficient than reusing j
796 */
797 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
798
799 /*
800 * page alloc/put takes too long and effects small packet
801 * throughput, so unsplit small packets and save the alloc/put
802 * only valid in softirq (napi) context to call kmap_*
803 */
804 if (l1 && (l1 <= copybreak) &&
805 ((length + l1) <= adapter->rx_ps_bsize0)) {
806 u8 *vaddr;
807
808 ps_page = &buffer_info->ps_pages[0];
809
810 /*
811 * there is no documentation about how to call
812 * kmap_atomic, so we can't hold the mapping
813 * very long
814 */
815 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
816 PAGE_SIZE, PCI_DMA_FROMDEVICE);
817 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
818 memcpy(skb_tail_pointer(skb), vaddr, l1);
819 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
820 pci_dma_sync_single_for_device(pdev, ps_page->dma,
821 PAGE_SIZE, PCI_DMA_FROMDEVICE);
822
823 /* remove the CRC */
824 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
825 l1 -= 4;
826
827 skb_put(skb, l1);
828 goto copydone;
829 } /* if */
830 }
831
832 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
833 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
834 if (!length)
835 break;
836
837 ps_page = &buffer_info->ps_pages[j];
838 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
839 PCI_DMA_FROMDEVICE);
840 ps_page->dma = 0;
841 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
842 ps_page->page = NULL;
843 skb->len += length;
844 skb->data_len += length;
845 skb->truesize += length;
846 }
847
848 /* strip the ethernet crc, problem is we're using pages now so
849 * this whole operation can get a little cpu intensive
850 */
851 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
852 pskb_trim(skb, skb->len - 4);
853
854 copydone:
855 total_rx_bytes += skb->len;
856 total_rx_packets++;
857
858 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
859 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
860
861 if (rx_desc->wb.upper.header_status &
862 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
863 adapter->rx_hdr_split++;
864
865 e1000_receive_skb(adapter, netdev, skb,
866 staterr, rx_desc->wb.middle.vlan);
867
868 next_desc:
869 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
870 buffer_info->skb = NULL;
871
872 /* return some buffers to hardware, one at a time is too slow */
873 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
874 adapter->alloc_rx_buf(adapter, cleaned_count);
875 cleaned_count = 0;
876 }
877
878 /* use prefetched values */
879 rx_desc = next_rxd;
880 buffer_info = next_buffer;
881
882 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
883 }
884 rx_ring->next_to_clean = i;
885
886 cleaned_count = e1000_desc_unused(rx_ring);
887 if (cleaned_count)
888 adapter->alloc_rx_buf(adapter, cleaned_count);
889
890 adapter->total_rx_bytes += total_rx_bytes;
891 adapter->total_rx_packets += total_rx_packets;
892 adapter->net_stats.rx_bytes += total_rx_bytes;
893 adapter->net_stats.rx_packets += total_rx_packets;
894 return cleaned;
895 }
896
897 /**
898 * e1000_consume_page - helper function
899 **/
900 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
901 u16 length)
902 {
903 bi->page = NULL;
904 skb->len += length;
905 skb->data_len += length;
906 skb->truesize += length;
907 }
908
909 /**
910 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
911 * @adapter: board private structure
912 *
913 * the return value indicates whether actual cleaning was done, there
914 * is no guarantee that everything was cleaned
915 **/
916
917 static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
918 int *work_done, int work_to_do)
919 {
920 struct net_device *netdev = adapter->netdev;
921 struct pci_dev *pdev = adapter->pdev;
922 struct e1000_ring *rx_ring = adapter->rx_ring;
923 struct e1000_rx_desc *rx_desc, *next_rxd;
924 struct e1000_buffer *buffer_info, *next_buffer;
925 u32 length;
926 unsigned int i;
927 int cleaned_count = 0;
928 bool cleaned = false;
929 unsigned int total_rx_bytes=0, total_rx_packets=0;
930
931 i = rx_ring->next_to_clean;
932 rx_desc = E1000_RX_DESC(*rx_ring, i);
933 buffer_info = &rx_ring->buffer_info[i];
934
935 while (rx_desc->status & E1000_RXD_STAT_DD) {
936 struct sk_buff *skb;
937 u8 status;
938
939 if (*work_done >= work_to_do)
940 break;
941 (*work_done)++;
942
943 status = rx_desc->status;
944 skb = buffer_info->skb;
945 buffer_info->skb = NULL;
946
947 ++i;
948 if (i == rx_ring->count)
949 i = 0;
950 next_rxd = E1000_RX_DESC(*rx_ring, i);
951 prefetch(next_rxd);
952
953 next_buffer = &rx_ring->buffer_info[i];
954
955 cleaned = true;
956 cleaned_count++;
957 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
958 PCI_DMA_FROMDEVICE);
959 buffer_info->dma = 0;
960
961 length = le16_to_cpu(rx_desc->length);
962
963 /* errors is only valid for DD + EOP descriptors */
964 if (unlikely((status & E1000_RXD_STAT_EOP) &&
965 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
966 /* recycle both page and skb */
967 buffer_info->skb = skb;
968 /* an error means any chain goes out the window
969 * too */
970 if (rx_ring->rx_skb_top)
971 dev_kfree_skb(rx_ring->rx_skb_top);
972 rx_ring->rx_skb_top = NULL;
973 goto next_desc;
974 }
975
976 #define rxtop rx_ring->rx_skb_top
977 if (!(status & E1000_RXD_STAT_EOP)) {
978 /* this descriptor is only the beginning (or middle) */
979 if (!rxtop) {
980 /* this is the beginning of a chain */
981 rxtop = skb;
982 skb_fill_page_desc(rxtop, 0, buffer_info->page,
983 0, length);
984 } else {
985 /* this is the middle of a chain */
986 skb_fill_page_desc(rxtop,
987 skb_shinfo(rxtop)->nr_frags,
988 buffer_info->page, 0, length);
989 /* re-use the skb, only consumed the page */
990 buffer_info->skb = skb;
991 }
992 e1000_consume_page(buffer_info, rxtop, length);
993 goto next_desc;
994 } else {
995 if (rxtop) {
996 /* end of the chain */
997 skb_fill_page_desc(rxtop,
998 skb_shinfo(rxtop)->nr_frags,
999 buffer_info->page, 0, length);
1000 /* re-use the current skb, we only consumed the
1001 * page */
1002 buffer_info->skb = skb;
1003 skb = rxtop;
1004 rxtop = NULL;
1005 e1000_consume_page(buffer_info, skb, length);
1006 } else {
1007 /* no chain, got EOP, this buf is the packet
1008 * copybreak to save the put_page/alloc_page */
1009 if (length <= copybreak &&
1010 skb_tailroom(skb) >= length) {
1011 u8 *vaddr;
1012 vaddr = kmap_atomic(buffer_info->page,
1013 KM_SKB_DATA_SOFTIRQ);
1014 memcpy(skb_tail_pointer(skb), vaddr,
1015 length);
1016 kunmap_atomic(vaddr,
1017 KM_SKB_DATA_SOFTIRQ);
1018 /* re-use the page, so don't erase
1019 * buffer_info->page */
1020 skb_put(skb, length);
1021 } else {
1022 skb_fill_page_desc(skb, 0,
1023 buffer_info->page, 0,
1024 length);
1025 e1000_consume_page(buffer_info, skb,
1026 length);
1027 }
1028 }
1029 }
1030
1031 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1032 e1000_rx_checksum(adapter,
1033 (u32)(status) |
1034 ((u32)(rx_desc->errors) << 24),
1035 le16_to_cpu(rx_desc->csum), skb);
1036
1037 /* probably a little skewed due to removing CRC */
1038 total_rx_bytes += skb->len;
1039 total_rx_packets++;
1040
1041 /* eth type trans needs skb->data to point to something */
1042 if (!pskb_may_pull(skb, ETH_HLEN)) {
1043 e_err("pskb_may_pull failed.\n");
1044 dev_kfree_skb(skb);
1045 goto next_desc;
1046 }
1047
1048 e1000_receive_skb(adapter, netdev, skb, status,
1049 rx_desc->special);
1050
1051 next_desc:
1052 rx_desc->status = 0;
1053
1054 /* return some buffers to hardware, one at a time is too slow */
1055 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1056 adapter->alloc_rx_buf(adapter, cleaned_count);
1057 cleaned_count = 0;
1058 }
1059
1060 /* use prefetched values */
1061 rx_desc = next_rxd;
1062 buffer_info = next_buffer;
1063 }
1064 rx_ring->next_to_clean = i;
1065
1066 cleaned_count = e1000_desc_unused(rx_ring);
1067 if (cleaned_count)
1068 adapter->alloc_rx_buf(adapter, cleaned_count);
1069
1070 adapter->total_rx_bytes += total_rx_bytes;
1071 adapter->total_rx_packets += total_rx_packets;
1072 adapter->net_stats.rx_bytes += total_rx_bytes;
1073 adapter->net_stats.rx_packets += total_rx_packets;
1074 return cleaned;
1075 }
1076
1077 /**
1078 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1079 * @adapter: board private structure
1080 **/
1081 static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1082 {
1083 struct e1000_ring *rx_ring = adapter->rx_ring;
1084 struct e1000_buffer *buffer_info;
1085 struct e1000_ps_page *ps_page;
1086 struct pci_dev *pdev = adapter->pdev;
1087 unsigned int i, j;
1088
1089 /* Free all the Rx ring sk_buffs */
1090 for (i = 0; i < rx_ring->count; i++) {
1091 buffer_info = &rx_ring->buffer_info[i];
1092 if (buffer_info->dma) {
1093 if (adapter->clean_rx == e1000_clean_rx_irq)
1094 pci_unmap_single(pdev, buffer_info->dma,
1095 adapter->rx_buffer_len,
1096 PCI_DMA_FROMDEVICE);
1097 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1098 pci_unmap_page(pdev, buffer_info->dma,
1099 PAGE_SIZE,
1100 PCI_DMA_FROMDEVICE);
1101 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1102 pci_unmap_single(pdev, buffer_info->dma,
1103 adapter->rx_ps_bsize0,
1104 PCI_DMA_FROMDEVICE);
1105 buffer_info->dma = 0;
1106 }
1107
1108 if (buffer_info->page) {
1109 put_page(buffer_info->page);
1110 buffer_info->page = NULL;
1111 }
1112
1113 if (buffer_info->skb) {
1114 dev_kfree_skb(buffer_info->skb);
1115 buffer_info->skb = NULL;
1116 }
1117
1118 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1119 ps_page = &buffer_info->ps_pages[j];
1120 if (!ps_page->page)
1121 break;
1122 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1123 PCI_DMA_FROMDEVICE);
1124 ps_page->dma = 0;
1125 put_page(ps_page->page);
1126 ps_page->page = NULL;
1127 }
1128 }
1129
1130 /* there also may be some cached data from a chained receive */
1131 if (rx_ring->rx_skb_top) {
1132 dev_kfree_skb(rx_ring->rx_skb_top);
1133 rx_ring->rx_skb_top = NULL;
1134 }
1135
1136 /* Zero out the descriptor ring */
1137 memset(rx_ring->desc, 0, rx_ring->size);
1138
1139 rx_ring->next_to_clean = 0;
1140 rx_ring->next_to_use = 0;
1141 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1142
1143 writel(0, adapter->hw.hw_addr + rx_ring->head);
1144 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1145 }
1146
1147 static void e1000e_downshift_workaround(struct work_struct *work)
1148 {
1149 struct e1000_adapter *adapter = container_of(work,
1150 struct e1000_adapter, downshift_task);
1151
1152 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1153 }
1154
1155 /**
1156 * e1000_intr_msi - Interrupt Handler
1157 * @irq: interrupt number
1158 * @data: pointer to a network interface device structure
1159 **/
1160 static irqreturn_t e1000_intr_msi(int irq, void *data)
1161 {
1162 struct net_device *netdev = data;
1163 struct e1000_adapter *adapter = netdev_priv(netdev);
1164 struct e1000_hw *hw = &adapter->hw;
1165 u32 icr = er32(ICR);
1166
1167 /*
1168 * read ICR disables interrupts using IAM
1169 */
1170
1171 if (icr & E1000_ICR_LSC) {
1172 hw->mac.get_link_status = 1;
1173 /*
1174 * ICH8 workaround-- Call gig speed drop workaround on cable
1175 * disconnect (LSC) before accessing any PHY registers
1176 */
1177 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1178 (!(er32(STATUS) & E1000_STATUS_LU)))
1179 schedule_work(&adapter->downshift_task);
1180
1181 /*
1182 * 80003ES2LAN workaround-- For packet buffer work-around on
1183 * link down event; disable receives here in the ISR and reset
1184 * adapter in watchdog
1185 */
1186 if (netif_carrier_ok(netdev) &&
1187 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1188 /* disable receives */
1189 u32 rctl = er32(RCTL);
1190 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1191 adapter->flags |= FLAG_RX_RESTART_NOW;
1192 }
1193 /* guard against interrupt when we're going down */
1194 if (!test_bit(__E1000_DOWN, &adapter->state))
1195 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1196 }
1197
1198 if (napi_schedule_prep(&adapter->napi)) {
1199 adapter->total_tx_bytes = 0;
1200 adapter->total_tx_packets = 0;
1201 adapter->total_rx_bytes = 0;
1202 adapter->total_rx_packets = 0;
1203 __napi_schedule(&adapter->napi);
1204 }
1205
1206 return IRQ_HANDLED;
1207 }
1208
1209 /**
1210 * e1000_intr - Interrupt Handler
1211 * @irq: interrupt number
1212 * @data: pointer to a network interface device structure
1213 **/
1214 static irqreturn_t e1000_intr(int irq, void *data)
1215 {
1216 struct net_device *netdev = data;
1217 struct e1000_adapter *adapter = netdev_priv(netdev);
1218 struct e1000_hw *hw = &adapter->hw;
1219 u32 rctl, icr = er32(ICR);
1220
1221 if (!icr)
1222 return IRQ_NONE; /* Not our interrupt */
1223
1224 /*
1225 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1226 * not set, then the adapter didn't send an interrupt
1227 */
1228 if (!(icr & E1000_ICR_INT_ASSERTED))
1229 return IRQ_NONE;
1230
1231 /*
1232 * Interrupt Auto-Mask...upon reading ICR,
1233 * interrupts are masked. No need for the
1234 * IMC write
1235 */
1236
1237 if (icr & E1000_ICR_LSC) {
1238 hw->mac.get_link_status = 1;
1239 /*
1240 * ICH8 workaround-- Call gig speed drop workaround on cable
1241 * disconnect (LSC) before accessing any PHY registers
1242 */
1243 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1244 (!(er32(STATUS) & E1000_STATUS_LU)))
1245 schedule_work(&adapter->downshift_task);
1246
1247 /*
1248 * 80003ES2LAN workaround--
1249 * For packet buffer work-around on link down event;
1250 * disable receives here in the ISR and
1251 * reset adapter in watchdog
1252 */
1253 if (netif_carrier_ok(netdev) &&
1254 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1255 /* disable receives */
1256 rctl = er32(RCTL);
1257 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1258 adapter->flags |= FLAG_RX_RESTART_NOW;
1259 }
1260 /* guard against interrupt when we're going down */
1261 if (!test_bit(__E1000_DOWN, &adapter->state))
1262 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1263 }
1264
1265 if (napi_schedule_prep(&adapter->napi)) {
1266 adapter->total_tx_bytes = 0;
1267 adapter->total_tx_packets = 0;
1268 adapter->total_rx_bytes = 0;
1269 adapter->total_rx_packets = 0;
1270 __napi_schedule(&adapter->napi);
1271 }
1272
1273 return IRQ_HANDLED;
1274 }
1275
1276 static irqreturn_t e1000_msix_other(int irq, void *data)
1277 {
1278 struct net_device *netdev = data;
1279 struct e1000_adapter *adapter = netdev_priv(netdev);
1280 struct e1000_hw *hw = &adapter->hw;
1281 u32 icr = er32(ICR);
1282
1283 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1284 if (!test_bit(__E1000_DOWN, &adapter->state))
1285 ew32(IMS, E1000_IMS_OTHER);
1286 return IRQ_NONE;
1287 }
1288
1289 if (icr & adapter->eiac_mask)
1290 ew32(ICS, (icr & adapter->eiac_mask));
1291
1292 if (icr & E1000_ICR_OTHER) {
1293 if (!(icr & E1000_ICR_LSC))
1294 goto no_link_interrupt;
1295 hw->mac.get_link_status = 1;
1296 /* guard against interrupt when we're going down */
1297 if (!test_bit(__E1000_DOWN, &adapter->state))
1298 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1299 }
1300
1301 no_link_interrupt:
1302 if (!test_bit(__E1000_DOWN, &adapter->state))
1303 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1304
1305 return IRQ_HANDLED;
1306 }
1307
1308
1309 static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1310 {
1311 struct net_device *netdev = data;
1312 struct e1000_adapter *adapter = netdev_priv(netdev);
1313 struct e1000_hw *hw = &adapter->hw;
1314 struct e1000_ring *tx_ring = adapter->tx_ring;
1315
1316
1317 adapter->total_tx_bytes = 0;
1318 adapter->total_tx_packets = 0;
1319
1320 if (!e1000_clean_tx_irq(adapter))
1321 /* Ring was not completely cleaned, so fire another interrupt */
1322 ew32(ICS, tx_ring->ims_val);
1323
1324 return IRQ_HANDLED;
1325 }
1326
1327 static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1328 {
1329 struct net_device *netdev = data;
1330 struct e1000_adapter *adapter = netdev_priv(netdev);
1331
1332 /* Write the ITR value calculated at the end of the
1333 * previous interrupt.
1334 */
1335 if (adapter->rx_ring->set_itr) {
1336 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1337 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1338 adapter->rx_ring->set_itr = 0;
1339 }
1340
1341 if (napi_schedule_prep(&adapter->napi)) {
1342 adapter->total_rx_bytes = 0;
1343 adapter->total_rx_packets = 0;
1344 __napi_schedule(&adapter->napi);
1345 }
1346 return IRQ_HANDLED;
1347 }
1348
1349 /**
1350 * e1000_configure_msix - Configure MSI-X hardware
1351 *
1352 * e1000_configure_msix sets up the hardware to properly
1353 * generate MSI-X interrupts.
1354 **/
1355 static void e1000_configure_msix(struct e1000_adapter *adapter)
1356 {
1357 struct e1000_hw *hw = &adapter->hw;
1358 struct e1000_ring *rx_ring = adapter->rx_ring;
1359 struct e1000_ring *tx_ring = adapter->tx_ring;
1360 int vector = 0;
1361 u32 ctrl_ext, ivar = 0;
1362
1363 adapter->eiac_mask = 0;
1364
1365 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1366 if (hw->mac.type == e1000_82574) {
1367 u32 rfctl = er32(RFCTL);
1368 rfctl |= E1000_RFCTL_ACK_DIS;
1369 ew32(RFCTL, rfctl);
1370 }
1371
1372 #define E1000_IVAR_INT_ALLOC_VALID 0x8
1373 /* Configure Rx vector */
1374 rx_ring->ims_val = E1000_IMS_RXQ0;
1375 adapter->eiac_mask |= rx_ring->ims_val;
1376 if (rx_ring->itr_val)
1377 writel(1000000000 / (rx_ring->itr_val * 256),
1378 hw->hw_addr + rx_ring->itr_register);
1379 else
1380 writel(1, hw->hw_addr + rx_ring->itr_register);
1381 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1382
1383 /* Configure Tx vector */
1384 tx_ring->ims_val = E1000_IMS_TXQ0;
1385 vector++;
1386 if (tx_ring->itr_val)
1387 writel(1000000000 / (tx_ring->itr_val * 256),
1388 hw->hw_addr + tx_ring->itr_register);
1389 else
1390 writel(1, hw->hw_addr + tx_ring->itr_register);
1391 adapter->eiac_mask |= tx_ring->ims_val;
1392 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1393
1394 /* set vector for Other Causes, e.g. link changes */
1395 vector++;
1396 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1397 if (rx_ring->itr_val)
1398 writel(1000000000 / (rx_ring->itr_val * 256),
1399 hw->hw_addr + E1000_EITR_82574(vector));
1400 else
1401 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1402
1403 /* Cause Tx interrupts on every write back */
1404 ivar |= (1 << 31);
1405
1406 ew32(IVAR, ivar);
1407
1408 /* enable MSI-X PBA support */
1409 ctrl_ext = er32(CTRL_EXT);
1410 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1411
1412 /* Auto-Mask Other interrupts upon ICR read */
1413 #define E1000_EIAC_MASK_82574 0x01F00000
1414 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1415 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1416 ew32(CTRL_EXT, ctrl_ext);
1417 e1e_flush();
1418 }
1419
1420 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1421 {
1422 if (adapter->msix_entries) {
1423 pci_disable_msix(adapter->pdev);
1424 kfree(adapter->msix_entries);
1425 adapter->msix_entries = NULL;
1426 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1427 pci_disable_msi(adapter->pdev);
1428 adapter->flags &= ~FLAG_MSI_ENABLED;
1429 }
1430
1431 return;
1432 }
1433
1434 /**
1435 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1436 *
1437 * Attempt to configure interrupts using the best available
1438 * capabilities of the hardware and kernel.
1439 **/
1440 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1441 {
1442 int err;
1443 int numvecs, i;
1444
1445
1446 switch (adapter->int_mode) {
1447 case E1000E_INT_MODE_MSIX:
1448 if (adapter->flags & FLAG_HAS_MSIX) {
1449 numvecs = 3; /* RxQ0, TxQ0 and other */
1450 adapter->msix_entries = kcalloc(numvecs,
1451 sizeof(struct msix_entry),
1452 GFP_KERNEL);
1453 if (adapter->msix_entries) {
1454 for (i = 0; i < numvecs; i++)
1455 adapter->msix_entries[i].entry = i;
1456
1457 err = pci_enable_msix(adapter->pdev,
1458 adapter->msix_entries,
1459 numvecs);
1460 if (err == 0)
1461 return;
1462 }
1463 /* MSI-X failed, so fall through and try MSI */
1464 e_err("Failed to initialize MSI-X interrupts. "
1465 "Falling back to MSI interrupts.\n");
1466 e1000e_reset_interrupt_capability(adapter);
1467 }
1468 adapter->int_mode = E1000E_INT_MODE_MSI;
1469 /* Fall through */
1470 case E1000E_INT_MODE_MSI:
1471 if (!pci_enable_msi(adapter->pdev)) {
1472 adapter->flags |= FLAG_MSI_ENABLED;
1473 } else {
1474 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1475 e_err("Failed to initialize MSI interrupts. Falling "
1476 "back to legacy interrupts.\n");
1477 }
1478 /* Fall through */
1479 case E1000E_INT_MODE_LEGACY:
1480 /* Don't do anything; this is the system default */
1481 break;
1482 }
1483
1484 return;
1485 }
1486
1487 /**
1488 * e1000_request_msix - Initialize MSI-X interrupts
1489 *
1490 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1491 * kernel.
1492 **/
1493 static int e1000_request_msix(struct e1000_adapter *adapter)
1494 {
1495 struct net_device *netdev = adapter->netdev;
1496 int err = 0, vector = 0;
1497
1498 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1499 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
1500 else
1501 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1502 err = request_irq(adapter->msix_entries[vector].vector,
1503 &e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1504 netdev);
1505 if (err)
1506 goto out;
1507 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1508 adapter->rx_ring->itr_val = adapter->itr;
1509 vector++;
1510
1511 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1512 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
1513 else
1514 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1515 err = request_irq(adapter->msix_entries[vector].vector,
1516 &e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1517 netdev);
1518 if (err)
1519 goto out;
1520 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1521 adapter->tx_ring->itr_val = adapter->itr;
1522 vector++;
1523
1524 err = request_irq(adapter->msix_entries[vector].vector,
1525 &e1000_msix_other, 0, netdev->name, netdev);
1526 if (err)
1527 goto out;
1528
1529 e1000_configure_msix(adapter);
1530 return 0;
1531 out:
1532 return err;
1533 }
1534
1535 /**
1536 * e1000_request_irq - initialize interrupts
1537 *
1538 * Attempts to configure interrupts using the best available
1539 * capabilities of the hardware and kernel.
1540 **/
1541 static int e1000_request_irq(struct e1000_adapter *adapter)
1542 {
1543 struct net_device *netdev = adapter->netdev;
1544 int err;
1545
1546 if (adapter->msix_entries) {
1547 err = e1000_request_msix(adapter);
1548 if (!err)
1549 return err;
1550 /* fall back to MSI */
1551 e1000e_reset_interrupt_capability(adapter);
1552 adapter->int_mode = E1000E_INT_MODE_MSI;
1553 e1000e_set_interrupt_capability(adapter);
1554 }
1555 if (adapter->flags & FLAG_MSI_ENABLED) {
1556 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, 0,
1557 netdev->name, netdev);
1558 if (!err)
1559 return err;
1560
1561 /* fall back to legacy interrupt */
1562 e1000e_reset_interrupt_capability(adapter);
1563 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1564 }
1565
1566 err = request_irq(adapter->pdev->irq, &e1000_intr, IRQF_SHARED,
1567 netdev->name, netdev);
1568 if (err)
1569 e_err("Unable to allocate interrupt, Error: %d\n", err);
1570
1571 return err;
1572 }
1573
1574 static void e1000_free_irq(struct e1000_adapter *adapter)
1575 {
1576 struct net_device *netdev = adapter->netdev;
1577
1578 if (adapter->msix_entries) {
1579 int vector = 0;
1580
1581 free_irq(adapter->msix_entries[vector].vector, netdev);
1582 vector++;
1583
1584 free_irq(adapter->msix_entries[vector].vector, netdev);
1585 vector++;
1586
1587 /* Other Causes interrupt vector */
1588 free_irq(adapter->msix_entries[vector].vector, netdev);
1589 return;
1590 }
1591
1592 free_irq(adapter->pdev->irq, netdev);
1593 }
1594
1595 /**
1596 * e1000_irq_disable - Mask off interrupt generation on the NIC
1597 **/
1598 static void e1000_irq_disable(struct e1000_adapter *adapter)
1599 {
1600 struct e1000_hw *hw = &adapter->hw;
1601
1602 ew32(IMC, ~0);
1603 if (adapter->msix_entries)
1604 ew32(EIAC_82574, 0);
1605 e1e_flush();
1606 synchronize_irq(adapter->pdev->irq);
1607 }
1608
1609 /**
1610 * e1000_irq_enable - Enable default interrupt generation settings
1611 **/
1612 static void e1000_irq_enable(struct e1000_adapter *adapter)
1613 {
1614 struct e1000_hw *hw = &adapter->hw;
1615
1616 if (adapter->msix_entries) {
1617 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1618 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1619 } else {
1620 ew32(IMS, IMS_ENABLE_MASK);
1621 }
1622 e1e_flush();
1623 }
1624
1625 /**
1626 * e1000_get_hw_control - get control of the h/w from f/w
1627 * @adapter: address of board private structure
1628 *
1629 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
1630 * For ASF and Pass Through versions of f/w this means that
1631 * the driver is loaded. For AMT version (only with 82573)
1632 * of the f/w this means that the network i/f is open.
1633 **/
1634 static void e1000_get_hw_control(struct e1000_adapter *adapter)
1635 {
1636 struct e1000_hw *hw = &adapter->hw;
1637 u32 ctrl_ext;
1638 u32 swsm;
1639
1640 /* Let firmware know the driver has taken over */
1641 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1642 swsm = er32(SWSM);
1643 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1644 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1645 ctrl_ext = er32(CTRL_EXT);
1646 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1647 }
1648 }
1649
1650 /**
1651 * e1000_release_hw_control - release control of the h/w to f/w
1652 * @adapter: address of board private structure
1653 *
1654 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
1655 * For ASF and Pass Through versions of f/w this means that the
1656 * driver is no longer loaded. For AMT version (only with 82573) i
1657 * of the f/w this means that the network i/f is closed.
1658 *
1659 **/
1660 static void e1000_release_hw_control(struct e1000_adapter *adapter)
1661 {
1662 struct e1000_hw *hw = &adapter->hw;
1663 u32 ctrl_ext;
1664 u32 swsm;
1665
1666 /* Let firmware taken over control of h/w */
1667 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1668 swsm = er32(SWSM);
1669 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1670 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1671 ctrl_ext = er32(CTRL_EXT);
1672 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1673 }
1674 }
1675
1676 /**
1677 * @e1000_alloc_ring - allocate memory for a ring structure
1678 **/
1679 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1680 struct e1000_ring *ring)
1681 {
1682 struct pci_dev *pdev = adapter->pdev;
1683
1684 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1685 GFP_KERNEL);
1686 if (!ring->desc)
1687 return -ENOMEM;
1688
1689 return 0;
1690 }
1691
1692 /**
1693 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1694 * @adapter: board private structure
1695 *
1696 * Return 0 on success, negative on failure
1697 **/
1698 int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1699 {
1700 struct e1000_ring *tx_ring = adapter->tx_ring;
1701 int err = -ENOMEM, size;
1702
1703 size = sizeof(struct e1000_buffer) * tx_ring->count;
1704 tx_ring->buffer_info = vmalloc(size);
1705 if (!tx_ring->buffer_info)
1706 goto err;
1707 memset(tx_ring->buffer_info, 0, size);
1708
1709 /* round up to nearest 4K */
1710 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1711 tx_ring->size = ALIGN(tx_ring->size, 4096);
1712
1713 err = e1000_alloc_ring_dma(adapter, tx_ring);
1714 if (err)
1715 goto err;
1716
1717 tx_ring->next_to_use = 0;
1718 tx_ring->next_to_clean = 0;
1719
1720 return 0;
1721 err:
1722 vfree(tx_ring->buffer_info);
1723 e_err("Unable to allocate memory for the transmit descriptor ring\n");
1724 return err;
1725 }
1726
1727 /**
1728 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1729 * @adapter: board private structure
1730 *
1731 * Returns 0 on success, negative on failure
1732 **/
1733 int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1734 {
1735 struct e1000_ring *rx_ring = adapter->rx_ring;
1736 struct e1000_buffer *buffer_info;
1737 int i, size, desc_len, err = -ENOMEM;
1738
1739 size = sizeof(struct e1000_buffer) * rx_ring->count;
1740 rx_ring->buffer_info = vmalloc(size);
1741 if (!rx_ring->buffer_info)
1742 goto err;
1743 memset(rx_ring->buffer_info, 0, size);
1744
1745 for (i = 0; i < rx_ring->count; i++) {
1746 buffer_info = &rx_ring->buffer_info[i];
1747 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1748 sizeof(struct e1000_ps_page),
1749 GFP_KERNEL);
1750 if (!buffer_info->ps_pages)
1751 goto err_pages;
1752 }
1753
1754 desc_len = sizeof(union e1000_rx_desc_packet_split);
1755
1756 /* Round up to nearest 4K */
1757 rx_ring->size = rx_ring->count * desc_len;
1758 rx_ring->size = ALIGN(rx_ring->size, 4096);
1759
1760 err = e1000_alloc_ring_dma(adapter, rx_ring);
1761 if (err)
1762 goto err_pages;
1763
1764 rx_ring->next_to_clean = 0;
1765 rx_ring->next_to_use = 0;
1766 rx_ring->rx_skb_top = NULL;
1767
1768 return 0;
1769
1770 err_pages:
1771 for (i = 0; i < rx_ring->count; i++) {
1772 buffer_info = &rx_ring->buffer_info[i];
1773 kfree(buffer_info->ps_pages);
1774 }
1775 err:
1776 vfree(rx_ring->buffer_info);
1777 e_err("Unable to allocate memory for the transmit descriptor ring\n");
1778 return err;
1779 }
1780
1781 /**
1782 * e1000_clean_tx_ring - Free Tx Buffers
1783 * @adapter: board private structure
1784 **/
1785 static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1786 {
1787 struct e1000_ring *tx_ring = adapter->tx_ring;
1788 struct e1000_buffer *buffer_info;
1789 unsigned long size;
1790 unsigned int i;
1791
1792 for (i = 0; i < tx_ring->count; i++) {
1793 buffer_info = &tx_ring->buffer_info[i];
1794 e1000_put_txbuf(adapter, buffer_info);
1795 }
1796
1797 size = sizeof(struct e1000_buffer) * tx_ring->count;
1798 memset(tx_ring->buffer_info, 0, size);
1799
1800 memset(tx_ring->desc, 0, tx_ring->size);
1801
1802 tx_ring->next_to_use = 0;
1803 tx_ring->next_to_clean = 0;
1804
1805 writel(0, adapter->hw.hw_addr + tx_ring->head);
1806 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1807 }
1808
1809 /**
1810 * e1000e_free_tx_resources - Free Tx Resources per Queue
1811 * @adapter: board private structure
1812 *
1813 * Free all transmit software resources
1814 **/
1815 void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1816 {
1817 struct pci_dev *pdev = adapter->pdev;
1818 struct e1000_ring *tx_ring = adapter->tx_ring;
1819
1820 e1000_clean_tx_ring(adapter);
1821
1822 vfree(tx_ring->buffer_info);
1823 tx_ring->buffer_info = NULL;
1824
1825 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1826 tx_ring->dma);
1827 tx_ring->desc = NULL;
1828 }
1829
1830 /**
1831 * e1000e_free_rx_resources - Free Rx Resources
1832 * @adapter: board private structure
1833 *
1834 * Free all receive software resources
1835 **/
1836
1837 void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1838 {
1839 struct pci_dev *pdev = adapter->pdev;
1840 struct e1000_ring *rx_ring = adapter->rx_ring;
1841 int i;
1842
1843 e1000_clean_rx_ring(adapter);
1844
1845 for (i = 0; i < rx_ring->count; i++) {
1846 kfree(rx_ring->buffer_info[i].ps_pages);
1847 }
1848
1849 vfree(rx_ring->buffer_info);
1850 rx_ring->buffer_info = NULL;
1851
1852 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1853 rx_ring->dma);
1854 rx_ring->desc = NULL;
1855 }
1856
1857 /**
1858 * e1000_update_itr - update the dynamic ITR value based on statistics
1859 * @adapter: pointer to adapter
1860 * @itr_setting: current adapter->itr
1861 * @packets: the number of packets during this measurement interval
1862 * @bytes: the number of bytes during this measurement interval
1863 *
1864 * Stores a new ITR value based on packets and byte
1865 * counts during the last interrupt. The advantage of per interrupt
1866 * computation is faster updates and more accurate ITR for the current
1867 * traffic pattern. Constants in this function were computed
1868 * based on theoretical maximum wire speed and thresholds were set based
1869 * on testing data as well as attempting to minimize response time
1870 * while increasing bulk throughput. This functionality is controlled
1871 * by the InterruptThrottleRate module parameter.
1872 **/
1873 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1874 u16 itr_setting, int packets,
1875 int bytes)
1876 {
1877 unsigned int retval = itr_setting;
1878
1879 if (packets == 0)
1880 goto update_itr_done;
1881
1882 switch (itr_setting) {
1883 case lowest_latency:
1884 /* handle TSO and jumbo frames */
1885 if (bytes/packets > 8000)
1886 retval = bulk_latency;
1887 else if ((packets < 5) && (bytes > 512)) {
1888 retval = low_latency;
1889 }
1890 break;
1891 case low_latency: /* 50 usec aka 20000 ints/s */
1892 if (bytes > 10000) {
1893 /* this if handles the TSO accounting */
1894 if (bytes/packets > 8000) {
1895 retval = bulk_latency;
1896 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1897 retval = bulk_latency;
1898 } else if ((packets > 35)) {
1899 retval = lowest_latency;
1900 }
1901 } else if (bytes/packets > 2000) {
1902 retval = bulk_latency;
1903 } else if (packets <= 2 && bytes < 512) {
1904 retval = lowest_latency;
1905 }
1906 break;
1907 case bulk_latency: /* 250 usec aka 4000 ints/s */
1908 if (bytes > 25000) {
1909 if (packets > 35) {
1910 retval = low_latency;
1911 }
1912 } else if (bytes < 6000) {
1913 retval = low_latency;
1914 }
1915 break;
1916 }
1917
1918 update_itr_done:
1919 return retval;
1920 }
1921
1922 static void e1000_set_itr(struct e1000_adapter *adapter)
1923 {
1924 struct e1000_hw *hw = &adapter->hw;
1925 u16 current_itr;
1926 u32 new_itr = adapter->itr;
1927
1928 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1929 if (adapter->link_speed != SPEED_1000) {
1930 current_itr = 0;
1931 new_itr = 4000;
1932 goto set_itr_now;
1933 }
1934
1935 adapter->tx_itr = e1000_update_itr(adapter,
1936 adapter->tx_itr,
1937 adapter->total_tx_packets,
1938 adapter->total_tx_bytes);
1939 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1940 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1941 adapter->tx_itr = low_latency;
1942
1943 adapter->rx_itr = e1000_update_itr(adapter,
1944 adapter->rx_itr,
1945 adapter->total_rx_packets,
1946 adapter->total_rx_bytes);
1947 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1948 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1949 adapter->rx_itr = low_latency;
1950
1951 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1952
1953 switch (current_itr) {
1954 /* counts and packets in update_itr are dependent on these numbers */
1955 case lowest_latency:
1956 new_itr = 70000;
1957 break;
1958 case low_latency:
1959 new_itr = 20000; /* aka hwitr = ~200 */
1960 break;
1961 case bulk_latency:
1962 new_itr = 4000;
1963 break;
1964 default:
1965 break;
1966 }
1967
1968 set_itr_now:
1969 if (new_itr != adapter->itr) {
1970 /*
1971 * this attempts to bias the interrupt rate towards Bulk
1972 * by adding intermediate steps when interrupt rate is
1973 * increasing
1974 */
1975 new_itr = new_itr > adapter->itr ?
1976 min(adapter->itr + (new_itr >> 2), new_itr) :
1977 new_itr;
1978 adapter->itr = new_itr;
1979 adapter->rx_ring->itr_val = new_itr;
1980 if (adapter->msix_entries)
1981 adapter->rx_ring->set_itr = 1;
1982 else
1983 ew32(ITR, 1000000000 / (new_itr * 256));
1984 }
1985 }
1986
1987 /**
1988 * e1000_alloc_queues - Allocate memory for all rings
1989 * @adapter: board private structure to initialize
1990 **/
1991 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1992 {
1993 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1994 if (!adapter->tx_ring)
1995 goto err;
1996
1997 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1998 if (!adapter->rx_ring)
1999 goto err;
2000
2001 return 0;
2002 err:
2003 e_err("Unable to allocate memory for queues\n");
2004 kfree(adapter->rx_ring);
2005 kfree(adapter->tx_ring);
2006 return -ENOMEM;
2007 }
2008
2009 /**
2010 * e1000_clean - NAPI Rx polling callback
2011 * @napi: struct associated with this polling callback
2012 * @budget: amount of packets driver is allowed to process this poll
2013 **/
2014 static int e1000_clean(struct napi_struct *napi, int budget)
2015 {
2016 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
2017 struct e1000_hw *hw = &adapter->hw;
2018 struct net_device *poll_dev = adapter->netdev;
2019 int tx_cleaned = 1, work_done = 0;
2020
2021 adapter = netdev_priv(poll_dev);
2022
2023 if (adapter->msix_entries &&
2024 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2025 goto clean_rx;
2026
2027 tx_cleaned = e1000_clean_tx_irq(adapter);
2028
2029 clean_rx:
2030 adapter->clean_rx(adapter, &work_done, budget);
2031
2032 if (!tx_cleaned)
2033 work_done = budget;
2034
2035 /* If budget not fully consumed, exit the polling mode */
2036 if (work_done < budget) {
2037 if (adapter->itr_setting & 3)
2038 e1000_set_itr(adapter);
2039 napi_complete(napi);
2040 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2041 if (adapter->msix_entries)
2042 ew32(IMS, adapter->rx_ring->ims_val);
2043 else
2044 e1000_irq_enable(adapter);
2045 }
2046 }
2047
2048 return work_done;
2049 }
2050
2051 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2052 {
2053 struct e1000_adapter *adapter = netdev_priv(netdev);
2054 struct e1000_hw *hw = &adapter->hw;
2055 u32 vfta, index;
2056
2057 /* don't update vlan cookie if already programmed */
2058 if ((adapter->hw.mng_cookie.status &
2059 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2060 (vid == adapter->mng_vlan_id))
2061 return;
2062 /* add VID to filter table */
2063 index = (vid >> 5) & 0x7F;
2064 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2065 vfta |= (1 << (vid & 0x1F));
2066 e1000e_write_vfta(hw, index, vfta);
2067 }
2068
2069 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2070 {
2071 struct e1000_adapter *adapter = netdev_priv(netdev);
2072 struct e1000_hw *hw = &adapter->hw;
2073 u32 vfta, index;
2074
2075 if (!test_bit(__E1000_DOWN, &adapter->state))
2076 e1000_irq_disable(adapter);
2077 vlan_group_set_device(adapter->vlgrp, vid, NULL);
2078
2079 if (!test_bit(__E1000_DOWN, &adapter->state))
2080 e1000_irq_enable(adapter);
2081
2082 if ((adapter->hw.mng_cookie.status &
2083 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2084 (vid == adapter->mng_vlan_id)) {
2085 /* release control to f/w */
2086 e1000_release_hw_control(adapter);
2087 return;
2088 }
2089
2090 /* remove VID from filter table */
2091 index = (vid >> 5) & 0x7F;
2092 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2093 vfta &= ~(1 << (vid & 0x1F));
2094 e1000e_write_vfta(hw, index, vfta);
2095 }
2096
2097 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2098 {
2099 struct net_device *netdev = adapter->netdev;
2100 u16 vid = adapter->hw.mng_cookie.vlan_id;
2101 u16 old_vid = adapter->mng_vlan_id;
2102
2103 if (!adapter->vlgrp)
2104 return;
2105
2106 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2107 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2108 if (adapter->hw.mng_cookie.status &
2109 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2110 e1000_vlan_rx_add_vid(netdev, vid);
2111 adapter->mng_vlan_id = vid;
2112 }
2113
2114 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2115 (vid != old_vid) &&
2116 !vlan_group_get_device(adapter->vlgrp, old_vid))
2117 e1000_vlan_rx_kill_vid(netdev, old_vid);
2118 } else {
2119 adapter->mng_vlan_id = vid;
2120 }
2121 }
2122
2123
2124 static void e1000_vlan_rx_register(struct net_device *netdev,
2125 struct vlan_group *grp)
2126 {
2127 struct e1000_adapter *adapter = netdev_priv(netdev);
2128 struct e1000_hw *hw = &adapter->hw;
2129 u32 ctrl, rctl;
2130
2131 if (!test_bit(__E1000_DOWN, &adapter->state))
2132 e1000_irq_disable(adapter);
2133 adapter->vlgrp = grp;
2134
2135 if (grp) {
2136 /* enable VLAN tag insert/strip */
2137 ctrl = er32(CTRL);
2138 ctrl |= E1000_CTRL_VME;
2139 ew32(CTRL, ctrl);
2140
2141 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2142 /* enable VLAN receive filtering */
2143 rctl = er32(RCTL);
2144 rctl &= ~E1000_RCTL_CFIEN;
2145 ew32(RCTL, rctl);
2146 e1000_update_mng_vlan(adapter);
2147 }
2148 } else {
2149 /* disable VLAN tag insert/strip */
2150 ctrl = er32(CTRL);
2151 ctrl &= ~E1000_CTRL_VME;
2152 ew32(CTRL, ctrl);
2153
2154 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2155 if (adapter->mng_vlan_id !=
2156 (u16)E1000_MNG_VLAN_NONE) {
2157 e1000_vlan_rx_kill_vid(netdev,
2158 adapter->mng_vlan_id);
2159 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2160 }
2161 }
2162 }
2163
2164 if (!test_bit(__E1000_DOWN, &adapter->state))
2165 e1000_irq_enable(adapter);
2166 }
2167
2168 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2169 {
2170 u16 vid;
2171
2172 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2173
2174 if (!adapter->vlgrp)
2175 return;
2176
2177 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2178 if (!vlan_group_get_device(adapter->vlgrp, vid))
2179 continue;
2180 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2181 }
2182 }
2183
2184 static void e1000_init_manageability(struct e1000_adapter *adapter)
2185 {
2186 struct e1000_hw *hw = &adapter->hw;
2187 u32 manc, manc2h;
2188
2189 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2190 return;
2191
2192 manc = er32(MANC);
2193
2194 /*
2195 * enable receiving management packets to the host. this will probably
2196 * generate destination unreachable messages from the host OS, but
2197 * the packets will be handled on SMBUS
2198 */
2199 manc |= E1000_MANC_EN_MNG2HOST;
2200 manc2h = er32(MANC2H);
2201 #define E1000_MNG2HOST_PORT_623 (1 << 5)
2202 #define E1000_MNG2HOST_PORT_664 (1 << 6)
2203 manc2h |= E1000_MNG2HOST_PORT_623;
2204 manc2h |= E1000_MNG2HOST_PORT_664;
2205 ew32(MANC2H, manc2h);
2206 ew32(MANC, manc);
2207 }
2208
2209 /**
2210 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2211 * @adapter: board private structure
2212 *
2213 * Configure the Tx unit of the MAC after a reset.
2214 **/
2215 static void e1000_configure_tx(struct e1000_adapter *adapter)
2216 {
2217 struct e1000_hw *hw = &adapter->hw;
2218 struct e1000_ring *tx_ring = adapter->tx_ring;
2219 u64 tdba;
2220 u32 tdlen, tctl, tipg, tarc;
2221 u32 ipgr1, ipgr2;
2222
2223 /* Setup the HW Tx Head and Tail descriptor pointers */
2224 tdba = tx_ring->dma;
2225 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2226 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
2227 ew32(TDBAH, (tdba >> 32));
2228 ew32(TDLEN, tdlen);
2229 ew32(TDH, 0);
2230 ew32(TDT, 0);
2231 tx_ring->head = E1000_TDH;
2232 tx_ring->tail = E1000_TDT;
2233
2234 /* Set the default values for the Tx Inter Packet Gap timer */
2235 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2236 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2237 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2238
2239 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2240 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2241
2242 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2243 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2244 ew32(TIPG, tipg);
2245
2246 /* Set the Tx Interrupt Delay register */
2247 ew32(TIDV, adapter->tx_int_delay);
2248 /* Tx irq moderation */
2249 ew32(TADV, adapter->tx_abs_int_delay);
2250
2251 /* Program the Transmit Control Register */
2252 tctl = er32(TCTL);
2253 tctl &= ~E1000_TCTL_CT;
2254 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2255 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2256
2257 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2258 tarc = er32(TARC(0));
2259 /*
2260 * set the speed mode bit, we'll clear it if we're not at
2261 * gigabit link later
2262 */
2263 #define SPEED_MODE_BIT (1 << 21)
2264 tarc |= SPEED_MODE_BIT;
2265 ew32(TARC(0), tarc);
2266 }
2267
2268 /* errata: program both queues to unweighted RR */
2269 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2270 tarc = er32(TARC(0));
2271 tarc |= 1;
2272 ew32(TARC(0), tarc);
2273 tarc = er32(TARC(1));
2274 tarc |= 1;
2275 ew32(TARC(1), tarc);
2276 }
2277
2278 /* Setup Transmit Descriptor Settings for eop descriptor */
2279 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2280
2281 /* only set IDE if we are delaying interrupts using the timers */
2282 if (adapter->tx_int_delay)
2283 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2284
2285 /* enable Report Status bit */
2286 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2287
2288 ew32(TCTL, tctl);
2289
2290 e1000e_config_collision_dist(hw);
2291
2292 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2293 }
2294
2295 /**
2296 * e1000_setup_rctl - configure the receive control registers
2297 * @adapter: Board private structure
2298 **/
2299 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2300 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2301 static void e1000_setup_rctl(struct e1000_adapter *adapter)
2302 {
2303 struct e1000_hw *hw = &adapter->hw;
2304 u32 rctl, rfctl;
2305 u32 psrctl = 0;
2306 u32 pages = 0;
2307
2308 /* Program MC offset vector base */
2309 rctl = er32(RCTL);
2310 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2311 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2312 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2313 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2314
2315 /* Do not Store bad packets */
2316 rctl &= ~E1000_RCTL_SBP;
2317
2318 /* Enable Long Packet receive */
2319 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2320 rctl &= ~E1000_RCTL_LPE;
2321 else
2322 rctl |= E1000_RCTL_LPE;
2323
2324 /* Some systems expect that the CRC is included in SMBUS traffic. The
2325 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2326 * host memory when this is enabled
2327 */
2328 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2329 rctl |= E1000_RCTL_SECRC;
2330
2331 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2332 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2333 u16 phy_data;
2334
2335 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2336 phy_data &= 0xfff8;
2337 phy_data |= (1 << 2);
2338 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2339
2340 e1e_rphy(hw, 22, &phy_data);
2341 phy_data &= 0x0fff;
2342 phy_data |= (1 << 14);
2343 e1e_wphy(hw, 0x10, 0x2823);
2344 e1e_wphy(hw, 0x11, 0x0003);
2345 e1e_wphy(hw, 22, phy_data);
2346 }
2347
2348 /* Setup buffer sizes */
2349 rctl &= ~E1000_RCTL_SZ_4096;
2350 rctl |= E1000_RCTL_BSEX;
2351 switch (adapter->rx_buffer_len) {
2352 case 2048:
2353 default:
2354 rctl |= E1000_RCTL_SZ_2048;
2355 rctl &= ~E1000_RCTL_BSEX;
2356 break;
2357 case 4096:
2358 rctl |= E1000_RCTL_SZ_4096;
2359 break;
2360 case 8192:
2361 rctl |= E1000_RCTL_SZ_8192;
2362 break;
2363 case 16384:
2364 rctl |= E1000_RCTL_SZ_16384;
2365 break;
2366 }
2367
2368 /*
2369 * 82571 and greater support packet-split where the protocol
2370 * header is placed in skb->data and the packet data is
2371 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2372 * In the case of a non-split, skb->data is linearly filled,
2373 * followed by the page buffers. Therefore, skb->data is
2374 * sized to hold the largest protocol header.
2375 *
2376 * allocations using alloc_page take too long for regular MTU
2377 * so only enable packet split for jumbo frames
2378 *
2379 * Using pages when the page size is greater than 16k wastes
2380 * a lot of memory, since we allocate 3 pages at all times
2381 * per packet.
2382 */
2383 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2384 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2385 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
2386 adapter->rx_ps_pages = pages;
2387 else
2388 adapter->rx_ps_pages = 0;
2389
2390 if (adapter->rx_ps_pages) {
2391 /* Configure extra packet-split registers */
2392 rfctl = er32(RFCTL);
2393 rfctl |= E1000_RFCTL_EXTEN;
2394 /*
2395 * disable packet split support for IPv6 extension headers,
2396 * because some malformed IPv6 headers can hang the Rx
2397 */
2398 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2399 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2400
2401 ew32(RFCTL, rfctl);
2402
2403 /* Enable Packet split descriptors */
2404 rctl |= E1000_RCTL_DTYP_PS;
2405
2406 psrctl |= adapter->rx_ps_bsize0 >>
2407 E1000_PSRCTL_BSIZE0_SHIFT;
2408
2409 switch (adapter->rx_ps_pages) {
2410 case 3:
2411 psrctl |= PAGE_SIZE <<
2412 E1000_PSRCTL_BSIZE3_SHIFT;
2413 case 2:
2414 psrctl |= PAGE_SIZE <<
2415 E1000_PSRCTL_BSIZE2_SHIFT;
2416 case 1:
2417 psrctl |= PAGE_SIZE >>
2418 E1000_PSRCTL_BSIZE1_SHIFT;
2419 break;
2420 }
2421
2422 ew32(PSRCTL, psrctl);
2423 }
2424
2425 ew32(RCTL, rctl);
2426 /* just started the receive unit, no need to restart */
2427 adapter->flags &= ~FLAG_RX_RESTART_NOW;
2428 }
2429
2430 /**
2431 * e1000_configure_rx - Configure Receive Unit after Reset
2432 * @adapter: board private structure
2433 *
2434 * Configure the Rx unit of the MAC after a reset.
2435 **/
2436 static void e1000_configure_rx(struct e1000_adapter *adapter)
2437 {
2438 struct e1000_hw *hw = &adapter->hw;
2439 struct e1000_ring *rx_ring = adapter->rx_ring;
2440 u64 rdba;
2441 u32 rdlen, rctl, rxcsum, ctrl_ext;
2442
2443 if (adapter->rx_ps_pages) {
2444 /* this is a 32 byte descriptor */
2445 rdlen = rx_ring->count *
2446 sizeof(union e1000_rx_desc_packet_split);
2447 adapter->clean_rx = e1000_clean_rx_irq_ps;
2448 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2449 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2450 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2451 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2452 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
2453 } else {
2454 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2455 adapter->clean_rx = e1000_clean_rx_irq;
2456 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2457 }
2458
2459 /* disable receives while setting up the descriptors */
2460 rctl = er32(RCTL);
2461 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2462 e1e_flush();
2463 msleep(10);
2464
2465 /* set the Receive Delay Timer Register */
2466 ew32(RDTR, adapter->rx_int_delay);
2467
2468 /* irq moderation */
2469 ew32(RADV, adapter->rx_abs_int_delay);
2470 if (adapter->itr_setting != 0)
2471 ew32(ITR, 1000000000 / (adapter->itr * 256));
2472
2473 ctrl_ext = er32(CTRL_EXT);
2474 /* Reset delay timers after every interrupt */
2475 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2476 /* Auto-Mask interrupts upon ICR access */
2477 ctrl_ext |= E1000_CTRL_EXT_IAME;
2478 ew32(IAM, 0xffffffff);
2479 ew32(CTRL_EXT, ctrl_ext);
2480 e1e_flush();
2481
2482 /*
2483 * Setup the HW Rx Head and Tail Descriptor Pointers and
2484 * the Base and Length of the Rx Descriptor Ring
2485 */
2486 rdba = rx_ring->dma;
2487 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
2488 ew32(RDBAH, (rdba >> 32));
2489 ew32(RDLEN, rdlen);
2490 ew32(RDH, 0);
2491 ew32(RDT, 0);
2492 rx_ring->head = E1000_RDH;
2493 rx_ring->tail = E1000_RDT;
2494
2495 /* Enable Receive Checksum Offload for TCP and UDP */
2496 rxcsum = er32(RXCSUM);
2497 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2498 rxcsum |= E1000_RXCSUM_TUOFL;
2499
2500 /*
2501 * IPv4 payload checksum for UDP fragments must be
2502 * used in conjunction with packet-split.
2503 */
2504 if (adapter->rx_ps_pages)
2505 rxcsum |= E1000_RXCSUM_IPPCSE;
2506 } else {
2507 rxcsum &= ~E1000_RXCSUM_TUOFL;
2508 /* no need to clear IPPCSE as it defaults to 0 */
2509 }
2510 ew32(RXCSUM, rxcsum);
2511
2512 /*
2513 * Enable early receives on supported devices, only takes effect when
2514 * packet size is equal or larger than the specified value (in 8 byte
2515 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2516 */
2517 if ((adapter->flags & FLAG_HAS_ERT) &&
2518 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2519 u32 rxdctl = er32(RXDCTL(0));
2520 ew32(RXDCTL(0), rxdctl | 0x3);
2521 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2522 /*
2523 * With jumbo frames and early-receive enabled, excessive
2524 * C4->C2 latencies result in dropped transactions.
2525 */
2526 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2527 e1000e_driver_name, 55);
2528 } else {
2529 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2530 e1000e_driver_name,
2531 PM_QOS_DEFAULT_VALUE);
2532 }
2533
2534 /* Enable Receives */
2535 ew32(RCTL, rctl);
2536 }
2537
2538 /**
2539 * e1000_update_mc_addr_list - Update Multicast addresses
2540 * @hw: pointer to the HW structure
2541 * @mc_addr_list: array of multicast addresses to program
2542 * @mc_addr_count: number of multicast addresses to program
2543 * @rar_used_count: the first RAR register free to program
2544 * @rar_count: total number of supported Receive Address Registers
2545 *
2546 * Updates the Receive Address Registers and Multicast Table Array.
2547 * The caller must have a packed mc_addr_list of multicast addresses.
2548 * The parameter rar_count will usually be hw->mac.rar_entry_count
2549 * unless there are workarounds that change this. Currently no func pointer
2550 * exists and all implementations are handled in the generic version of this
2551 * function.
2552 **/
2553 static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2554 u32 mc_addr_count, u32 rar_used_count,
2555 u32 rar_count)
2556 {
2557 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
2558 rar_used_count, rar_count);
2559 }
2560
2561 /**
2562 * e1000_set_multi - Multicast and Promiscuous mode set
2563 * @netdev: network interface device structure
2564 *
2565 * The set_multi entry point is called whenever the multicast address
2566 * list or the network interface flags are updated. This routine is
2567 * responsible for configuring the hardware for proper multicast,
2568 * promiscuous mode, and all-multi behavior.
2569 **/
2570 static void e1000_set_multi(struct net_device *netdev)
2571 {
2572 struct e1000_adapter *adapter = netdev_priv(netdev);
2573 struct e1000_hw *hw = &adapter->hw;
2574 struct e1000_mac_info *mac = &hw->mac;
2575 struct dev_mc_list *mc_ptr;
2576 u8 *mta_list;
2577 u32 rctl;
2578 int i;
2579
2580 /* Check for Promiscuous and All Multicast modes */
2581
2582 rctl = er32(RCTL);
2583
2584 if (netdev->flags & IFF_PROMISC) {
2585 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2586 rctl &= ~E1000_RCTL_VFE;
2587 } else {
2588 if (netdev->flags & IFF_ALLMULTI) {
2589 rctl |= E1000_RCTL_MPE;
2590 rctl &= ~E1000_RCTL_UPE;
2591 } else {
2592 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2593 }
2594 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
2595 rctl |= E1000_RCTL_VFE;
2596 }
2597
2598 ew32(RCTL, rctl);
2599
2600 if (netdev->mc_count) {
2601 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2602 if (!mta_list)
2603 return;
2604
2605 /* prepare a packed array of only addresses. */
2606 mc_ptr = netdev->mc_list;
2607
2608 for (i = 0; i < netdev->mc_count; i++) {
2609 if (!mc_ptr)
2610 break;
2611 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2612 ETH_ALEN);
2613 mc_ptr = mc_ptr->next;
2614 }
2615
2616 e1000_update_mc_addr_list(hw, mta_list, i, 1,
2617 mac->rar_entry_count);
2618 kfree(mta_list);
2619 } else {
2620 /*
2621 * if we're called from probe, we might not have
2622 * anything to do here, so clear out the list
2623 */
2624 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
2625 }
2626 }
2627
2628 /**
2629 * e1000_configure - configure the hardware for Rx and Tx
2630 * @adapter: private board structure
2631 **/
2632 static void e1000_configure(struct e1000_adapter *adapter)
2633 {
2634 e1000_set_multi(adapter->netdev);
2635
2636 e1000_restore_vlan(adapter);
2637 e1000_init_manageability(adapter);
2638
2639 e1000_configure_tx(adapter);
2640 e1000_setup_rctl(adapter);
2641 e1000_configure_rx(adapter);
2642 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
2643 }
2644
2645 /**
2646 * e1000e_power_up_phy - restore link in case the phy was powered down
2647 * @adapter: address of board private structure
2648 *
2649 * The phy may be powered down to save power and turn off link when the
2650 * driver is unloaded and wake on lan is not enabled (among others)
2651 * *** this routine MUST be followed by a call to e1000e_reset ***
2652 **/
2653 void e1000e_power_up_phy(struct e1000_adapter *adapter)
2654 {
2655 u16 mii_reg = 0;
2656
2657 /* Just clear the power down bit to wake the phy back up */
2658 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
2659 /*
2660 * According to the manual, the phy will retain its
2661 * settings across a power-down/up cycle
2662 */
2663 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2664 mii_reg &= ~MII_CR_POWER_DOWN;
2665 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2666 }
2667
2668 adapter->hw.mac.ops.setup_link(&adapter->hw);
2669 }
2670
2671 /**
2672 * e1000_power_down_phy - Power down the PHY
2673 *
2674 * Power down the PHY so no link is implied when interface is down
2675 * The PHY cannot be powered down is management or WoL is active
2676 */
2677 static void e1000_power_down_phy(struct e1000_adapter *adapter)
2678 {
2679 struct e1000_hw *hw = &adapter->hw;
2680 u16 mii_reg;
2681
2682 /* WoL is enabled */
2683 if (adapter->wol)
2684 return;
2685
2686 /* non-copper PHY? */
2687 if (adapter->hw.phy.media_type != e1000_media_type_copper)
2688 return;
2689
2690 /* reset is blocked because of a SoL/IDER session */
2691 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
2692 return;
2693
2694 /* manageability (AMT) is enabled */
2695 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2696 return;
2697
2698 /* power down the PHY */
2699 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2700 mii_reg |= MII_CR_POWER_DOWN;
2701 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2702 mdelay(1);
2703 }
2704
2705 /**
2706 * e1000e_reset - bring the hardware into a known good state
2707 *
2708 * This function boots the hardware and enables some settings that
2709 * require a configuration cycle of the hardware - those cannot be
2710 * set/changed during runtime. After reset the device needs to be
2711 * properly configured for Rx, Tx etc.
2712 */
2713 void e1000e_reset(struct e1000_adapter *adapter)
2714 {
2715 struct e1000_mac_info *mac = &adapter->hw.mac;
2716 struct e1000_fc_info *fc = &adapter->hw.fc;
2717 struct e1000_hw *hw = &adapter->hw;
2718 u32 tx_space, min_tx_space, min_rx_space;
2719 u32 pba = adapter->pba;
2720 u16 hwm;
2721
2722 /* reset Packet Buffer Allocation to default */
2723 ew32(PBA, pba);
2724
2725 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
2726 /*
2727 * To maintain wire speed transmits, the Tx FIFO should be
2728 * large enough to accommodate two full transmit packets,
2729 * rounded up to the next 1KB and expressed in KB. Likewise,
2730 * the Rx FIFO should be large enough to accommodate at least
2731 * one full receive packet and is similarly rounded up and
2732 * expressed in KB.
2733 */
2734 pba = er32(PBA);
2735 /* upper 16 bits has Tx packet buffer allocation size in KB */
2736 tx_space = pba >> 16;
2737 /* lower 16 bits has Rx packet buffer allocation size in KB */
2738 pba &= 0xffff;
2739 /*
2740 * the Tx fifo also stores 16 bytes of information about the tx
2741 * but don't include ethernet FCS because hardware appends it
2742 */
2743 min_tx_space = (adapter->max_frame_size +
2744 sizeof(struct e1000_tx_desc) -
2745 ETH_FCS_LEN) * 2;
2746 min_tx_space = ALIGN(min_tx_space, 1024);
2747 min_tx_space >>= 10;
2748 /* software strips receive CRC, so leave room for it */
2749 min_rx_space = adapter->max_frame_size;
2750 min_rx_space = ALIGN(min_rx_space, 1024);
2751 min_rx_space >>= 10;
2752
2753 /*
2754 * If current Tx allocation is less than the min Tx FIFO size,
2755 * and the min Tx FIFO size is less than the current Rx FIFO
2756 * allocation, take space away from current Rx allocation
2757 */
2758 if ((tx_space < min_tx_space) &&
2759 ((min_tx_space - tx_space) < pba)) {
2760 pba -= min_tx_space - tx_space;
2761
2762 /*
2763 * if short on Rx space, Rx wins and must trump tx
2764 * adjustment or use Early Receive if available
2765 */
2766 if ((pba < min_rx_space) &&
2767 (!(adapter->flags & FLAG_HAS_ERT)))
2768 /* ERT enabled in e1000_configure_rx */
2769 pba = min_rx_space;
2770 }
2771
2772 ew32(PBA, pba);
2773 }
2774
2775
2776 /*
2777 * flow control settings
2778 *
2779 * The high water mark must be low enough to fit one full frame
2780 * (or the size used for early receive) above it in the Rx FIFO.
2781 * Set it to the lower of:
2782 * - 90% of the Rx FIFO size, and
2783 * - the full Rx FIFO size minus the early receive size (for parts
2784 * with ERT support assuming ERT set to E1000_ERT_2048), or
2785 * - the full Rx FIFO size minus one full frame
2786 */
2787 if (hw->mac.type == e1000_pchlan) {
2788 /*
2789 * Workaround PCH LOM adapter hangs with certain network
2790 * loads. If hangs persist, try disabling Tx flow control.
2791 */
2792 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2793 fc->high_water = 0x3500;
2794 fc->low_water = 0x1500;
2795 } else {
2796 fc->high_water = 0x5000;
2797 fc->low_water = 0x3000;
2798 }
2799 } else {
2800 if ((adapter->flags & FLAG_HAS_ERT) &&
2801 (adapter->netdev->mtu > ETH_DATA_LEN))
2802 hwm = min(((pba << 10) * 9 / 10),
2803 ((pba << 10) - (E1000_ERT_2048 << 3)));
2804 else
2805 hwm = min(((pba << 10) * 9 / 10),
2806 ((pba << 10) - adapter->max_frame_size));
2807
2808 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2809 fc->low_water = fc->high_water - 8;
2810 }
2811
2812 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
2813 fc->pause_time = 0xFFFF;
2814 else
2815 fc->pause_time = E1000_FC_PAUSE_TIME;
2816 fc->send_xon = 1;
2817 fc->current_mode = fc->requested_mode;
2818
2819 /* Allow time for pending master requests to run */
2820 mac->ops.reset_hw(hw);
2821
2822 /*
2823 * For parts with AMT enabled, let the firmware know
2824 * that the network interface is in control
2825 */
2826 if (adapter->flags & FLAG_HAS_AMT)
2827 e1000_get_hw_control(adapter);
2828
2829 ew32(WUC, 0);
2830 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2831 e1e_wphy(&adapter->hw, BM_WUC, 0);
2832
2833 if (mac->ops.init_hw(hw))
2834 e_err("Hardware Error\n");
2835
2836 /* additional part of the flow-control workaround above */
2837 if (hw->mac.type == e1000_pchlan)
2838 ew32(FCRTV_PCH, 0x1000);
2839
2840 e1000_update_mng_vlan(adapter);
2841
2842 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2843 ew32(VET, ETH_P_8021Q);
2844
2845 e1000e_reset_adaptive(hw);
2846 e1000_get_phy_info(hw);
2847
2848 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2849 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
2850 u16 phy_data = 0;
2851 /*
2852 * speed up time to link by disabling smart power down, ignore
2853 * the return value of this function because there is nothing
2854 * different we would do if it failed
2855 */
2856 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2857 phy_data &= ~IGP02E1000_PM_SPD;
2858 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2859 }
2860 }
2861
2862 int e1000e_up(struct e1000_adapter *adapter)
2863 {
2864 struct e1000_hw *hw = &adapter->hw;
2865
2866 /* hardware has been reset, we need to reload some things */
2867 e1000_configure(adapter);
2868
2869 clear_bit(__E1000_DOWN, &adapter->state);
2870
2871 napi_enable(&adapter->napi);
2872 if (adapter->msix_entries)
2873 e1000_configure_msix(adapter);
2874 e1000_irq_enable(adapter);
2875
2876 netif_wake_queue(adapter->netdev);
2877
2878 /* fire a link change interrupt to start the watchdog */
2879 ew32(ICS, E1000_ICS_LSC);
2880 return 0;
2881 }
2882
2883 void e1000e_down(struct e1000_adapter *adapter)
2884 {
2885 struct net_device *netdev = adapter->netdev;
2886 struct e1000_hw *hw = &adapter->hw;
2887 u32 tctl, rctl;
2888
2889 /*
2890 * signal that we're down so the interrupt handler does not
2891 * reschedule our watchdog timer
2892 */
2893 set_bit(__E1000_DOWN, &adapter->state);
2894
2895 /* disable receives in the hardware */
2896 rctl = er32(RCTL);
2897 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2898 /* flush and sleep below */
2899
2900 netif_stop_queue(netdev);
2901
2902 /* disable transmits in the hardware */
2903 tctl = er32(TCTL);
2904 tctl &= ~E1000_TCTL_EN;
2905 ew32(TCTL, tctl);
2906 /* flush both disables and wait for them to finish */
2907 e1e_flush();
2908 msleep(10);
2909
2910 napi_disable(&adapter->napi);
2911 e1000_irq_disable(adapter);
2912
2913 del_timer_sync(&adapter->watchdog_timer);
2914 del_timer_sync(&adapter->phy_info_timer);
2915
2916 netdev->tx_queue_len = adapter->tx_queue_len;
2917 netif_carrier_off(netdev);
2918 adapter->link_speed = 0;
2919 adapter->link_duplex = 0;
2920
2921 if (!pci_channel_offline(adapter->pdev))
2922 e1000e_reset(adapter);
2923 e1000_clean_tx_ring(adapter);
2924 e1000_clean_rx_ring(adapter);
2925
2926 /*
2927 * TODO: for power management, we could drop the link and
2928 * pci_disable_device here.
2929 */
2930 }
2931
2932 void e1000e_reinit_locked(struct e1000_adapter *adapter)
2933 {
2934 might_sleep();
2935 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2936 msleep(1);
2937 e1000e_down(adapter);
2938 e1000e_up(adapter);
2939 clear_bit(__E1000_RESETTING, &adapter->state);
2940 }
2941
2942 /**
2943 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2944 * @adapter: board private structure to initialize
2945 *
2946 * e1000_sw_init initializes the Adapter private data structure.
2947 * Fields are initialized based on PCI device information and
2948 * OS network device settings (MTU size).
2949 **/
2950 static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2951 {
2952 struct net_device *netdev = adapter->netdev;
2953
2954 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2955 adapter->rx_ps_bsize0 = 128;
2956 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2957 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
2958
2959 e1000e_set_interrupt_capability(adapter);
2960
2961 if (e1000_alloc_queues(adapter))
2962 return -ENOMEM;
2963
2964 /* Explicitly disable IRQ since the NIC can be in any state. */
2965 e1000_irq_disable(adapter);
2966
2967 set_bit(__E1000_DOWN, &adapter->state);
2968 return 0;
2969 }
2970
2971 /**
2972 * e1000_intr_msi_test - Interrupt Handler
2973 * @irq: interrupt number
2974 * @data: pointer to a network interface device structure
2975 **/
2976 static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2977 {
2978 struct net_device *netdev = data;
2979 struct e1000_adapter *adapter = netdev_priv(netdev);
2980 struct e1000_hw *hw = &adapter->hw;
2981 u32 icr = er32(ICR);
2982
2983 e_dbg("%s: icr is %08X\n", netdev->name, icr);
2984 if (icr & E1000_ICR_RXSEQ) {
2985 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2986 wmb();
2987 }
2988
2989 return IRQ_HANDLED;
2990 }
2991
2992 /**
2993 * e1000_test_msi_interrupt - Returns 0 for successful test
2994 * @adapter: board private struct
2995 *
2996 * code flow taken from tg3.c
2997 **/
2998 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2999 {
3000 struct net_device *netdev = adapter->netdev;
3001 struct e1000_hw *hw = &adapter->hw;
3002 int err;
3003
3004 /* poll_enable hasn't been called yet, so don't need disable */
3005 /* clear any pending events */
3006 er32(ICR);
3007
3008 /* free the real vector and request a test handler */
3009 e1000_free_irq(adapter);
3010 e1000e_reset_interrupt_capability(adapter);
3011
3012 /* Assume that the test fails, if it succeeds then the test
3013 * MSI irq handler will unset this flag */
3014 adapter->flags |= FLAG_MSI_TEST_FAILED;
3015
3016 err = pci_enable_msi(adapter->pdev);
3017 if (err)
3018 goto msi_test_failed;
3019
3020 err = request_irq(adapter->pdev->irq, &e1000_intr_msi_test, 0,
3021 netdev->name, netdev);
3022 if (err) {
3023 pci_disable_msi(adapter->pdev);
3024 goto msi_test_failed;
3025 }
3026
3027 wmb();
3028
3029 e1000_irq_enable(adapter);
3030
3031 /* fire an unusual interrupt on the test handler */
3032 ew32(ICS, E1000_ICS_RXSEQ);
3033 e1e_flush();
3034 msleep(50);
3035
3036 e1000_irq_disable(adapter);
3037
3038 rmb();
3039
3040 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
3041 adapter->int_mode = E1000E_INT_MODE_LEGACY;
3042 err = -EIO;
3043 e_info("MSI interrupt test failed!\n");
3044 }
3045
3046 free_irq(adapter->pdev->irq, netdev);
3047 pci_disable_msi(adapter->pdev);
3048
3049 if (err == -EIO)
3050 goto msi_test_failed;
3051
3052 /* okay so the test worked, restore settings */
3053 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
3054 msi_test_failed:
3055 e1000e_set_interrupt_capability(adapter);
3056 e1000_request_irq(adapter);
3057 return err;
3058 }
3059
3060 /**
3061 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3062 * @adapter: board private struct
3063 *
3064 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3065 **/
3066 static int e1000_test_msi(struct e1000_adapter *adapter)
3067 {
3068 int err;
3069 u16 pci_cmd;
3070
3071 if (!(adapter->flags & FLAG_MSI_ENABLED))
3072 return 0;
3073
3074 /* disable SERR in case the MSI write causes a master abort */
3075 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3076 if (pci_cmd & PCI_COMMAND_SERR)
3077 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3078 pci_cmd & ~PCI_COMMAND_SERR);
3079
3080 err = e1000_test_msi_interrupt(adapter);
3081
3082 /* re-enable SERR */
3083 if (pci_cmd & PCI_COMMAND_SERR) {
3084 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3085 pci_cmd |= PCI_COMMAND_SERR;
3086 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3087 }
3088
3089 /* success ! */
3090 if (!err)
3091 return 0;
3092
3093 /* EIO means MSI test failed */
3094 if (err != -EIO)
3095 return err;
3096
3097 /* back to INTx mode */
3098 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3099
3100 e1000_free_irq(adapter);
3101
3102 err = e1000_request_irq(adapter);
3103
3104 return err;
3105 }
3106
3107 /**
3108 * e1000_open - Called when a network interface is made active
3109 * @netdev: network interface device structure
3110 *
3111 * Returns 0 on success, negative value on failure
3112 *
3113 * The open entry point is called when a network interface is made
3114 * active by the system (IFF_UP). At this point all resources needed
3115 * for transmit and receive operations are allocated, the interrupt
3116 * handler is registered with the OS, the watchdog timer is started,
3117 * and the stack is notified that the interface is ready.
3118 **/
3119 static int e1000_open(struct net_device *netdev)
3120 {
3121 struct e1000_adapter *adapter = netdev_priv(netdev);
3122 struct e1000_hw *hw = &adapter->hw;
3123 int err;
3124
3125 /* disallow open during test */
3126 if (test_bit(__E1000_TESTING, &adapter->state))
3127 return -EBUSY;
3128
3129 netif_carrier_off(netdev);
3130
3131 /* allocate transmit descriptors */
3132 err = e1000e_setup_tx_resources(adapter);
3133 if (err)
3134 goto err_setup_tx;
3135
3136 /* allocate receive descriptors */
3137 err = e1000e_setup_rx_resources(adapter);
3138 if (err)
3139 goto err_setup_rx;
3140
3141 e1000e_power_up_phy(adapter);
3142
3143 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3144 if ((adapter->hw.mng_cookie.status &
3145 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3146 e1000_update_mng_vlan(adapter);
3147
3148 /*
3149 * If AMT is enabled, let the firmware know that the network
3150 * interface is now open
3151 */
3152 if (adapter->flags & FLAG_HAS_AMT)
3153 e1000_get_hw_control(adapter);
3154
3155 /*
3156 * before we allocate an interrupt, we must be ready to handle it.
3157 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3158 * as soon as we call pci_request_irq, so we have to setup our
3159 * clean_rx handler before we do so.
3160 */
3161 e1000_configure(adapter);
3162
3163 err = e1000_request_irq(adapter);
3164 if (err)
3165 goto err_req_irq;
3166
3167 /*
3168 * Work around PCIe errata with MSI interrupts causing some chipsets to
3169 * ignore e1000e MSI messages, which means we need to test our MSI
3170 * interrupt now
3171 */
3172 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
3173 err = e1000_test_msi(adapter);
3174 if (err) {
3175 e_err("Interrupt allocation failed\n");
3176 goto err_req_irq;
3177 }
3178 }
3179
3180 /* From here on the code is the same as e1000e_up() */
3181 clear_bit(__E1000_DOWN, &adapter->state);
3182
3183 napi_enable(&adapter->napi);
3184
3185 e1000_irq_enable(adapter);
3186
3187 netif_start_queue(netdev);
3188
3189 /* fire a link status change interrupt to start the watchdog */
3190 ew32(ICS, E1000_ICS_LSC);
3191
3192 return 0;
3193
3194 err_req_irq:
3195 e1000_release_hw_control(adapter);
3196 e1000_power_down_phy(adapter);
3197 e1000e_free_rx_resources(adapter);
3198 err_setup_rx:
3199 e1000e_free_tx_resources(adapter);
3200 err_setup_tx:
3201 e1000e_reset(adapter);
3202
3203 return err;
3204 }
3205
3206 /**
3207 * e1000_close - Disables a network interface
3208 * @netdev: network interface device structure
3209 *
3210 * Returns 0, this is not allowed to fail
3211 *
3212 * The close entry point is called when an interface is de-activated
3213 * by the OS. The hardware is still under the drivers control, but
3214 * needs to be disabled. A global MAC reset is issued to stop the
3215 * hardware, and all transmit and receive resources are freed.
3216 **/
3217 static int e1000_close(struct net_device *netdev)
3218 {
3219 struct e1000_adapter *adapter = netdev_priv(netdev);
3220
3221 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3222 e1000e_down(adapter);
3223 e1000_power_down_phy(adapter);
3224 e1000_free_irq(adapter);
3225
3226 e1000e_free_tx_resources(adapter);
3227 e1000e_free_rx_resources(adapter);
3228
3229 /*
3230 * kill manageability vlan ID if supported, but not if a vlan with
3231 * the same ID is registered on the host OS (let 8021q kill it)
3232 */
3233 if ((adapter->hw.mng_cookie.status &
3234 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3235 !(adapter->vlgrp &&
3236 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3237 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3238
3239 /*
3240 * If AMT is enabled, let the firmware know that the network
3241 * interface is now closed
3242 */
3243 if (adapter->flags & FLAG_HAS_AMT)
3244 e1000_release_hw_control(adapter);
3245
3246 return 0;
3247 }
3248 /**
3249 * e1000_set_mac - Change the Ethernet Address of the NIC
3250 * @netdev: network interface device structure
3251 * @p: pointer to an address structure
3252 *
3253 * Returns 0 on success, negative on failure
3254 **/
3255 static int e1000_set_mac(struct net_device *netdev, void *p)
3256 {
3257 struct e1000_adapter *adapter = netdev_priv(netdev);
3258 struct sockaddr *addr = p;
3259
3260 if (!is_valid_ether_addr(addr->sa_data))
3261 return -EADDRNOTAVAIL;
3262
3263 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3264 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3265
3266 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3267
3268 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3269 /* activate the work around */
3270 e1000e_set_laa_state_82571(&adapter->hw, 1);
3271
3272 /*
3273 * Hold a copy of the LAA in RAR[14] This is done so that
3274 * between the time RAR[0] gets clobbered and the time it
3275 * gets fixed (in e1000_watchdog), the actual LAA is in one
3276 * of the RARs and no incoming packets directed to this port
3277 * are dropped. Eventually the LAA will be in RAR[0] and
3278 * RAR[14]
3279 */
3280 e1000e_rar_set(&adapter->hw,
3281 adapter->hw.mac.addr,
3282 adapter->hw.mac.rar_entry_count - 1);
3283 }
3284
3285 return 0;
3286 }
3287
3288 /**
3289 * e1000e_update_phy_task - work thread to update phy
3290 * @work: pointer to our work struct
3291 *
3292 * this worker thread exists because we must acquire a
3293 * semaphore to read the phy, which we could msleep while
3294 * waiting for it, and we can't msleep in a timer.
3295 **/
3296 static void e1000e_update_phy_task(struct work_struct *work)
3297 {
3298 struct e1000_adapter *adapter = container_of(work,
3299 struct e1000_adapter, update_phy_task);
3300 e1000_get_phy_info(&adapter->hw);
3301 }
3302
3303 /*
3304 * Need to wait a few seconds after link up to get diagnostic information from
3305 * the phy
3306 */
3307 static void e1000_update_phy_info(unsigned long data)
3308 {
3309 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3310 schedule_work(&adapter->update_phy_task);
3311 }
3312
3313 /**
3314 * e1000e_update_stats - Update the board statistics counters
3315 * @adapter: board private structure
3316 **/
3317 void e1000e_update_stats(struct e1000_adapter *adapter)
3318 {
3319 struct e1000_hw *hw = &adapter->hw;
3320 struct pci_dev *pdev = adapter->pdev;
3321 u16 phy_data;
3322
3323 /*
3324 * Prevent stats update while adapter is being reset, or if the pci
3325 * connection is down.
3326 */
3327 if (adapter->link_speed == 0)
3328 return;
3329 if (pci_channel_offline(pdev))
3330 return;
3331
3332 adapter->stats.crcerrs += er32(CRCERRS);
3333 adapter->stats.gprc += er32(GPRC);
3334 adapter->stats.gorc += er32(GORCL);
3335 er32(GORCH); /* Clear gorc */
3336 adapter->stats.bprc += er32(BPRC);
3337 adapter->stats.mprc += er32(MPRC);
3338 adapter->stats.roc += er32(ROC);
3339
3340 adapter->stats.mpc += er32(MPC);
3341 if ((hw->phy.type == e1000_phy_82578) ||
3342 (hw->phy.type == e1000_phy_82577)) {
3343 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
3344 e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
3345 adapter->stats.scc += phy_data;
3346
3347 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
3348 e1e_rphy(hw, HV_ECOL_LOWER, &phy_data);
3349 adapter->stats.ecol += phy_data;
3350
3351 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
3352 e1e_rphy(hw, HV_MCC_LOWER, &phy_data);
3353 adapter->stats.mcc += phy_data;
3354
3355 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
3356 e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data);
3357 adapter->stats.latecol += phy_data;
3358
3359 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
3360 e1e_rphy(hw, HV_DC_LOWER, &phy_data);
3361 adapter->stats.dc += phy_data;
3362 } else {
3363 adapter->stats.scc += er32(SCC);
3364 adapter->stats.ecol += er32(ECOL);
3365 adapter->stats.mcc += er32(MCC);
3366 adapter->stats.latecol += er32(LATECOL);
3367 adapter->stats.dc += er32(DC);
3368 }
3369 adapter->stats.xonrxc += er32(XONRXC);
3370 adapter->stats.xontxc += er32(XONTXC);
3371 adapter->stats.xoffrxc += er32(XOFFRXC);
3372 adapter->stats.xofftxc += er32(XOFFTXC);
3373 adapter->stats.gptc += er32(GPTC);
3374 adapter->stats.gotc += er32(GOTCL);
3375 er32(GOTCH); /* Clear gotc */
3376 adapter->stats.rnbc += er32(RNBC);
3377 adapter->stats.ruc += er32(RUC);
3378
3379 adapter->stats.mptc += er32(MPTC);
3380 adapter->stats.bptc += er32(BPTC);
3381
3382 /* used for adaptive IFS */
3383
3384 hw->mac.tx_packet_delta = er32(TPT);
3385 adapter->stats.tpt += hw->mac.tx_packet_delta;
3386 if ((hw->phy.type == e1000_phy_82578) ||
3387 (hw->phy.type == e1000_phy_82577)) {
3388 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
3389 e1e_rphy(hw, HV_COLC_LOWER, &phy_data);
3390 hw->mac.collision_delta = phy_data;
3391 } else {
3392 hw->mac.collision_delta = er32(COLC);
3393 }
3394 adapter->stats.colc += hw->mac.collision_delta;
3395
3396 adapter->stats.algnerrc += er32(ALGNERRC);
3397 adapter->stats.rxerrc += er32(RXERRC);
3398 if ((hw->phy.type == e1000_phy_82578) ||
3399 (hw->phy.type == e1000_phy_82577)) {
3400 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
3401 e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data);
3402 adapter->stats.tncrs += phy_data;
3403 } else {
3404 if ((hw->mac.type != e1000_82574) &&
3405 (hw->mac.type != e1000_82583))
3406 adapter->stats.tncrs += er32(TNCRS);
3407 }
3408 adapter->stats.cexterr += er32(CEXTERR);
3409 adapter->stats.tsctc += er32(TSCTC);
3410 adapter->stats.tsctfc += er32(TSCTFC);
3411
3412 /* Fill out the OS statistics structure */
3413 adapter->net_stats.multicast = adapter->stats.mprc;
3414 adapter->net_stats.collisions = adapter->stats.colc;
3415
3416 /* Rx Errors */
3417
3418 /*
3419 * RLEC on some newer hardware can be incorrect so build
3420 * our own version based on RUC and ROC
3421 */
3422 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3423 adapter->stats.crcerrs + adapter->stats.algnerrc +
3424 adapter->stats.ruc + adapter->stats.roc +
3425 adapter->stats.cexterr;
3426 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3427 adapter->stats.roc;
3428 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3429 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3430 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3431
3432 /* Tx Errors */
3433 adapter->net_stats.tx_errors = adapter->stats.ecol +
3434 adapter->stats.latecol;
3435 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3436 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3437 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3438
3439 /* Tx Dropped needs to be maintained elsewhere */
3440
3441 /* Management Stats */
3442 adapter->stats.mgptc += er32(MGTPTC);
3443 adapter->stats.mgprc += er32(MGTPRC);
3444 adapter->stats.mgpdc += er32(MGTPDC);
3445 }
3446
3447 /**
3448 * e1000_phy_read_status - Update the PHY register status snapshot
3449 * @adapter: board private structure
3450 **/
3451 static void e1000_phy_read_status(struct e1000_adapter *adapter)
3452 {
3453 struct e1000_hw *hw = &adapter->hw;
3454 struct e1000_phy_regs *phy = &adapter->phy_regs;
3455 int ret_val;
3456
3457 if ((er32(STATUS) & E1000_STATUS_LU) &&
3458 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3459 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3460 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3461 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3462 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3463 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3464 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3465 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3466 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3467 if (ret_val)
3468 e_warn("Error reading PHY register\n");
3469 } else {
3470 /*
3471 * Do not read PHY registers if link is not up
3472 * Set values to typical power-on defaults
3473 */
3474 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3475 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3476 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3477 BMSR_ERCAP);
3478 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3479 ADVERTISE_ALL | ADVERTISE_CSMA);
3480 phy->lpa = 0;
3481 phy->expansion = EXPANSION_ENABLENPAGE;
3482 phy->ctrl1000 = ADVERTISE_1000FULL;
3483 phy->stat1000 = 0;
3484 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3485 }
3486 }
3487
3488 static void e1000_print_link_info(struct e1000_adapter *adapter)
3489 {
3490 struct e1000_hw *hw = &adapter->hw;
3491 u32 ctrl = er32(CTRL);
3492
3493 /* Link status message must follow this format for user tools */
3494 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3495 "Flow Control: %s\n",
3496 adapter->netdev->name,
3497 adapter->link_speed,
3498 (adapter->link_duplex == FULL_DUPLEX) ?
3499 "Full Duplex" : "Half Duplex",
3500 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3501 "RX/TX" :
3502 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3503 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
3504 }
3505
3506 bool e1000_has_link(struct e1000_adapter *adapter)
3507 {
3508 struct e1000_hw *hw = &adapter->hw;
3509 bool link_active = 0;
3510 s32 ret_val = 0;
3511
3512 /*
3513 * get_link_status is set on LSC (link status) interrupt or
3514 * Rx sequence error interrupt. get_link_status will stay
3515 * false until the check_for_link establishes link
3516 * for copper adapters ONLY
3517 */
3518 switch (hw->phy.media_type) {
3519 case e1000_media_type_copper:
3520 if (hw->mac.get_link_status) {
3521 ret_val = hw->mac.ops.check_for_link(hw);
3522 link_active = !hw->mac.get_link_status;
3523 } else {
3524 link_active = 1;
3525 }
3526 break;
3527 case e1000_media_type_fiber:
3528 ret_val = hw->mac.ops.check_for_link(hw);
3529 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3530 break;
3531 case e1000_media_type_internal_serdes:
3532 ret_val = hw->mac.ops.check_for_link(hw);
3533 link_active = adapter->hw.mac.serdes_has_link;
3534 break;
3535 default:
3536 case e1000_media_type_unknown:
3537 break;
3538 }
3539
3540 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3541 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3542 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
3543 e_info("Gigabit has been disabled, downgrading speed\n");
3544 }
3545
3546 return link_active;
3547 }
3548
3549 static void e1000e_enable_receives(struct e1000_adapter *adapter)
3550 {
3551 /* make sure the receive unit is started */
3552 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3553 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3554 struct e1000_hw *hw = &adapter->hw;
3555 u32 rctl = er32(RCTL);
3556 ew32(RCTL, rctl | E1000_RCTL_EN);
3557 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3558 }
3559 }
3560
3561 /**
3562 * e1000_watchdog - Timer Call-back
3563 * @data: pointer to adapter cast into an unsigned long
3564 **/
3565 static void e1000_watchdog(unsigned long data)
3566 {
3567 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3568
3569 /* Do the rest outside of interrupt context */
3570 schedule_work(&adapter->watchdog_task);
3571
3572 /* TODO: make this use queue_delayed_work() */
3573 }
3574
3575 static void e1000_watchdog_task(struct work_struct *work)
3576 {
3577 struct e1000_adapter *adapter = container_of(work,
3578 struct e1000_adapter, watchdog_task);
3579 struct net_device *netdev = adapter->netdev;
3580 struct e1000_mac_info *mac = &adapter->hw.mac;
3581 struct e1000_phy_info *phy = &adapter->hw.phy;
3582 struct e1000_ring *tx_ring = adapter->tx_ring;
3583 struct e1000_hw *hw = &adapter->hw;
3584 u32 link, tctl;
3585 int tx_pending = 0;
3586
3587 link = e1000_has_link(adapter);
3588 if ((netif_carrier_ok(netdev)) && link) {
3589 e1000e_enable_receives(adapter);
3590 goto link_up;
3591 }
3592
3593 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3594 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3595 e1000_update_mng_vlan(adapter);
3596
3597 if (link) {
3598 if (!netif_carrier_ok(netdev)) {
3599 bool txb2b = 1;
3600 /* update snapshot of PHY registers on LSC */
3601 e1000_phy_read_status(adapter);
3602 mac->ops.get_link_up_info(&adapter->hw,
3603 &adapter->link_speed,
3604 &adapter->link_duplex);
3605 e1000_print_link_info(adapter);
3606 /*
3607 * On supported PHYs, check for duplex mismatch only
3608 * if link has autonegotiated at 10/100 half
3609 */
3610 if ((hw->phy.type == e1000_phy_igp_3 ||
3611 hw->phy.type == e1000_phy_bm) &&
3612 (hw->mac.autoneg == true) &&
3613 (adapter->link_speed == SPEED_10 ||
3614 adapter->link_speed == SPEED_100) &&
3615 (adapter->link_duplex == HALF_DUPLEX)) {
3616 u16 autoneg_exp;
3617
3618 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3619
3620 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3621 e_info("Autonegotiated half duplex but"
3622 " link partner cannot autoneg. "
3623 " Try forcing full duplex if "
3624 "link gets many collisions.\n");
3625 }
3626
3627 /*
3628 * tweak tx_queue_len according to speed/duplex
3629 * and adjust the timeout factor
3630 */
3631 netdev->tx_queue_len = adapter->tx_queue_len;
3632 adapter->tx_timeout_factor = 1;
3633 switch (adapter->link_speed) {
3634 case SPEED_10:
3635 txb2b = 0;
3636 netdev->tx_queue_len = 10;
3637 adapter->tx_timeout_factor = 16;
3638 break;
3639 case SPEED_100:
3640 txb2b = 0;
3641 netdev->tx_queue_len = 100;
3642 adapter->tx_timeout_factor = 10;
3643 break;
3644 }
3645
3646 /*
3647 * workaround: re-program speed mode bit after
3648 * link-up event
3649 */
3650 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3651 !txb2b) {
3652 u32 tarc0;
3653 tarc0 = er32(TARC(0));
3654 tarc0 &= ~SPEED_MODE_BIT;
3655 ew32(TARC(0), tarc0);
3656 }
3657
3658 /*
3659 * disable TSO for pcie and 10/100 speeds, to avoid
3660 * some hardware issues
3661 */
3662 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3663 switch (adapter->link_speed) {
3664 case SPEED_10:
3665 case SPEED_100:
3666 e_info("10/100 speed: disabling TSO\n");
3667 netdev->features &= ~NETIF_F_TSO;
3668 netdev->features &= ~NETIF_F_TSO6;
3669 break;
3670 case SPEED_1000:
3671 netdev->features |= NETIF_F_TSO;
3672 netdev->features |= NETIF_F_TSO6;
3673 break;
3674 default:
3675 /* oops */
3676 break;
3677 }
3678 }
3679
3680 /*
3681 * enable transmits in the hardware, need to do this
3682 * after setting TARC(0)
3683 */
3684 tctl = er32(TCTL);
3685 tctl |= E1000_TCTL_EN;
3686 ew32(TCTL, tctl);
3687
3688 /*
3689 * Perform any post-link-up configuration before
3690 * reporting link up.
3691 */
3692 if (phy->ops.cfg_on_link_up)
3693 phy->ops.cfg_on_link_up(hw);
3694
3695 netif_carrier_on(netdev);
3696
3697 if (!test_bit(__E1000_DOWN, &adapter->state))
3698 mod_timer(&adapter->phy_info_timer,
3699 round_jiffies(jiffies + 2 * HZ));
3700 }
3701 } else {
3702 if (netif_carrier_ok(netdev)) {
3703 adapter->link_speed = 0;
3704 adapter->link_duplex = 0;
3705 /* Link status message must follow this format */
3706 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3707 adapter->netdev->name);
3708 netif_carrier_off(netdev);
3709 if (!test_bit(__E1000_DOWN, &adapter->state))
3710 mod_timer(&adapter->phy_info_timer,
3711 round_jiffies(jiffies + 2 * HZ));
3712
3713 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3714 schedule_work(&adapter->reset_task);
3715 }
3716 }
3717
3718 link_up:
3719 e1000e_update_stats(adapter);
3720
3721 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3722 adapter->tpt_old = adapter->stats.tpt;
3723 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3724 adapter->colc_old = adapter->stats.colc;
3725
3726 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3727 adapter->gorc_old = adapter->stats.gorc;
3728 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3729 adapter->gotc_old = adapter->stats.gotc;
3730
3731 e1000e_update_adaptive(&adapter->hw);
3732
3733 if (!netif_carrier_ok(netdev)) {
3734 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3735 tx_ring->count);
3736 if (tx_pending) {
3737 /*
3738 * We've lost link, so the controller stops DMA,
3739 * but we've got queued Tx work that's never going
3740 * to get done, so reset controller to flush Tx.
3741 * (Do the reset outside of interrupt context).
3742 */
3743 adapter->tx_timeout_count++;
3744 schedule_work(&adapter->reset_task);
3745 /* return immediately since reset is imminent */
3746 return;
3747 }
3748 }
3749
3750 /* Cause software interrupt to ensure Rx ring is cleaned */
3751 if (adapter->msix_entries)
3752 ew32(ICS, adapter->rx_ring->ims_val);
3753 else
3754 ew32(ICS, E1000_ICS_RXDMT0);
3755
3756 /* Force detection of hung controller every watchdog period */
3757 adapter->detect_tx_hung = 1;
3758
3759 /*
3760 * With 82571 controllers, LAA may be overwritten due to controller
3761 * reset from the other port. Set the appropriate LAA in RAR[0]
3762 */
3763 if (e1000e_get_laa_state_82571(hw))
3764 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3765
3766 /* Reset the timer */
3767 if (!test_bit(__E1000_DOWN, &adapter->state))
3768 mod_timer(&adapter->watchdog_timer,
3769 round_jiffies(jiffies + 2 * HZ));
3770 }
3771
3772 #define E1000_TX_FLAGS_CSUM 0x00000001
3773 #define E1000_TX_FLAGS_VLAN 0x00000002
3774 #define E1000_TX_FLAGS_TSO 0x00000004
3775 #define E1000_TX_FLAGS_IPV4 0x00000008
3776 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3777 #define E1000_TX_FLAGS_VLAN_SHIFT 16
3778
3779 static int e1000_tso(struct e1000_adapter *adapter,
3780 struct sk_buff *skb)
3781 {
3782 struct e1000_ring *tx_ring = adapter->tx_ring;
3783 struct e1000_context_desc *context_desc;
3784 struct e1000_buffer *buffer_info;
3785 unsigned int i;
3786 u32 cmd_length = 0;
3787 u16 ipcse = 0, tucse, mss;
3788 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3789 int err;
3790
3791 if (skb_is_gso(skb)) {
3792 if (skb_header_cloned(skb)) {
3793 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3794 if (err)
3795 return err;
3796 }
3797
3798 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3799 mss = skb_shinfo(skb)->gso_size;
3800 if (skb->protocol == htons(ETH_P_IP)) {
3801 struct iphdr *iph = ip_hdr(skb);
3802 iph->tot_len = 0;
3803 iph->check = 0;
3804 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3805 iph->daddr, 0,
3806 IPPROTO_TCP,
3807 0);
3808 cmd_length = E1000_TXD_CMD_IP;
3809 ipcse = skb_transport_offset(skb) - 1;
3810 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3811 ipv6_hdr(skb)->payload_len = 0;
3812 tcp_hdr(skb)->check =
3813 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3814 &ipv6_hdr(skb)->daddr,
3815 0, IPPROTO_TCP, 0);
3816 ipcse = 0;
3817 }
3818 ipcss = skb_network_offset(skb);
3819 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3820 tucss = skb_transport_offset(skb);
3821 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3822 tucse = 0;
3823
3824 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3825 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3826
3827 i = tx_ring->next_to_use;
3828 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3829 buffer_info = &tx_ring->buffer_info[i];
3830
3831 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3832 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3833 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3834 context_desc->upper_setup.tcp_fields.tucss = tucss;
3835 context_desc->upper_setup.tcp_fields.tucso = tucso;
3836 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3837 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3838 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3839 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3840
3841 buffer_info->time_stamp = jiffies;
3842 buffer_info->next_to_watch = i;
3843
3844 i++;
3845 if (i == tx_ring->count)
3846 i = 0;
3847 tx_ring->next_to_use = i;
3848
3849 return 1;
3850 }
3851
3852 return 0;
3853 }
3854
3855 static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3856 {
3857 struct e1000_ring *tx_ring = adapter->tx_ring;
3858 struct e1000_context_desc *context_desc;
3859 struct e1000_buffer *buffer_info;
3860 unsigned int i;
3861 u8 css;
3862 u32 cmd_len = E1000_TXD_CMD_DEXT;
3863 __be16 protocol;
3864
3865 if (skb->ip_summed != CHECKSUM_PARTIAL)
3866 return 0;
3867
3868 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3869 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3870 else
3871 protocol = skb->protocol;
3872
3873 switch (protocol) {
3874 case cpu_to_be16(ETH_P_IP):
3875 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3876 cmd_len |= E1000_TXD_CMD_TCP;
3877 break;
3878 case cpu_to_be16(ETH_P_IPV6):
3879 /* XXX not handling all IPV6 headers */
3880 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3881 cmd_len |= E1000_TXD_CMD_TCP;
3882 break;
3883 default:
3884 if (unlikely(net_ratelimit()))
3885 e_warn("checksum_partial proto=%x!\n",
3886 be16_to_cpu(protocol));
3887 break;
3888 }
3889
3890 css = skb_transport_offset(skb);
3891
3892 i = tx_ring->next_to_use;
3893 buffer_info = &tx_ring->buffer_info[i];
3894 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3895
3896 context_desc->lower_setup.ip_config = 0;
3897 context_desc->upper_setup.tcp_fields.tucss = css;
3898 context_desc->upper_setup.tcp_fields.tucso =
3899 css + skb->csum_offset;
3900 context_desc->upper_setup.tcp_fields.tucse = 0;
3901 context_desc->tcp_seg_setup.data = 0;
3902 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3903
3904 buffer_info->time_stamp = jiffies;
3905 buffer_info->next_to_watch = i;
3906
3907 i++;
3908 if (i == tx_ring->count)
3909 i = 0;
3910 tx_ring->next_to_use = i;
3911
3912 return 1;
3913 }
3914
3915 #define E1000_MAX_PER_TXD 8192
3916 #define E1000_MAX_TXD_PWR 12
3917
3918 static int e1000_tx_map(struct e1000_adapter *adapter,
3919 struct sk_buff *skb, unsigned int first,
3920 unsigned int max_per_txd, unsigned int nr_frags,
3921 unsigned int mss)
3922 {
3923 struct e1000_ring *tx_ring = adapter->tx_ring;
3924 struct e1000_buffer *buffer_info;
3925 unsigned int len = skb_headlen(skb);
3926 unsigned int offset, size, count = 0, i;
3927 unsigned int f;
3928 dma_addr_t *map;
3929
3930 i = tx_ring->next_to_use;
3931
3932 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
3933 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3934 adapter->tx_dma_failed++;
3935 return 0;
3936 }
3937
3938 map = skb_shinfo(skb)->dma_maps;
3939 offset = 0;
3940
3941 while (len) {
3942 buffer_info = &tx_ring->buffer_info[i];
3943 size = min(len, max_per_txd);
3944
3945 buffer_info->length = size;
3946 buffer_info->time_stamp = jiffies;
3947 buffer_info->next_to_watch = i;
3948 buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
3949 count++;
3950
3951 len -= size;
3952 offset += size;
3953
3954 if (len) {
3955 i++;
3956 if (i == tx_ring->count)
3957 i = 0;
3958 }
3959 }
3960
3961 for (f = 0; f < nr_frags; f++) {
3962 struct skb_frag_struct *frag;
3963
3964 frag = &skb_shinfo(skb)->frags[f];
3965 len = frag->size;
3966 offset = 0;
3967
3968 while (len) {
3969 i++;
3970 if (i == tx_ring->count)
3971 i = 0;
3972
3973 buffer_info = &tx_ring->buffer_info[i];
3974 size = min(len, max_per_txd);
3975
3976 buffer_info->length = size;
3977 buffer_info->time_stamp = jiffies;
3978 buffer_info->next_to_watch = i;
3979 buffer_info->dma = map[f] + offset;
3980
3981 len -= size;
3982 offset += size;
3983 count++;
3984 }
3985 }
3986
3987 tx_ring->buffer_info[i].skb = skb;
3988 tx_ring->buffer_info[first].next_to_watch = i;
3989
3990 return count;
3991 }
3992
3993 static void e1000_tx_queue(struct e1000_adapter *adapter,
3994 int tx_flags, int count)
3995 {
3996 struct e1000_ring *tx_ring = adapter->tx_ring;
3997 struct e1000_tx_desc *tx_desc = NULL;
3998 struct e1000_buffer *buffer_info;
3999 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4000 unsigned int i;
4001
4002 if (tx_flags & E1000_TX_FLAGS_TSO) {
4003 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4004 E1000_TXD_CMD_TSE;
4005 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4006
4007 if (tx_flags & E1000_TX_FLAGS_IPV4)
4008 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4009 }
4010
4011 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4012 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4013 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4014 }
4015
4016 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4017 txd_lower |= E1000_TXD_CMD_VLE;
4018 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4019 }
4020
4021 i = tx_ring->next_to_use;
4022
4023 while (count--) {
4024 buffer_info = &tx_ring->buffer_info[i];
4025 tx_desc = E1000_TX_DESC(*tx_ring, i);
4026 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4027 tx_desc->lower.data =
4028 cpu_to_le32(txd_lower | buffer_info->length);
4029 tx_desc->upper.data = cpu_to_le32(txd_upper);
4030
4031 i++;
4032 if (i == tx_ring->count)
4033 i = 0;
4034 }
4035
4036 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4037
4038 /*
4039 * Force memory writes to complete before letting h/w
4040 * know there are new descriptors to fetch. (Only
4041 * applicable for weak-ordered memory model archs,
4042 * such as IA-64).
4043 */
4044 wmb();
4045
4046 tx_ring->next_to_use = i;
4047 writel(i, adapter->hw.hw_addr + tx_ring->tail);
4048 /*
4049 * we need this if more than one processor can write to our tail
4050 * at a time, it synchronizes IO on IA64/Altix systems
4051 */
4052 mmiowb();
4053 }
4054
4055 #define MINIMUM_DHCP_PACKET_SIZE 282
4056 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4057 struct sk_buff *skb)
4058 {
4059 struct e1000_hw *hw = &adapter->hw;
4060 u16 length, offset;
4061
4062 if (vlan_tx_tag_present(skb)) {
4063 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
4064 && (adapter->hw.mng_cookie.status &
4065 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4066 return 0;
4067 }
4068
4069 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4070 return 0;
4071
4072 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4073 return 0;
4074
4075 {
4076 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4077 struct udphdr *udp;
4078
4079 if (ip->protocol != IPPROTO_UDP)
4080 return 0;
4081
4082 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4083 if (ntohs(udp->dest) != 67)
4084 return 0;
4085
4086 offset = (u8 *)udp + 8 - skb->data;
4087 length = skb->len - offset;
4088 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4089 }
4090
4091 return 0;
4092 }
4093
4094 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4095 {
4096 struct e1000_adapter *adapter = netdev_priv(netdev);
4097
4098 netif_stop_queue(netdev);
4099 /*
4100 * Herbert's original patch had:
4101 * smp_mb__after_netif_stop_queue();
4102 * but since that doesn't exist yet, just open code it.
4103 */
4104 smp_mb();
4105
4106 /*
4107 * We need to check again in a case another CPU has just
4108 * made room available.
4109 */
4110 if (e1000_desc_unused(adapter->tx_ring) < size)
4111 return -EBUSY;
4112
4113 /* A reprieve! */
4114 netif_start_queue(netdev);
4115 ++adapter->restart_queue;
4116 return 0;
4117 }
4118
4119 static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4120 {
4121 struct e1000_adapter *adapter = netdev_priv(netdev);
4122
4123 if (e1000_desc_unused(adapter->tx_ring) >= size)
4124 return 0;
4125 return __e1000_maybe_stop_tx(netdev, size);
4126 }
4127
4128 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
4129 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4130 struct net_device *netdev)
4131 {
4132 struct e1000_adapter *adapter = netdev_priv(netdev);
4133 struct e1000_ring *tx_ring = adapter->tx_ring;
4134 unsigned int first;
4135 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4136 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4137 unsigned int tx_flags = 0;
4138 unsigned int len = skb->len - skb->data_len;
4139 unsigned int nr_frags;
4140 unsigned int mss;
4141 int count = 0;
4142 int tso;
4143 unsigned int f;
4144
4145 if (test_bit(__E1000_DOWN, &adapter->state)) {
4146 dev_kfree_skb_any(skb);
4147 return NETDEV_TX_OK;
4148 }
4149
4150 if (skb->len <= 0) {
4151 dev_kfree_skb_any(skb);
4152 return NETDEV_TX_OK;
4153 }
4154
4155 mss = skb_shinfo(skb)->gso_size;
4156 /*
4157 * The controller does a simple calculation to
4158 * make sure there is enough room in the FIFO before
4159 * initiating the DMA for each buffer. The calc is:
4160 * 4 = ceil(buffer len/mss). To make sure we don't
4161 * overrun the FIFO, adjust the max buffer len if mss
4162 * drops.
4163 */
4164 if (mss) {
4165 u8 hdr_len;
4166 max_per_txd = min(mss << 2, max_per_txd);
4167 max_txd_pwr = fls(max_per_txd) - 1;
4168
4169 /*
4170 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4171 * points to just header, pull a few bytes of payload from
4172 * frags into skb->data
4173 */
4174 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4175 /*
4176 * we do this workaround for ES2LAN, but it is un-necessary,
4177 * avoiding it could save a lot of cycles
4178 */
4179 if (skb->data_len && (hdr_len == len)) {
4180 unsigned int pull_size;
4181
4182 pull_size = min((unsigned int)4, skb->data_len);
4183 if (!__pskb_pull_tail(skb, pull_size)) {
4184 e_err("__pskb_pull_tail failed.\n");
4185 dev_kfree_skb_any(skb);
4186 return NETDEV_TX_OK;
4187 }
4188 len = skb->len - skb->data_len;
4189 }
4190 }
4191
4192 /* reserve a descriptor for the offload context */
4193 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4194 count++;
4195 count++;
4196
4197 count += TXD_USE_COUNT(len, max_txd_pwr);
4198
4199 nr_frags = skb_shinfo(skb)->nr_frags;
4200 for (f = 0; f < nr_frags; f++)
4201 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4202 max_txd_pwr);
4203
4204 if (adapter->hw.mac.tx_pkt_filtering)
4205 e1000_transfer_dhcp_info(adapter, skb);
4206
4207 /*
4208 * need: count + 2 desc gap to keep tail from touching
4209 * head, otherwise try next time
4210 */
4211 if (e1000_maybe_stop_tx(netdev, count + 2))
4212 return NETDEV_TX_BUSY;
4213
4214 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4215 tx_flags |= E1000_TX_FLAGS_VLAN;
4216 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4217 }
4218
4219 first = tx_ring->next_to_use;
4220
4221 tso = e1000_tso(adapter, skb);
4222 if (tso < 0) {
4223 dev_kfree_skb_any(skb);
4224 return NETDEV_TX_OK;
4225 }
4226
4227 if (tso)
4228 tx_flags |= E1000_TX_FLAGS_TSO;
4229 else if (e1000_tx_csum(adapter, skb))
4230 tx_flags |= E1000_TX_FLAGS_CSUM;
4231
4232 /*
4233 * Old method was to assume IPv4 packet by default if TSO was enabled.
4234 * 82571 hardware supports TSO capabilities for IPv6 as well...
4235 * no longer assume, we must.
4236 */
4237 if (skb->protocol == htons(ETH_P_IP))
4238 tx_flags |= E1000_TX_FLAGS_IPV4;
4239
4240 /* if count is 0 then mapping error has occured */
4241 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
4242 if (count) {
4243 e1000_tx_queue(adapter, tx_flags, count);
4244 /* Make sure there is space in the ring for the next send. */
4245 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4246
4247 } else {
4248 dev_kfree_skb_any(skb);
4249 tx_ring->buffer_info[first].time_stamp = 0;
4250 tx_ring->next_to_use = first;
4251 }
4252
4253 return NETDEV_TX_OK;
4254 }
4255
4256 /**
4257 * e1000_tx_timeout - Respond to a Tx Hang
4258 * @netdev: network interface device structure
4259 **/
4260 static void e1000_tx_timeout(struct net_device *netdev)
4261 {
4262 struct e1000_adapter *adapter = netdev_priv(netdev);
4263
4264 /* Do the reset outside of interrupt context */
4265 adapter->tx_timeout_count++;
4266 schedule_work(&adapter->reset_task);
4267 }
4268
4269 static void e1000_reset_task(struct work_struct *work)
4270 {
4271 struct e1000_adapter *adapter;
4272 adapter = container_of(work, struct e1000_adapter, reset_task);
4273
4274 e1000e_reinit_locked(adapter);
4275 }
4276
4277 /**
4278 * e1000_get_stats - Get System Network Statistics
4279 * @netdev: network interface device structure
4280 *
4281 * Returns the address of the device statistics structure.
4282 * The statistics are actually updated from the timer callback.
4283 **/
4284 static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4285 {
4286 struct e1000_adapter *adapter = netdev_priv(netdev);
4287
4288 /* only return the current stats */
4289 return &adapter->net_stats;
4290 }
4291
4292 /**
4293 * e1000_change_mtu - Change the Maximum Transfer Unit
4294 * @netdev: network interface device structure
4295 * @new_mtu: new value for maximum frame size
4296 *
4297 * Returns 0 on success, negative on failure
4298 **/
4299 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4300 {
4301 struct e1000_adapter *adapter = netdev_priv(netdev);
4302 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4303
4304 /* Jumbo frame support */
4305 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4306 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4307 e_err("Jumbo Frames not supported.\n");
4308 return -EINVAL;
4309 }
4310
4311 /* Supported frame sizes */
4312 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4313 (max_frame > adapter->max_hw_frame_size)) {
4314 e_err("Unsupported MTU setting\n");
4315 return -EINVAL;
4316 }
4317
4318 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4319 msleep(1);
4320 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
4321 adapter->max_frame_size = max_frame;
4322 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4323 netdev->mtu = new_mtu;
4324 if (netif_running(netdev))
4325 e1000e_down(adapter);
4326
4327 /*
4328 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
4329 * means we reserve 2 more, this pushes us to allocate from the next
4330 * larger slab size.
4331 * i.e. RXBUFFER_2048 --> size-4096 slab
4332 * However with the new *_jumbo_rx* routines, jumbo receives will use
4333 * fragmented skbs
4334 */
4335
4336 if (max_frame <= 2048)
4337 adapter->rx_buffer_len = 2048;
4338 else
4339 adapter->rx_buffer_len = 4096;
4340
4341 /* adjust allocation if LPE protects us, and we aren't using SBP */
4342 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4343 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4344 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
4345 + ETH_FCS_LEN;
4346
4347 if (netif_running(netdev))
4348 e1000e_up(adapter);
4349 else
4350 e1000e_reset(adapter);
4351
4352 clear_bit(__E1000_RESETTING, &adapter->state);
4353
4354 return 0;
4355 }
4356
4357 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4358 int cmd)
4359 {
4360 struct e1000_adapter *adapter = netdev_priv(netdev);
4361 struct mii_ioctl_data *data = if_mii(ifr);
4362
4363 if (adapter->hw.phy.media_type != e1000_media_type_copper)
4364 return -EOPNOTSUPP;
4365
4366 switch (cmd) {
4367 case SIOCGMIIPHY:
4368 data->phy_id = adapter->hw.phy.addr;
4369 break;
4370 case SIOCGMIIREG:
4371 switch (data->reg_num & 0x1F) {
4372 case MII_BMCR:
4373 data->val_out = adapter->phy_regs.bmcr;
4374 break;
4375 case MII_BMSR:
4376 data->val_out = adapter->phy_regs.bmsr;
4377 break;
4378 case MII_PHYSID1:
4379 data->val_out = (adapter->hw.phy.id >> 16);
4380 break;
4381 case MII_PHYSID2:
4382 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4383 break;
4384 case MII_ADVERTISE:
4385 data->val_out = adapter->phy_regs.advertise;
4386 break;
4387 case MII_LPA:
4388 data->val_out = adapter->phy_regs.lpa;
4389 break;
4390 case MII_EXPANSION:
4391 data->val_out = adapter->phy_regs.expansion;
4392 break;
4393 case MII_CTRL1000:
4394 data->val_out = adapter->phy_regs.ctrl1000;
4395 break;
4396 case MII_STAT1000:
4397 data->val_out = adapter->phy_regs.stat1000;
4398 break;
4399 case MII_ESTATUS:
4400 data->val_out = adapter->phy_regs.estatus;
4401 break;
4402 default:
4403 return -EIO;
4404 }
4405 break;
4406 case SIOCSMIIREG:
4407 default:
4408 return -EOPNOTSUPP;
4409 }
4410 return 0;
4411 }
4412
4413 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4414 {
4415 switch (cmd) {
4416 case SIOCGMIIPHY:
4417 case SIOCGMIIREG:
4418 case SIOCSMIIREG:
4419 return e1000_mii_ioctl(netdev, ifr, cmd);
4420 default:
4421 return -EOPNOTSUPP;
4422 }
4423 }
4424
4425 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4426 {
4427 struct e1000_hw *hw = &adapter->hw;
4428 u32 i, mac_reg;
4429 u16 phy_reg;
4430 int retval = 0;
4431
4432 /* copy MAC RARs to PHY RARs */
4433 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4434 mac_reg = er32(RAL(i));
4435 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4436 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4437 mac_reg = er32(RAH(i));
4438 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4439 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4440 }
4441
4442 /* copy MAC MTA to PHY MTA */
4443 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4444 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4445 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4446 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4447 }
4448
4449 /* configure PHY Rx Control register */
4450 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4451 mac_reg = er32(RCTL);
4452 if (mac_reg & E1000_RCTL_UPE)
4453 phy_reg |= BM_RCTL_UPE;
4454 if (mac_reg & E1000_RCTL_MPE)
4455 phy_reg |= BM_RCTL_MPE;
4456 phy_reg &= ~(BM_RCTL_MO_MASK);
4457 if (mac_reg & E1000_RCTL_MO_3)
4458 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4459 << BM_RCTL_MO_SHIFT);
4460 if (mac_reg & E1000_RCTL_BAM)
4461 phy_reg |= BM_RCTL_BAM;
4462 if (mac_reg & E1000_RCTL_PMCF)
4463 phy_reg |= BM_RCTL_PMCF;
4464 mac_reg = er32(CTRL);
4465 if (mac_reg & E1000_CTRL_RFCE)
4466 phy_reg |= BM_RCTL_RFCE;
4467 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4468
4469 /* enable PHY wakeup in MAC register */
4470 ew32(WUFC, wufc);
4471 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4472
4473 /* configure and enable PHY wakeup in PHY registers */
4474 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4475 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4476
4477 /* activate PHY wakeup */
4478 retval = hw->phy.ops.acquire_phy(hw);
4479 if (retval) {
4480 e_err("Could not acquire PHY\n");
4481 return retval;
4482 }
4483 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4484 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4485 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4486 if (retval) {
4487 e_err("Could not read PHY page 769\n");
4488 goto out;
4489 }
4490 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4491 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4492 if (retval)
4493 e_err("Could not set PHY Host Wakeup bit\n");
4494 out:
4495 hw->phy.ops.release_phy(hw);
4496
4497 return retval;
4498 }
4499
4500 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
4501 {
4502 struct net_device *netdev = pci_get_drvdata(pdev);
4503 struct e1000_adapter *adapter = netdev_priv(netdev);
4504 struct e1000_hw *hw = &adapter->hw;
4505 u32 ctrl, ctrl_ext, rctl, status;
4506 u32 wufc = adapter->wol;
4507 int retval = 0;
4508
4509 netif_device_detach(netdev);
4510
4511 if (netif_running(netdev)) {
4512 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4513 e1000e_down(adapter);
4514 e1000_free_irq(adapter);
4515 }
4516 e1000e_reset_interrupt_capability(adapter);
4517
4518 retval = pci_save_state(pdev);
4519 if (retval)
4520 return retval;
4521
4522 status = er32(STATUS);
4523 if (status & E1000_STATUS_LU)
4524 wufc &= ~E1000_WUFC_LNKC;
4525
4526 if (wufc) {
4527 e1000_setup_rctl(adapter);
4528 e1000_set_multi(netdev);
4529
4530 /* turn on all-multi mode if wake on multicast is enabled */
4531 if (wufc & E1000_WUFC_MC) {
4532 rctl = er32(RCTL);
4533 rctl |= E1000_RCTL_MPE;
4534 ew32(RCTL, rctl);
4535 }
4536
4537 ctrl = er32(CTRL);
4538 /* advertise wake from D3Cold */
4539 #define E1000_CTRL_ADVD3WUC 0x00100000
4540 /* phy power management enable */
4541 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4542 ctrl |= E1000_CTRL_ADVD3WUC;
4543 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4544 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
4545 ew32(CTRL, ctrl);
4546
4547 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4548 adapter->hw.phy.media_type ==
4549 e1000_media_type_internal_serdes) {
4550 /* keep the laser running in D3 */
4551 ctrl_ext = er32(CTRL_EXT);
4552 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4553 ew32(CTRL_EXT, ctrl_ext);
4554 }
4555
4556 if (adapter->flags & FLAG_IS_ICH)
4557 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4558
4559 /* Allow time for pending master requests to run */
4560 e1000e_disable_pcie_master(&adapter->hw);
4561
4562 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4563 /* enable wakeup by the PHY */
4564 retval = e1000_init_phy_wakeup(adapter, wufc);
4565 if (retval)
4566 return retval;
4567 } else {
4568 /* enable wakeup by the MAC */
4569 ew32(WUFC, wufc);
4570 ew32(WUC, E1000_WUC_PME_EN);
4571 }
4572 } else {
4573 ew32(WUC, 0);
4574 ew32(WUFC, 0);
4575 }
4576
4577 *enable_wake = !!wufc;
4578
4579 /* make sure adapter isn't asleep if manageability is enabled */
4580 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4581 (hw->mac.ops.check_mng_mode(hw)))
4582 *enable_wake = true;
4583
4584 if (adapter->hw.phy.type == e1000_phy_igp_3)
4585 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4586
4587 /*
4588 * Release control of h/w to f/w. If f/w is AMT enabled, this
4589 * would have already happened in close and is redundant.
4590 */
4591 e1000_release_hw_control(adapter);
4592
4593 pci_disable_device(pdev);
4594
4595 return 0;
4596 }
4597
4598 static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4599 {
4600 if (sleep && wake) {
4601 pci_prepare_to_sleep(pdev);
4602 return;
4603 }
4604
4605 pci_wake_from_d3(pdev, wake);
4606 pci_set_power_state(pdev, PCI_D3hot);
4607 }
4608
4609 static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4610 bool wake)
4611 {
4612 struct net_device *netdev = pci_get_drvdata(pdev);
4613 struct e1000_adapter *adapter = netdev_priv(netdev);
4614
4615 /*
4616 * The pci-e switch on some quad port adapters will report a
4617 * correctable error when the MAC transitions from D0 to D3. To
4618 * prevent this we need to mask off the correctable errors on the
4619 * downstream port of the pci-e switch.
4620 */
4621 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4622 struct pci_dev *us_dev = pdev->bus->self;
4623 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4624 u16 devctl;
4625
4626 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4627 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4628 (devctl & ~PCI_EXP_DEVCTL_CERE));
4629
4630 e1000_power_off(pdev, sleep, wake);
4631
4632 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4633 } else {
4634 e1000_power_off(pdev, sleep, wake);
4635 }
4636 }
4637
4638 static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4639 {
4640 int pos;
4641 u16 val;
4642
4643 /*
4644 * 82573 workaround - disable L1 ASPM on mobile chipsets
4645 *
4646 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4647 * resulting in lost data or garbage information on the pci-e link
4648 * level. This could result in (false) bad EEPROM checksum errors,
4649 * long ping times (up to 2s) or even a system freeze/hang.
4650 *
4651 * Unfortunately this feature saves about 1W power consumption when
4652 * active.
4653 */
4654 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4655 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4656 if (val & 0x2) {
4657 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4658 val &= ~0x2;
4659 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4660 }
4661 }
4662
4663 #ifdef CONFIG_PM
4664 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4665 {
4666 int retval;
4667 bool wake;
4668
4669 retval = __e1000_shutdown(pdev, &wake);
4670 if (!retval)
4671 e1000_complete_shutdown(pdev, true, wake);
4672
4673 return retval;
4674 }
4675
4676 static int e1000_resume(struct pci_dev *pdev)
4677 {
4678 struct net_device *netdev = pci_get_drvdata(pdev);
4679 struct e1000_adapter *adapter = netdev_priv(netdev);
4680 struct e1000_hw *hw = &adapter->hw;
4681 u32 err;
4682
4683 pci_set_power_state(pdev, PCI_D0);
4684 pci_restore_state(pdev);
4685 e1000e_disable_l1aspm(pdev);
4686
4687 err = pci_enable_device_mem(pdev);
4688 if (err) {
4689 dev_err(&pdev->dev,
4690 "Cannot enable PCI device from suspend\n");
4691 return err;
4692 }
4693
4694 pci_set_master(pdev);
4695
4696 pci_enable_wake(pdev, PCI_D3hot, 0);
4697 pci_enable_wake(pdev, PCI_D3cold, 0);
4698
4699 e1000e_set_interrupt_capability(adapter);
4700 if (netif_running(netdev)) {
4701 err = e1000_request_irq(adapter);
4702 if (err)
4703 return err;
4704 }
4705
4706 e1000e_power_up_phy(adapter);
4707
4708 /* report the system wakeup cause from S3/S4 */
4709 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4710 u16 phy_data;
4711
4712 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4713 if (phy_data) {
4714 e_info("PHY Wakeup cause - %s\n",
4715 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4716 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4717 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4718 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4719 phy_data & E1000_WUS_LNKC ? "Link Status "
4720 " Change" : "other");
4721 }
4722 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4723 } else {
4724 u32 wus = er32(WUS);
4725 if (wus) {
4726 e_info("MAC Wakeup cause - %s\n",
4727 wus & E1000_WUS_EX ? "Unicast Packet" :
4728 wus & E1000_WUS_MC ? "Multicast Packet" :
4729 wus & E1000_WUS_BC ? "Broadcast Packet" :
4730 wus & E1000_WUS_MAG ? "Magic Packet" :
4731 wus & E1000_WUS_LNKC ? "Link Status Change" :
4732 "other");
4733 }
4734 ew32(WUS, ~0);
4735 }
4736
4737 e1000e_reset(adapter);
4738
4739 e1000_init_manageability(adapter);
4740
4741 if (netif_running(netdev))
4742 e1000e_up(adapter);
4743
4744 netif_device_attach(netdev);
4745
4746 /*
4747 * If the controller has AMT, do not set DRV_LOAD until the interface
4748 * is up. For all other cases, let the f/w know that the h/w is now
4749 * under the control of the driver.
4750 */
4751 if (!(adapter->flags & FLAG_HAS_AMT))
4752 e1000_get_hw_control(adapter);
4753
4754 return 0;
4755 }
4756 #endif
4757
4758 static void e1000_shutdown(struct pci_dev *pdev)
4759 {
4760 bool wake = false;
4761
4762 __e1000_shutdown(pdev, &wake);
4763
4764 if (system_state == SYSTEM_POWER_OFF)
4765 e1000_complete_shutdown(pdev, false, wake);
4766 }
4767
4768 #ifdef CONFIG_NET_POLL_CONTROLLER
4769 /*
4770 * Polling 'interrupt' - used by things like netconsole to send skbs
4771 * without having to re-enable interrupts. It's not called while
4772 * the interrupt routine is executing.
4773 */
4774 static void e1000_netpoll(struct net_device *netdev)
4775 {
4776 struct e1000_adapter *adapter = netdev_priv(netdev);
4777
4778 disable_irq(adapter->pdev->irq);
4779 e1000_intr(adapter->pdev->irq, netdev);
4780
4781 enable_irq(adapter->pdev->irq);
4782 }
4783 #endif
4784
4785 /**
4786 * e1000_io_error_detected - called when PCI error is detected
4787 * @pdev: Pointer to PCI device
4788 * @state: The current pci connection state
4789 *
4790 * This function is called after a PCI bus error affecting
4791 * this device has been detected.
4792 */
4793 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4794 pci_channel_state_t state)
4795 {
4796 struct net_device *netdev = pci_get_drvdata(pdev);
4797 struct e1000_adapter *adapter = netdev_priv(netdev);
4798
4799 netif_device_detach(netdev);
4800
4801 if (state == pci_channel_io_perm_failure)
4802 return PCI_ERS_RESULT_DISCONNECT;
4803
4804 if (netif_running(netdev))
4805 e1000e_down(adapter);
4806 pci_disable_device(pdev);
4807
4808 /* Request a slot slot reset. */
4809 return PCI_ERS_RESULT_NEED_RESET;
4810 }
4811
4812 /**
4813 * e1000_io_slot_reset - called after the pci bus has been reset.
4814 * @pdev: Pointer to PCI device
4815 *
4816 * Restart the card from scratch, as if from a cold-boot. Implementation
4817 * resembles the first-half of the e1000_resume routine.
4818 */
4819 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4820 {
4821 struct net_device *netdev = pci_get_drvdata(pdev);
4822 struct e1000_adapter *adapter = netdev_priv(netdev);
4823 struct e1000_hw *hw = &adapter->hw;
4824 int err;
4825 pci_ers_result_t result;
4826
4827 e1000e_disable_l1aspm(pdev);
4828 err = pci_enable_device_mem(pdev);
4829 if (err) {
4830 dev_err(&pdev->dev,
4831 "Cannot re-enable PCI device after reset.\n");
4832 result = PCI_ERS_RESULT_DISCONNECT;
4833 } else {
4834 pci_set_master(pdev);
4835 pci_restore_state(pdev);
4836
4837 pci_enable_wake(pdev, PCI_D3hot, 0);
4838 pci_enable_wake(pdev, PCI_D3cold, 0);
4839
4840 e1000e_reset(adapter);
4841 ew32(WUS, ~0);
4842 result = PCI_ERS_RESULT_RECOVERED;
4843 }
4844
4845 pci_cleanup_aer_uncorrect_error_status(pdev);
4846
4847 return result;
4848 }
4849
4850 /**
4851 * e1000_io_resume - called when traffic can start flowing again.
4852 * @pdev: Pointer to PCI device
4853 *
4854 * This callback is called when the error recovery driver tells us that
4855 * its OK to resume normal operation. Implementation resembles the
4856 * second-half of the e1000_resume routine.
4857 */
4858 static void e1000_io_resume(struct pci_dev *pdev)
4859 {
4860 struct net_device *netdev = pci_get_drvdata(pdev);
4861 struct e1000_adapter *adapter = netdev_priv(netdev);
4862
4863 e1000_init_manageability(adapter);
4864
4865 if (netif_running(netdev)) {
4866 if (e1000e_up(adapter)) {
4867 dev_err(&pdev->dev,
4868 "can't bring device back up after reset\n");
4869 return;
4870 }
4871 }
4872
4873 netif_device_attach(netdev);
4874
4875 /*
4876 * If the controller has AMT, do not set DRV_LOAD until the interface
4877 * is up. For all other cases, let the f/w know that the h/w is now
4878 * under the control of the driver.
4879 */
4880 if (!(adapter->flags & FLAG_HAS_AMT))
4881 e1000_get_hw_control(adapter);
4882
4883 }
4884
4885 static void e1000_print_device_info(struct e1000_adapter *adapter)
4886 {
4887 struct e1000_hw *hw = &adapter->hw;
4888 struct net_device *netdev = adapter->netdev;
4889 u32 pba_num;
4890
4891 /* print bus type/speed/width info */
4892 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
4893 /* bus width */
4894 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4895 "Width x1"),
4896 /* MAC address */
4897 netdev->dev_addr);
4898 e_info("Intel(R) PRO/%s Network Connection\n",
4899 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
4900 e1000e_read_pba_num(hw, &pba_num);
4901 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4902 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
4903 }
4904
4905 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4906 {
4907 struct e1000_hw *hw = &adapter->hw;
4908 int ret_val;
4909 u16 buf = 0;
4910
4911 if (hw->mac.type != e1000_82573)
4912 return;
4913
4914 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
4915 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
4916 /* Deep Smart Power Down (DSPD) */
4917 dev_warn(&adapter->pdev->dev,
4918 "Warning: detected DSPD enabled in EEPROM\n");
4919 }
4920
4921 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
4922 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
4923 /* ASPM enable */
4924 dev_warn(&adapter->pdev->dev,
4925 "Warning: detected ASPM enabled in EEPROM\n");
4926 }
4927 }
4928
4929 static const struct net_device_ops e1000e_netdev_ops = {
4930 .ndo_open = e1000_open,
4931 .ndo_stop = e1000_close,
4932 .ndo_start_xmit = e1000_xmit_frame,
4933 .ndo_get_stats = e1000_get_stats,
4934 .ndo_set_multicast_list = e1000_set_multi,
4935 .ndo_set_mac_address = e1000_set_mac,
4936 .ndo_change_mtu = e1000_change_mtu,
4937 .ndo_do_ioctl = e1000_ioctl,
4938 .ndo_tx_timeout = e1000_tx_timeout,
4939 .ndo_validate_addr = eth_validate_addr,
4940
4941 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4942 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4943 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4944 #ifdef CONFIG_NET_POLL_CONTROLLER
4945 .ndo_poll_controller = e1000_netpoll,
4946 #endif
4947 };
4948
4949 /**
4950 * e1000_probe - Device Initialization Routine
4951 * @pdev: PCI device information struct
4952 * @ent: entry in e1000_pci_tbl
4953 *
4954 * Returns 0 on success, negative on failure
4955 *
4956 * e1000_probe initializes an adapter identified by a pci_dev structure.
4957 * The OS initialization, configuring of the adapter private structure,
4958 * and a hardware reset occur.
4959 **/
4960 static int __devinit e1000_probe(struct pci_dev *pdev,
4961 const struct pci_device_id *ent)
4962 {
4963 struct net_device *netdev;
4964 struct e1000_adapter *adapter;
4965 struct e1000_hw *hw;
4966 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
4967 resource_size_t mmio_start, mmio_len;
4968 resource_size_t flash_start, flash_len;
4969
4970 static int cards_found;
4971 int i, err, pci_using_dac;
4972 u16 eeprom_data = 0;
4973 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4974
4975 e1000e_disable_l1aspm(pdev);
4976
4977 err = pci_enable_device_mem(pdev);
4978 if (err)
4979 return err;
4980
4981 pci_using_dac = 0;
4982 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4983 if (!err) {
4984 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4985 if (!err)
4986 pci_using_dac = 1;
4987 } else {
4988 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4989 if (err) {
4990 err = pci_set_consistent_dma_mask(pdev,
4991 DMA_BIT_MASK(32));
4992 if (err) {
4993 dev_err(&pdev->dev, "No usable DMA "
4994 "configuration, aborting\n");
4995 goto err_dma;
4996 }
4997 }
4998 }
4999
5000 err = pci_request_selected_regions_exclusive(pdev,
5001 pci_select_bars(pdev, IORESOURCE_MEM),
5002 e1000e_driver_name);
5003 if (err)
5004 goto err_pci_reg;
5005
5006 /* AER (Advanced Error Reporting) hooks */
5007 pci_enable_pcie_error_reporting(pdev);
5008
5009 pci_set_master(pdev);
5010 /* PCI config space info */
5011 err = pci_save_state(pdev);
5012 if (err)
5013 goto err_alloc_etherdev;
5014
5015 err = -ENOMEM;
5016 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5017 if (!netdev)
5018 goto err_alloc_etherdev;
5019
5020 SET_NETDEV_DEV(netdev, &pdev->dev);
5021
5022 pci_set_drvdata(pdev, netdev);
5023 adapter = netdev_priv(netdev);
5024 hw = &adapter->hw;
5025 adapter->netdev = netdev;
5026 adapter->pdev = pdev;
5027 adapter->ei = ei;
5028 adapter->pba = ei->pba;
5029 adapter->flags = ei->flags;
5030 adapter->flags2 = ei->flags2;
5031 adapter->hw.adapter = adapter;
5032 adapter->hw.mac.type = ei->mac;
5033 adapter->max_hw_frame_size = ei->max_hw_frame_size;
5034 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5035
5036 mmio_start = pci_resource_start(pdev, 0);
5037 mmio_len = pci_resource_len(pdev, 0);
5038
5039 err = -EIO;
5040 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5041 if (!adapter->hw.hw_addr)
5042 goto err_ioremap;
5043
5044 if ((adapter->flags & FLAG_HAS_FLASH) &&
5045 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5046 flash_start = pci_resource_start(pdev, 1);
5047 flash_len = pci_resource_len(pdev, 1);
5048 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5049 if (!adapter->hw.flash_address)
5050 goto err_flashmap;
5051 }
5052
5053 /* construct the net_device struct */
5054 netdev->netdev_ops = &e1000e_netdev_ops;
5055 e1000e_set_ethtool_ops(netdev);
5056 netdev->watchdog_timeo = 5 * HZ;
5057 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
5058 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5059
5060 netdev->mem_start = mmio_start;
5061 netdev->mem_end = mmio_start + mmio_len;
5062
5063 adapter->bd_number = cards_found++;
5064
5065 e1000e_check_options(adapter);
5066
5067 /* setup adapter struct */
5068 err = e1000_sw_init(adapter);
5069 if (err)
5070 goto err_sw_init;
5071
5072 err = -EIO;
5073
5074 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5075 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5076 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5077
5078 err = ei->get_variants(adapter);
5079 if (err)
5080 goto err_hw_init;
5081
5082 if ((adapter->flags & FLAG_IS_ICH) &&
5083 (adapter->flags & FLAG_READ_ONLY_NVM))
5084 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5085
5086 hw->mac.ops.get_bus_info(&adapter->hw);
5087
5088 adapter->hw.phy.autoneg_wait_to_complete = 0;
5089
5090 /* Copper options */
5091 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
5092 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5093 adapter->hw.phy.disable_polarity_correction = 0;
5094 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5095 }
5096
5097 if (e1000_check_reset_block(&adapter->hw))
5098 e_info("PHY reset is blocked due to SOL/IDER session.\n");
5099
5100 netdev->features = NETIF_F_SG |
5101 NETIF_F_HW_CSUM |
5102 NETIF_F_HW_VLAN_TX |
5103 NETIF_F_HW_VLAN_RX;
5104
5105 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5106 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5107
5108 netdev->features |= NETIF_F_TSO;
5109 netdev->features |= NETIF_F_TSO6;
5110
5111 netdev->vlan_features |= NETIF_F_TSO;
5112 netdev->vlan_features |= NETIF_F_TSO6;
5113 netdev->vlan_features |= NETIF_F_HW_CSUM;
5114 netdev->vlan_features |= NETIF_F_SG;
5115
5116 if (pci_using_dac)
5117 netdev->features |= NETIF_F_HIGHDMA;
5118
5119 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5120 adapter->flags |= FLAG_MNG_PT_ENABLED;
5121
5122 /*
5123 * before reading the NVM, reset the controller to
5124 * put the device in a known good starting state
5125 */
5126 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5127
5128 /*
5129 * systems with ASPM and others may see the checksum fail on the first
5130 * attempt. Let's give it a few tries
5131 */
5132 for (i = 0;; i++) {
5133 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5134 break;
5135 if (i == 2) {
5136 e_err("The NVM Checksum Is Not Valid\n");
5137 err = -EIO;
5138 goto err_eeprom;
5139 }
5140 }
5141
5142 e1000_eeprom_checks(adapter);
5143
5144 /* copy the MAC address out of the NVM */
5145 if (e1000e_read_mac_addr(&adapter->hw))
5146 e_err("NVM Read Error while reading MAC address\n");
5147
5148 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5149 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5150
5151 if (!is_valid_ether_addr(netdev->perm_addr)) {
5152 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
5153 err = -EIO;
5154 goto err_eeprom;
5155 }
5156
5157 init_timer(&adapter->watchdog_timer);
5158 adapter->watchdog_timer.function = &e1000_watchdog;
5159 adapter->watchdog_timer.data = (unsigned long) adapter;
5160
5161 init_timer(&adapter->phy_info_timer);
5162 adapter->phy_info_timer.function = &e1000_update_phy_info;
5163 adapter->phy_info_timer.data = (unsigned long) adapter;
5164
5165 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5166 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
5167 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5168 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
5169
5170 /* Initialize link parameters. User can change them with ethtool */
5171 adapter->hw.mac.autoneg = 1;
5172 adapter->fc_autoneg = 1;
5173 adapter->hw.fc.requested_mode = e1000_fc_default;
5174 adapter->hw.fc.current_mode = e1000_fc_default;
5175 adapter->hw.phy.autoneg_advertised = 0x2f;
5176
5177 /* ring size defaults */
5178 adapter->rx_ring->count = 256;
5179 adapter->tx_ring->count = 256;
5180
5181 /*
5182 * Initial Wake on LAN setting - If APM wake is enabled in
5183 * the EEPROM, enable the ACPI Magic Packet filter
5184 */
5185 if (adapter->flags & FLAG_APME_IN_WUC) {
5186 /* APME bit in EEPROM is mapped to WUC.APME */
5187 eeprom_data = er32(WUC);
5188 eeprom_apme_mask = E1000_WUC_APME;
5189 if ((hw->mac.type > e1000_ich10lan) &&
5190 (eeprom_data & E1000_WUC_PHY_WAKE))
5191 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
5192 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5193 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5194 (adapter->hw.bus.func == 1))
5195 e1000_read_nvm(&adapter->hw,
5196 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5197 else
5198 e1000_read_nvm(&adapter->hw,
5199 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5200 }
5201
5202 /* fetch WoL from EEPROM */
5203 if (eeprom_data & eeprom_apme_mask)
5204 adapter->eeprom_wol |= E1000_WUFC_MAG;
5205
5206 /*
5207 * now that we have the eeprom settings, apply the special cases
5208 * where the eeprom may be wrong or the board simply won't support
5209 * wake on lan on a particular port
5210 */
5211 if (!(adapter->flags & FLAG_HAS_WOL))
5212 adapter->eeprom_wol = 0;
5213
5214 /* initialize the wol settings based on the eeprom settings */
5215 adapter->wol = adapter->eeprom_wol;
5216 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
5217
5218 /* save off EEPROM version number */
5219 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5220
5221 /* reset the hardware with the new settings */
5222 e1000e_reset(adapter);
5223
5224 /*
5225 * If the controller has AMT, do not set DRV_LOAD until the interface
5226 * is up. For all other cases, let the f/w know that the h/w is now
5227 * under the control of the driver.
5228 */
5229 if (!(adapter->flags & FLAG_HAS_AMT))
5230 e1000_get_hw_control(adapter);
5231
5232 strcpy(netdev->name, "eth%d");
5233 err = register_netdev(netdev);
5234 if (err)
5235 goto err_register;
5236
5237 /* carrier off reporting is important to ethtool even BEFORE open */
5238 netif_carrier_off(netdev);
5239
5240 e1000_print_device_info(adapter);
5241
5242 return 0;
5243
5244 err_register:
5245 if (!(adapter->flags & FLAG_HAS_AMT))
5246 e1000_release_hw_control(adapter);
5247 err_eeprom:
5248 if (!e1000_check_reset_block(&adapter->hw))
5249 e1000_phy_hw_reset(&adapter->hw);
5250 err_hw_init:
5251
5252 kfree(adapter->tx_ring);
5253 kfree(adapter->rx_ring);
5254 err_sw_init:
5255 if (adapter->hw.flash_address)
5256 iounmap(adapter->hw.flash_address);
5257 e1000e_reset_interrupt_capability(adapter);
5258 err_flashmap:
5259 iounmap(adapter->hw.hw_addr);
5260 err_ioremap:
5261 free_netdev(netdev);
5262 err_alloc_etherdev:
5263 pci_release_selected_regions(pdev,
5264 pci_select_bars(pdev, IORESOURCE_MEM));
5265 err_pci_reg:
5266 err_dma:
5267 pci_disable_device(pdev);
5268 return err;
5269 }
5270
5271 /**
5272 * e1000_remove - Device Removal Routine
5273 * @pdev: PCI device information struct
5274 *
5275 * e1000_remove is called by the PCI subsystem to alert the driver
5276 * that it should release a PCI device. The could be caused by a
5277 * Hot-Plug event, or because the driver is going to be removed from
5278 * memory.
5279 **/
5280 static void __devexit e1000_remove(struct pci_dev *pdev)
5281 {
5282 struct net_device *netdev = pci_get_drvdata(pdev);
5283 struct e1000_adapter *adapter = netdev_priv(netdev);
5284
5285 /*
5286 * flush_scheduled work may reschedule our watchdog task, so
5287 * explicitly disable watchdog tasks from being rescheduled
5288 */
5289 set_bit(__E1000_DOWN, &adapter->state);
5290 del_timer_sync(&adapter->watchdog_timer);
5291 del_timer_sync(&adapter->phy_info_timer);
5292
5293 flush_scheduled_work();
5294
5295 /*
5296 * Release control of h/w to f/w. If f/w is AMT enabled, this
5297 * would have already happened in close and is redundant.
5298 */
5299 e1000_release_hw_control(adapter);
5300
5301 unregister_netdev(netdev);
5302
5303 if (!e1000_check_reset_block(&adapter->hw))
5304 e1000_phy_hw_reset(&adapter->hw);
5305
5306 e1000e_reset_interrupt_capability(adapter);
5307 kfree(adapter->tx_ring);
5308 kfree(adapter->rx_ring);
5309
5310 iounmap(adapter->hw.hw_addr);
5311 if (adapter->hw.flash_address)
5312 iounmap(adapter->hw.flash_address);
5313 pci_release_selected_regions(pdev,
5314 pci_select_bars(pdev, IORESOURCE_MEM));
5315
5316 free_netdev(netdev);
5317
5318 /* AER disable */
5319 pci_disable_pcie_error_reporting(pdev);
5320
5321 pci_disable_device(pdev);
5322 }
5323
5324 /* PCI Error Recovery (ERS) */
5325 static struct pci_error_handlers e1000_err_handler = {
5326 .error_detected = e1000_io_error_detected,
5327 .slot_reset = e1000_io_slot_reset,
5328 .resume = e1000_io_resume,
5329 };
5330
5331 static struct pci_device_id e1000_pci_tbl[] = {
5332 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5333 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5334 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5335 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5336 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5337 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
5338 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5339 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
5341
5342 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5343 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5344 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5345 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
5346
5347 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5348 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
5350
5351 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
5353 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
5354
5355 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5356 board_80003es2lan },
5357 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5358 board_80003es2lan },
5359 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5360 board_80003es2lan },
5361 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5362 board_80003es2lan },
5363
5364 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5366 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5367 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5368 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5369 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5370 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
5371 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
5372
5373 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5374 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5375 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5376 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5377 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
5378 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
5379 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5380 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5381 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5382
5383 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5384 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5385 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
5386
5387 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5388 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5389
5390 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5391 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5392 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5393 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5394
5395 { } /* terminate list */
5396 };
5397 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5398
5399 /* PCI Device API Driver */
5400 static struct pci_driver e1000_driver = {
5401 .name = e1000e_driver_name,
5402 .id_table = e1000_pci_tbl,
5403 .probe = e1000_probe,
5404 .remove = __devexit_p(e1000_remove),
5405 #ifdef CONFIG_PM
5406 /* Power Management Hooks */
5407 .suspend = e1000_suspend,
5408 .resume = e1000_resume,
5409 #endif
5410 .shutdown = e1000_shutdown,
5411 .err_handler = &e1000_err_handler
5412 };
5413
5414 /**
5415 * e1000_init_module - Driver Registration Routine
5416 *
5417 * e1000_init_module is the first routine called when the driver is
5418 * loaded. All it does is register with the PCI subsystem.
5419 **/
5420 static int __init e1000_init_module(void)
5421 {
5422 int ret;
5423 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5424 e1000e_driver_name, e1000e_driver_version);
5425 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
5426 e1000e_driver_name);
5427 ret = pci_register_driver(&e1000_driver);
5428 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
5429 PM_QOS_DEFAULT_VALUE);
5430
5431 return ret;
5432 }
5433 module_init(e1000_init_module);
5434
5435 /**
5436 * e1000_exit_module - Driver Exit Cleanup Routine
5437 *
5438 * e1000_exit_module is called just before the driver is removed
5439 * from memory.
5440 **/
5441 static void __exit e1000_exit_module(void)
5442 {
5443 pci_unregister_driver(&e1000_driver);
5444 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
5445 }
5446 module_exit(e1000_exit_module);
5447
5448
5449 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5450 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5451 MODULE_LICENSE("GPL");
5452 MODULE_VERSION(DRV_VERSION);
5453
5454 /* e1000_main.c */
Linux with added FPC-III support