drivers/gpu/drm/msm/msm_drv.h

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef __MSM_DRV_H__
  19 #define __MSM_DRV_H__
  20
  21 #include <linux/kernel.h>
  22 #include <linux/clk.h>
  23 #include <linux/cpufreq.h>
  24 #include <linux/module.h>
  25 #include <linux/component.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/pm.h>
  28 #include <linux/pm_runtime.h>
  29 #include <linux/slab.h>
  30 #include <linux/list.h>
  31 #include <linux/iommu.h>
  32 #include <linux/types.h>
  33 #include <linux/of_graph.h>
  34 #include <linux/of_device.h>
  35 #include <asm/sizes.h>
  36
  37 #include <drm/drmP.h>
  38 #include <drm/drm_atomic.h>
  39 #include <drm/drm_atomic_helper.h>
  40 #include <drm/drm_crtc_helper.h>
  41 #include <drm/drm_plane_helper.h>
  42 #include <drm/drm_fb_helper.h>
  43 #include <drm/msm_drm.h>
  44 #include <drm/drm_gem.h>
  45
  46 struct msm_kms;
  47 struct msm_gpu;
  48 struct msm_mmu;
  49 struct msm_mdss;
  50 struct msm_rd_state;
  51 struct msm_perf_state;
  52 struct msm_gem_submit;
  53 struct msm_fence_context;
  54 struct msm_fence_cb;
  55 struct msm_gem_address_space;
  56 struct msm_gem_vma;
  57
  58 struct msm_file_private {
  59         rwlock_t queuelock;
  60         struct list_head submitqueues;
  61         int queueid;
  62 };
  63
  64 enum msm_mdp_plane_property {
  65         PLANE_PROP_ZPOS,
  66         PLANE_PROP_ALPHA,
  67         PLANE_PROP_PREMULTIPLIED,
  68         PLANE_PROP_MAX_NUM
  69 };
  70
  71 struct msm_vblank_ctrl {
  72         struct work_struct work;
  73         struct list_head event_list;
  74         spinlock_t lock;
  75 };
  76
  77 #define MSM_GPU_MAX_RINGS 4
  78
  79 struct msm_drm_private {
  80
  81         struct drm_device *dev;
  82
  83         struct msm_kms *kms;
  84
  85         /* subordinate devices, if present: */
  86         struct platform_device *gpu_pdev;
  87
  88         /* top level MDSS wrapper device (for MDP5 only) */
  89         struct msm_mdss *mdss;
  90
  91         /* possibly this should be in the kms component, but it is
  92          * shared by both mdp4 and mdp5..
  93          */
  94         struct hdmi *hdmi;
  95
  96         /* eDP is for mdp5 only, but kms has not been created
  97          * when edp_bind() and edp_init() are called. Here is the only
  98          * place to keep the edp instance.
  99          */
 100         struct msm_edp *edp;
 101
 102         /* DSI is shared by mdp4 and mdp5 */
 103         struct msm_dsi *dsi[2];
 104
 105         /* when we have more than one 'msm_gpu' these need to be an array: */
 106         struct msm_gpu *gpu;
 107         struct msm_file_private *lastctx;
 108
 109         struct drm_fb_helper *fbdev;
 110
 111         struct msm_rd_state *rd;       /* debugfs to dump all submits */
 112         struct msm_rd_state *hangrd;   /* debugfs to dump hanging submits */
 113         struct msm_perf_state *perf;
 114
 115         /* list of GEM objects: */
 116         struct list_head inactive_list;
 117
 118         struct workqueue_struct *wq;
 119         struct workqueue_struct *atomic_wq;
 120
 121         /* crtcs pending async atomic updates: */
 122         uint32_t pending_crtcs;
 123         wait_queue_head_t pending_crtcs_event;
 124
 125         unsigned int num_planes;
 126         struct drm_plane *planes[16];
 127
 128         unsigned int num_crtcs;
 129         struct drm_crtc *crtcs[8];
 130
 131         unsigned int num_encoders;
 132         struct drm_encoder *encoders[8];
 133
 134         unsigned int num_bridges;
 135         struct drm_bridge *bridges[8];
 136
 137         unsigned int num_connectors;
 138         struct drm_connector *connectors[8];
 139
 140         /* Properties */
 141         struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
 142
 143         /* VRAM carveout, used when no IOMMU: */
 144         struct {
 145                 unsigned long size;
 146                 dma_addr_t paddr;
 147                 /* NOTE: mm managed at the page level, size is in # of pages
 148                  * and position mm_node->start is in # of pages:
 149                  */
 150                 struct drm_mm mm;
 151                 spinlock_t lock; /* Protects drm_mm node allocation/removal */
 152         } vram;
 153
 154         struct notifier_block vmap_notifier;
 155         struct shrinker shrinker;
 156
 157         struct msm_vblank_ctrl vblank_ctrl;
 158 };
 159
 160 struct msm_format {
 161         uint32_t pixel_format;
 162 };
 163
 164 int msm_atomic_commit(struct drm_device *dev,
 165                 struct drm_atomic_state *state, bool nonblock);
 166 struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
 167 void msm_atomic_state_clear(struct drm_atomic_state *state);
 168 void msm_atomic_state_free(struct drm_atomic_state *state);
 169
 170 void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
 171                 struct msm_gem_vma *vma, struct sg_table *sgt);
 172 int msm_gem_map_vma(struct msm_gem_address_space *aspace,
 173                 struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
 174
 175 void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
 176
 177 struct msm_gem_address_space *
 178 msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
 179                 const char *name);
 180
 181 void msm_gem_submit_free(struct msm_gem_submit *submit);
 182 int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
 183                 struct drm_file *file);
 184
 185 void msm_gem_shrinker_init(struct drm_device *dev);
 186 void msm_gem_shrinker_cleanup(struct drm_device *dev);
 187
 188 int msm_gem_mmap_obj(struct drm_gem_object *obj,
 189                         struct vm_area_struct *vma);
 190 int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
 191 int msm_gem_fault(struct vm_fault *vmf);
 192 uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
 193 int msm_gem_get_iova(struct drm_gem_object *obj,
 194                 struct msm_gem_address_space *aspace, uint64_t *iova);
 195 uint64_t msm_gem_iova(struct drm_gem_object *obj,
 196                 struct msm_gem_address_space *aspace);
 197 struct page **msm_gem_get_pages(struct drm_gem_object *obj);
 198 void msm_gem_put_pages(struct drm_gem_object *obj);
 199 void msm_gem_put_iova(struct drm_gem_object *obj,
 200                 struct msm_gem_address_space *aspace);
 201 int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
 202                 struct drm_mode_create_dumb *args);
 203 int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
 204                 uint32_t handle, uint64_t *offset);
 205 struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
 206 void *msm_gem_prime_vmap(struct drm_gem_object *obj);
 207 void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 208 int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
 209 struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj);
 210 struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
 211                 struct dma_buf_attachment *attach, struct sg_table *sg);
 212 int msm_gem_prime_pin(struct drm_gem_object *obj);
 213 void msm_gem_prime_unpin(struct drm_gem_object *obj);
 214 void *msm_gem_get_vaddr(struct drm_gem_object *obj);
 215 void *msm_gem_get_vaddr_active(struct drm_gem_object *obj);
 216 void msm_gem_put_vaddr(struct drm_gem_object *obj);
 217 int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
 218 int msm_gem_sync_object(struct drm_gem_object *obj,
 219                 struct msm_fence_context *fctx, bool exclusive);
 220 void msm_gem_move_to_active(struct drm_gem_object *obj,
 221                 struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
 222 void msm_gem_move_to_inactive(struct drm_gem_object *obj);
 223 int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
 224 int msm_gem_cpu_fini(struct drm_gem_object *obj);
 225 void msm_gem_free_object(struct drm_gem_object *obj);
 226 int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
 227                 uint32_t size, uint32_t flags, uint32_t *handle);
 228 struct drm_gem_object *msm_gem_new(struct drm_device *dev,
 229                 uint32_t size, uint32_t flags);
 230 struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
 231                 uint32_t size, uint32_t flags);
 232 void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
 233                 uint32_t flags, struct msm_gem_address_space *aspace,
 234                 struct drm_gem_object **bo, uint64_t *iova);
 235 void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
 236                 uint32_t flags, struct msm_gem_address_space *aspace,
 237                 struct drm_gem_object **bo, uint64_t *iova);
 238 struct drm_gem_object *msm_gem_import(struct drm_device *dev,
 239                 struct dma_buf *dmabuf, struct sg_table *sgt);
 240
 241 int msm_framebuffer_prepare(struct drm_framebuffer *fb,
 242                 struct msm_gem_address_space *aspace);
 243 void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
 244                 struct msm_gem_address_space *aspace);
 245 uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
 246                 struct msm_gem_address_space *aspace, int plane);
 247 struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
 248 const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
 249 struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
 250                 struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
 251 struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
 252                 int w, int h, int p, uint32_t format);
 253
 254 struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
 255 void msm_fbdev_free(struct drm_device *dev);
 256
 257 struct hdmi;
 258 int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
 259                 struct drm_encoder *encoder);
 260 void __init msm_hdmi_register(void);
 261 void __exit msm_hdmi_unregister(void);
 262
 263 struct msm_edp;
 264 void __init msm_edp_register(void);
 265 void __exit msm_edp_unregister(void);
 266 int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
 267                 struct drm_encoder *encoder);
 268
 269 struct msm_dsi;
 270 #ifdef CONFIG_DRM_MSM_DSI
 271 void __init msm_dsi_register(void);
 272 void __exit msm_dsi_unregister(void);
 273 int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
 274                          struct drm_encoder *encoder);
 275 #else
 276 static inline void __init msm_dsi_register(void)
 277 {
 278 }
 279 static inline void __exit msm_dsi_unregister(void)
 280 {
 281 }
 282 static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
 283                                        struct drm_device *dev,
 284                                        struct drm_encoder *encoder)
 285 {
 286         return -EINVAL;
 287 }
 288 #endif
 289
 290 void __init msm_mdp_register(void);
 291 void __exit msm_mdp_unregister(void);
 292
 293 #ifdef CONFIG_DEBUG_FS
 294 void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
 295 void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
 296 void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
 297 int msm_debugfs_late_init(struct drm_device *dev);
 298 int msm_rd_debugfs_init(struct drm_minor *minor);
 299 void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
 300 void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
 301                 const char *fmt, ...);
 302 int msm_perf_debugfs_init(struct drm_minor *minor);
 303 void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
 304 #else
 305 static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
 306 static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
 307                 const char *fmt, ...) {}
 308 static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
 309 static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
 310 #endif
 311
 312 struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
 313 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
 314                 const char *dbgname);
 315 void msm_writel(u32 data, void __iomem *addr);
 316 u32 msm_readl(const void __iomem *addr);
 317
 318 struct msm_gpu_submitqueue;
 319 int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
 320 struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx,
 321                 u32 id);
 322 int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx,
 323                 u32 prio, u32 flags, u32 *id);
 324 int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id);
 325 void msm_submitqueue_close(struct msm_file_private *ctx);
 326
 327 void msm_submitqueue_destroy(struct kref *kref);
 328
 329
 330 #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
 331 #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
 332
 333 static inline int align_pitch(int width, int bpp)
 334 {
 335         int bytespp = (bpp + 7) / 8;
 336         /* adreno needs pitch aligned to 32 pixels: */
 337         return bytespp * ALIGN(width, 32);
 338 }
 339
 340 /* for the generated headers: */
 341 #define INVALID_IDX(idx) ({BUG(); 0;})
 342 #define fui(x)                ({BUG(); 0;})
 343 #define util_float_to_half(x) ({BUG(); 0;})
 344
 345
 346 #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
 347
 348 /* for conditionally setting boolean flag(s): */
 349 #define COND(bool, val) ((bool) ? (val) : 0)
 350
 351 static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
 352 {
 353         ktime_t now = ktime_get();
 354         unsigned long remaining_jiffies;
 355
 356         if (ktime_compare(*timeout, now) < 0) {
 357                 remaining_jiffies = 0;
 358         } else {
 359                 ktime_t rem = ktime_sub(*timeout, now);
 360                 struct timespec ts = ktime_to_timespec(rem);
 361                 remaining_jiffies = timespec_to_jiffies(&ts);
 362         }
 363
 364         return remaining_jiffies;
 365 }
 366
 367 #endif /* __MSM_DRV_H__ */