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bpf: Prevent memory disambiguation attack
[linux/fpc-iii.git] / drivers / gpu / drm / tegra / drm.c
blob7fcf4a24284088ba798296016797032f70e5fa96
1 /*
2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/bitops.h>
11 #include <linux/host1x.h>
12 #include <linux/idr.h>
13 #include <linux/iommu.h>
14
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
17
18 #include "drm.h"
19 #include "gem.h"
20
21 #define DRIVER_NAME "tegra"
22 #define DRIVER_DESC "NVIDIA Tegra graphics"
23 #define DRIVER_DATE "20120330"
24 #define DRIVER_MAJOR 0
25 #define DRIVER_MINOR 0
26 #define DRIVER_PATCHLEVEL 0
27
28 #define CARVEOUT_SZ SZ_64M
29 #define CDMA_GATHER_FETCHES_MAX_NB 16383
30
31 struct tegra_drm_file {
32 struct idr contexts;
33 struct mutex lock;
34 };
35
36 static int tegra_atomic_check(struct drm_device *drm,
37 struct drm_atomic_state *state)
38 {
39 int err;
40
41 err = drm_atomic_helper_check_modeset(drm, state);
42 if (err < 0)
43 return err;
44
45 err = drm_atomic_normalize_zpos(drm, state);
46 if (err < 0)
47 return err;
48
49 err = drm_atomic_helper_check_planes(drm, state);
50 if (err < 0)
51 return err;
52
53 if (state->legacy_cursor_update)
54 state->async_update = !drm_atomic_helper_async_check(drm, state);
55
56 return 0;
57 }
58
59 static struct drm_atomic_state *
60 tegra_atomic_state_alloc(struct drm_device *drm)
61 {
62 struct tegra_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
63
64 if (!state || drm_atomic_state_init(drm, &state->base) < 0) {
65 kfree(state);
66 return NULL;
67 }
68
69 return &state->base;
70 }
71
72 static void tegra_atomic_state_clear(struct drm_atomic_state *state)
73 {
74 struct tegra_atomic_state *tegra = to_tegra_atomic_state(state);
75
76 drm_atomic_state_default_clear(state);
77 tegra->clk_disp = NULL;
78 tegra->dc = NULL;
79 tegra->rate = 0;
80 }
81
82 static void tegra_atomic_state_free(struct drm_atomic_state *state)
83 {
84 drm_atomic_state_default_release(state);
85 kfree(state);
86 }
87
88 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
89 .fb_create = tegra_fb_create,
90 #ifdef CONFIG_DRM_FBDEV_EMULATION
91 .output_poll_changed = drm_fb_helper_output_poll_changed,
92 #endif
93 .atomic_check = tegra_atomic_check,
94 .atomic_commit = drm_atomic_helper_commit,
95 .atomic_state_alloc = tegra_atomic_state_alloc,
96 .atomic_state_clear = tegra_atomic_state_clear,
97 .atomic_state_free = tegra_atomic_state_free,
98 };
99
100 static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
101 {
102 struct drm_device *drm = old_state->dev;
103 struct tegra_drm *tegra = drm->dev_private;
104
105 if (tegra->hub) {
106 drm_atomic_helper_commit_modeset_disables(drm, old_state);
107 tegra_display_hub_atomic_commit(drm, old_state);
108 drm_atomic_helper_commit_planes(drm, old_state, 0);
109 drm_atomic_helper_commit_modeset_enables(drm, old_state);
110 drm_atomic_helper_commit_hw_done(old_state);
111 drm_atomic_helper_wait_for_vblanks(drm, old_state);
112 drm_atomic_helper_cleanup_planes(drm, old_state);
113 } else {
114 drm_atomic_helper_commit_tail_rpm(old_state);
115 }
116 }
117
118 static const struct drm_mode_config_helper_funcs
119 tegra_drm_mode_config_helpers = {
120 .atomic_commit_tail = tegra_atomic_commit_tail,
121 };
122
123 static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
124 {
125 struct host1x_device *device = to_host1x_device(drm->dev);
126 struct tegra_drm *tegra;
127 int err;
128
129 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
130 if (!tegra)
131 return -ENOMEM;
132
133 if (iommu_present(&platform_bus_type)) {
134 u64 carveout_start, carveout_end, gem_start, gem_end;
135 struct iommu_domain_geometry *geometry;
136 unsigned long order;
137
138 tegra->domain = iommu_domain_alloc(&platform_bus_type);
139 if (!tegra->domain) {
140 err = -ENOMEM;
141 goto free;
142 }
143
144 geometry = &tegra->domain->geometry;
145 gem_start = geometry->aperture_start;
146 gem_end = geometry->aperture_end - CARVEOUT_SZ;
147 carveout_start = gem_end + 1;
148 carveout_end = geometry->aperture_end;
149
150 order = __ffs(tegra->domain->pgsize_bitmap);
151 init_iova_domain(&tegra->carveout.domain, 1UL << order,
152 carveout_start >> order);
153
154 tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
155 tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
156
157 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
158 mutex_init(&tegra->mm_lock);
159
160 DRM_DEBUG("IOMMU apertures:\n");
161 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
162 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
163 carveout_end);
164 }
165
166 mutex_init(&tegra->clients_lock);
167 INIT_LIST_HEAD(&tegra->clients);
168
169 drm->dev_private = tegra;
170 tegra->drm = drm;
171
172 drm_mode_config_init(drm);
173
174 drm->mode_config.min_width = 0;
175 drm->mode_config.min_height = 0;
176
177 drm->mode_config.max_width = 4096;
178 drm->mode_config.max_height = 4096;
179
180 drm->mode_config.allow_fb_modifiers = true;
181
182 drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
183 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
184
185 err = tegra_drm_fb_prepare(drm);
186 if (err < 0)
187 goto config;
188
189 drm_kms_helper_poll_init(drm);
190
191 err = host1x_device_init(device);
192 if (err < 0)
193 goto fbdev;
194
195 if (tegra->hub) {
196 err = tegra_display_hub_prepare(tegra->hub);
197 if (err < 0)
198 goto device;
199 }
200
201 /*
202 * We don't use the drm_irq_install() helpers provided by the DRM
203 * core, so we need to set this manually in order to allow the
204 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
205 */
206 drm->irq_enabled = true;
207
208 /* syncpoints are used for full 32-bit hardware VBLANK counters */
209 drm->max_vblank_count = 0xffffffff;
210
211 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
212 if (err < 0)
213 goto hub;
214
215 drm_mode_config_reset(drm);
216
217 err = tegra_drm_fb_init(drm);
218 if (err < 0)
219 goto hub;
220
221 return 0;
222
223 hub:
224 if (tegra->hub)
225 tegra_display_hub_cleanup(tegra->hub);
226 device:
227 host1x_device_exit(device);
228 fbdev:
229 drm_kms_helper_poll_fini(drm);
230 tegra_drm_fb_free(drm);
231 config:
232 drm_mode_config_cleanup(drm);
233
234 if (tegra->domain) {
235 iommu_domain_free(tegra->domain);
236 drm_mm_takedown(&tegra->mm);
237 mutex_destroy(&tegra->mm_lock);
238 put_iova_domain(&tegra->carveout.domain);
239 }
240 free:
241 kfree(tegra);
242 return err;
243 }
244
245 static void tegra_drm_unload(struct drm_device *drm)
246 {
247 struct host1x_device *device = to_host1x_device(drm->dev);
248 struct tegra_drm *tegra = drm->dev_private;
249 int err;
250
251 drm_kms_helper_poll_fini(drm);
252 tegra_drm_fb_exit(drm);
253 drm_atomic_helper_shutdown(drm);
254 drm_mode_config_cleanup(drm);
255
256 err = host1x_device_exit(device);
257 if (err < 0)
258 return;
259
260 if (tegra->domain) {
261 iommu_domain_free(tegra->domain);
262 drm_mm_takedown(&tegra->mm);
263 mutex_destroy(&tegra->mm_lock);
264 put_iova_domain(&tegra->carveout.domain);
265 }
266
267 kfree(tegra);
268 }
269
270 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
271 {
272 struct tegra_drm_file *fpriv;
273
274 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
275 if (!fpriv)
276 return -ENOMEM;
277
278 idr_init(&fpriv->contexts);
279 mutex_init(&fpriv->lock);
280 filp->driver_priv = fpriv;
281
282 return 0;
283 }
284
285 static void tegra_drm_context_free(struct tegra_drm_context *context)
286 {
287 context->client->ops->close_channel(context);
288 kfree(context);
289 }
290
291 static struct host1x_bo *
292 host1x_bo_lookup(struct drm_file *file, u32 handle)
293 {
294 struct drm_gem_object *gem;
295 struct tegra_bo *bo;
296
297 gem = drm_gem_object_lookup(file, handle);
298 if (!gem)
299 return NULL;
300
301 bo = to_tegra_bo(gem);
302 return &bo->base;
303 }
304
305 static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
306 struct drm_tegra_reloc __user *src,
307 struct drm_device *drm,
308 struct drm_file *file)
309 {
310 u32 cmdbuf, target;
311 int err;
312
313 err = get_user(cmdbuf, &src->cmdbuf.handle);
314 if (err < 0)
315 return err;
316
317 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
318 if (err < 0)
319 return err;
320
321 err = get_user(target, &src->target.handle);
322 if (err < 0)
323 return err;
324
325 err = get_user(dest->target.offset, &src->target.offset);
326 if (err < 0)
327 return err;
328
329 err = get_user(dest->shift, &src->shift);
330 if (err < 0)
331 return err;
332
333 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
334 if (!dest->cmdbuf.bo)
335 return -ENOENT;
336
337 dest->target.bo = host1x_bo_lookup(file, target);
338 if (!dest->target.bo)
339 return -ENOENT;
340
341 return 0;
342 }
343
344 static int host1x_waitchk_copy_from_user(struct host1x_waitchk *dest,
345 struct drm_tegra_waitchk __user *src,
346 struct drm_file *file)
347 {
348 u32 cmdbuf;
349 int err;
350
351 err = get_user(cmdbuf, &src->handle);
352 if (err < 0)
353 return err;
354
355 err = get_user(dest->offset, &src->offset);
356 if (err < 0)
357 return err;
358
359 err = get_user(dest->syncpt_id, &src->syncpt);
360 if (err < 0)
361 return err;
362
363 err = get_user(dest->thresh, &src->thresh);
364 if (err < 0)
365 return err;
366
367 dest->bo = host1x_bo_lookup(file, cmdbuf);
368 if (!dest->bo)
369 return -ENOENT;
370
371 return 0;
372 }
373
374 int tegra_drm_submit(struct tegra_drm_context *context,
375 struct drm_tegra_submit *args, struct drm_device *drm,
376 struct drm_file *file)
377 {
378 unsigned int num_cmdbufs = args->num_cmdbufs;
379 unsigned int num_relocs = args->num_relocs;
380 unsigned int num_waitchks = args->num_waitchks;
381 struct drm_tegra_cmdbuf __user *user_cmdbufs;
382 struct drm_tegra_reloc __user *user_relocs;
383 struct drm_tegra_waitchk __user *user_waitchks;
384 struct drm_tegra_syncpt __user *user_syncpt;
385 struct drm_tegra_syncpt syncpt;
386 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
387 struct drm_gem_object **refs;
388 struct host1x_syncpt *sp;
389 struct host1x_job *job;
390 unsigned int num_refs;
391 int err;
392
393 user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
394 user_relocs = u64_to_user_ptr(args->relocs);
395 user_waitchks = u64_to_user_ptr(args->waitchks);
396 user_syncpt = u64_to_user_ptr(args->syncpts);
397
398 /* We don't yet support other than one syncpt_incr struct per submit */
399 if (args->num_syncpts != 1)
400 return -EINVAL;
401
402 /* We don't yet support waitchks */
403 if (args->num_waitchks != 0)
404 return -EINVAL;
405
406 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
407 args->num_relocs, args->num_waitchks);
408 if (!job)
409 return -ENOMEM;
410
411 job->num_relocs = args->num_relocs;
412 job->num_waitchk = args->num_waitchks;
413 job->client = (u32)args->context;
414 job->class = context->client->base.class;
415 job->serialize = true;
416
417 /*
418 * Track referenced BOs so that they can be unreferenced after the
419 * submission is complete.
420 */
421 num_refs = num_cmdbufs + num_relocs * 2 + num_waitchks;
422
423 refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
424 if (!refs) {
425 err = -ENOMEM;
426 goto put;
427 }
428
429 /* reuse as an iterator later */
430 num_refs = 0;
431
432 while (num_cmdbufs) {
433 struct drm_tegra_cmdbuf cmdbuf;
434 struct host1x_bo *bo;
435 struct tegra_bo *obj;
436 u64 offset;
437
438 if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
439 err = -EFAULT;
440 goto fail;
441 }
442
443 /*
444 * The maximum number of CDMA gather fetches is 16383, a higher
445 * value means the words count is malformed.
446 */
447 if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
448 err = -EINVAL;
449 goto fail;
450 }
451
452 bo = host1x_bo_lookup(file, cmdbuf.handle);
453 if (!bo) {
454 err = -ENOENT;
455 goto fail;
456 }
457
458 offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
459 obj = host1x_to_tegra_bo(bo);
460 refs[num_refs++] = &obj->gem;
461
462 /*
463 * Gather buffer base address must be 4-bytes aligned,
464 * unaligned offset is malformed and cause commands stream
465 * corruption on the buffer address relocation.
466 */
467 if (offset & 3 || offset >= obj->gem.size) {
468 err = -EINVAL;
469 goto fail;
470 }
471
472 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
473 num_cmdbufs--;
474 user_cmdbufs++;
475 }
476
477 /* copy and resolve relocations from submit */
478 while (num_relocs--) {
479 struct host1x_reloc *reloc;
480 struct tegra_bo *obj;
481
482 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
483 &user_relocs[num_relocs], drm,
484 file);
485 if (err < 0)
486 goto fail;
487
488 reloc = &job->relocarray[num_relocs];
489 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
490 refs[num_refs++] = &obj->gem;
491
492 /*
493 * The unaligned cmdbuf offset will cause an unaligned write
494 * during of the relocations patching, corrupting the commands
495 * stream.
496 */
497 if (reloc->cmdbuf.offset & 3 ||
498 reloc->cmdbuf.offset >= obj->gem.size) {
499 err = -EINVAL;
500 goto fail;
501 }
502
503 obj = host1x_to_tegra_bo(reloc->target.bo);
504 refs[num_refs++] = &obj->gem;
505
506 if (reloc->target.offset >= obj->gem.size) {
507 err = -EINVAL;
508 goto fail;
509 }
510 }
511
512 /* copy and resolve waitchks from submit */
513 while (num_waitchks--) {
514 struct host1x_waitchk *wait = &job->waitchk[num_waitchks];
515 struct tegra_bo *obj;
516
517 err = host1x_waitchk_copy_from_user(
518 wait, &user_waitchks[num_waitchks], file);
519 if (err < 0)
520 goto fail;
521
522 obj = host1x_to_tegra_bo(wait->bo);
523 refs[num_refs++] = &obj->gem;
524
525 /*
526 * The unaligned offset will cause an unaligned write during
527 * of the waitchks patching, corrupting the commands stream.
528 */
529 if (wait->offset & 3 ||
530 wait->offset >= obj->gem.size) {
531 err = -EINVAL;
532 goto fail;
533 }
534 }
535
536 if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
537 err = -EFAULT;
538 goto fail;
539 }
540
541 /* check whether syncpoint ID is valid */
542 sp = host1x_syncpt_get(host1x, syncpt.id);
543 if (!sp) {
544 err = -ENOENT;
545 goto fail;
546 }
547
548 job->is_addr_reg = context->client->ops->is_addr_reg;
549 job->is_valid_class = context->client->ops->is_valid_class;
550 job->syncpt_incrs = syncpt.incrs;
551 job->syncpt_id = syncpt.id;
552 job->timeout = 10000;
553
554 if (args->timeout && args->timeout < 10000)
555 job->timeout = args->timeout;
556
557 err = host1x_job_pin(job, context->client->base.dev);
558 if (err)
559 goto fail;
560
561 err = host1x_job_submit(job);
562 if (err) {
563 host1x_job_unpin(job);
564 goto fail;
565 }
566
567 args->fence = job->syncpt_end;
568
569 fail:
570 while (num_refs--)
571 drm_gem_object_put_unlocked(refs[num_refs]);
572
573 kfree(refs);
574
575 put:
576 host1x_job_put(job);
577 return err;
578 }
579
580
581 #ifdef CONFIG_DRM_TEGRA_STAGING
582 static int tegra_gem_create(struct drm_device *drm, void *data,
583 struct drm_file *file)
584 {
585 struct drm_tegra_gem_create *args = data;
586 struct tegra_bo *bo;
587
588 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
589 &args->handle);
590 if (IS_ERR(bo))
591 return PTR_ERR(bo);
592
593 return 0;
594 }
595
596 static int tegra_gem_mmap(struct drm_device *drm, void *data,
597 struct drm_file *file)
598 {
599 struct drm_tegra_gem_mmap *args = data;
600 struct drm_gem_object *gem;
601 struct tegra_bo *bo;
602
603 gem = drm_gem_object_lookup(file, args->handle);
604 if (!gem)
605 return -EINVAL;
606
607 bo = to_tegra_bo(gem);
608
609 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
610
611 drm_gem_object_put_unlocked(gem);
612
613 return 0;
614 }
615
616 static int tegra_syncpt_read(struct drm_device *drm, void *data,
617 struct drm_file *file)
618 {
619 struct host1x *host = dev_get_drvdata(drm->dev->parent);
620 struct drm_tegra_syncpt_read *args = data;
621 struct host1x_syncpt *sp;
622
623 sp = host1x_syncpt_get(host, args->id);
624 if (!sp)
625 return -EINVAL;
626
627 args->value = host1x_syncpt_read_min(sp);
628 return 0;
629 }
630
631 static int tegra_syncpt_incr(struct drm_device *drm, void *data,
632 struct drm_file *file)
633 {
634 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
635 struct drm_tegra_syncpt_incr *args = data;
636 struct host1x_syncpt *sp;
637
638 sp = host1x_syncpt_get(host1x, args->id);
639 if (!sp)
640 return -EINVAL;
641
642 return host1x_syncpt_incr(sp);
643 }
644
645 static int tegra_syncpt_wait(struct drm_device *drm, void *data,
646 struct drm_file *file)
647 {
648 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
649 struct drm_tegra_syncpt_wait *args = data;
650 struct host1x_syncpt *sp;
651
652 sp = host1x_syncpt_get(host1x, args->id);
653 if (!sp)
654 return -EINVAL;
655
656 return host1x_syncpt_wait(sp, args->thresh,
657 msecs_to_jiffies(args->timeout),
658 &args->value);
659 }
660
661 static int tegra_client_open(struct tegra_drm_file *fpriv,
662 struct tegra_drm_client *client,
663 struct tegra_drm_context *context)
664 {
665 int err;
666
667 err = client->ops->open_channel(client, context);
668 if (err < 0)
669 return err;
670
671 err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
672 if (err < 0) {
673 client->ops->close_channel(context);
674 return err;
675 }
676
677 context->client = client;
678 context->id = err;
679
680 return 0;
681 }
682
683 static int tegra_open_channel(struct drm_device *drm, void *data,
684 struct drm_file *file)
685 {
686 struct tegra_drm_file *fpriv = file->driver_priv;
687 struct tegra_drm *tegra = drm->dev_private;
688 struct drm_tegra_open_channel *args = data;
689 struct tegra_drm_context *context;
690 struct tegra_drm_client *client;
691 int err = -ENODEV;
692
693 context = kzalloc(sizeof(*context), GFP_KERNEL);
694 if (!context)
695 return -ENOMEM;
696
697 mutex_lock(&fpriv->lock);
698
699 list_for_each_entry(client, &tegra->clients, list)
700 if (client->base.class == args->client) {
701 err = tegra_client_open(fpriv, client, context);
702 if (err < 0)
703 break;
704
705 args->context = context->id;
706 break;
707 }
708
709 if (err < 0)
710 kfree(context);
711
712 mutex_unlock(&fpriv->lock);
713 return err;
714 }
715
716 static int tegra_close_channel(struct drm_device *drm, void *data,
717 struct drm_file *file)
718 {
719 struct tegra_drm_file *fpriv = file->driver_priv;
720 struct drm_tegra_close_channel *args = data;
721 struct tegra_drm_context *context;
722 int err = 0;
723
724 mutex_lock(&fpriv->lock);
725
726 context = idr_find(&fpriv->contexts, args->context);
727 if (!context) {
728 err = -EINVAL;
729 goto unlock;
730 }
731
732 idr_remove(&fpriv->contexts, context->id);
733 tegra_drm_context_free(context);
734
735 unlock:
736 mutex_unlock(&fpriv->lock);
737 return err;
738 }
739
740 static int tegra_get_syncpt(struct drm_device *drm, void *data,
741 struct drm_file *file)
742 {
743 struct tegra_drm_file *fpriv = file->driver_priv;
744 struct drm_tegra_get_syncpt *args = data;
745 struct tegra_drm_context *context;
746 struct host1x_syncpt *syncpt;
747 int err = 0;
748
749 mutex_lock(&fpriv->lock);
750
751 context = idr_find(&fpriv->contexts, args->context);
752 if (!context) {
753 err = -ENODEV;
754 goto unlock;
755 }
756
757 if (args->index >= context->client->base.num_syncpts) {
758 err = -EINVAL;
759 goto unlock;
760 }
761
762 syncpt = context->client->base.syncpts[args->index];
763 args->id = host1x_syncpt_id(syncpt);
764
765 unlock:
766 mutex_unlock(&fpriv->lock);
767 return err;
768 }
769
770 static int tegra_submit(struct drm_device *drm, void *data,
771 struct drm_file *file)
772 {
773 struct tegra_drm_file *fpriv = file->driver_priv;
774 struct drm_tegra_submit *args = data;
775 struct tegra_drm_context *context;
776 int err;
777
778 mutex_lock(&fpriv->lock);
779
780 context = idr_find(&fpriv->contexts, args->context);
781 if (!context) {
782 err = -ENODEV;
783 goto unlock;
784 }
785
786 err = context->client->ops->submit(context, args, drm, file);
787
788 unlock:
789 mutex_unlock(&fpriv->lock);
790 return err;
791 }
792
793 static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
794 struct drm_file *file)
795 {
796 struct tegra_drm_file *fpriv = file->driver_priv;
797 struct drm_tegra_get_syncpt_base *args = data;
798 struct tegra_drm_context *context;
799 struct host1x_syncpt_base *base;
800 struct host1x_syncpt *syncpt;
801 int err = 0;
802
803 mutex_lock(&fpriv->lock);
804
805 context = idr_find(&fpriv->contexts, args->context);
806 if (!context) {
807 err = -ENODEV;
808 goto unlock;
809 }
810
811 if (args->syncpt >= context->client->base.num_syncpts) {
812 err = -EINVAL;
813 goto unlock;
814 }
815
816 syncpt = context->client->base.syncpts[args->syncpt];
817
818 base = host1x_syncpt_get_base(syncpt);
819 if (!base) {
820 err = -ENXIO;
821 goto unlock;
822 }
823
824 args->id = host1x_syncpt_base_id(base);
825
826 unlock:
827 mutex_unlock(&fpriv->lock);
828 return err;
829 }
830
831 static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
832 struct drm_file *file)
833 {
834 struct drm_tegra_gem_set_tiling *args = data;
835 enum tegra_bo_tiling_mode mode;
836 struct drm_gem_object *gem;
837 unsigned long value = 0;
838 struct tegra_bo *bo;
839
840 switch (args->mode) {
841 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
842 mode = TEGRA_BO_TILING_MODE_PITCH;
843
844 if (args->value != 0)
845 return -EINVAL;
846
847 break;
848
849 case DRM_TEGRA_GEM_TILING_MODE_TILED:
850 mode = TEGRA_BO_TILING_MODE_TILED;
851
852 if (args->value != 0)
853 return -EINVAL;
854
855 break;
856
857 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
858 mode = TEGRA_BO_TILING_MODE_BLOCK;
859
860 if (args->value > 5)
861 return -EINVAL;
862
863 value = args->value;
864 break;
865
866 default:
867 return -EINVAL;
868 }
869
870 gem = drm_gem_object_lookup(file, args->handle);
871 if (!gem)
872 return -ENOENT;
873
874 bo = to_tegra_bo(gem);
875
876 bo->tiling.mode = mode;
877 bo->tiling.value = value;
878
879 drm_gem_object_put_unlocked(gem);
880
881 return 0;
882 }
883
884 static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
885 struct drm_file *file)
886 {
887 struct drm_tegra_gem_get_tiling *args = data;
888 struct drm_gem_object *gem;
889 struct tegra_bo *bo;
890 int err = 0;
891
892 gem = drm_gem_object_lookup(file, args->handle);
893 if (!gem)
894 return -ENOENT;
895
896 bo = to_tegra_bo(gem);
897
898 switch (bo->tiling.mode) {
899 case TEGRA_BO_TILING_MODE_PITCH:
900 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
901 args->value = 0;
902 break;
903
904 case TEGRA_BO_TILING_MODE_TILED:
905 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
906 args->value = 0;
907 break;
908
909 case TEGRA_BO_TILING_MODE_BLOCK:
910 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
911 args->value = bo->tiling.value;
912 break;
913
914 default:
915 err = -EINVAL;
916 break;
917 }
918
919 drm_gem_object_put_unlocked(gem);
920
921 return err;
922 }
923
924 static int tegra_gem_set_flags(struct drm_device *drm, void *data,
925 struct drm_file *file)
926 {
927 struct drm_tegra_gem_set_flags *args = data;
928 struct drm_gem_object *gem;
929 struct tegra_bo *bo;
930
931 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
932 return -EINVAL;
933
934 gem = drm_gem_object_lookup(file, args->handle);
935 if (!gem)
936 return -ENOENT;
937
938 bo = to_tegra_bo(gem);
939 bo->flags = 0;
940
941 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
942 bo->flags |= TEGRA_BO_BOTTOM_UP;
943
944 drm_gem_object_put_unlocked(gem);
945
946 return 0;
947 }
948
949 static int tegra_gem_get_flags(struct drm_device *drm, void *data,
950 struct drm_file *file)
951 {
952 struct drm_tegra_gem_get_flags *args = data;
953 struct drm_gem_object *gem;
954 struct tegra_bo *bo;
955
956 gem = drm_gem_object_lookup(file, args->handle);
957 if (!gem)
958 return -ENOENT;
959
960 bo = to_tegra_bo(gem);
961 args->flags = 0;
962
963 if (bo->flags & TEGRA_BO_BOTTOM_UP)
964 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
965
966 drm_gem_object_put_unlocked(gem);
967
968 return 0;
969 }
970 #endif
971
972 static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
973 #ifdef CONFIG_DRM_TEGRA_STAGING
974 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
975 DRM_UNLOCKED | DRM_RENDER_ALLOW),
976 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
977 DRM_UNLOCKED | DRM_RENDER_ALLOW),
978 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
979 DRM_UNLOCKED | DRM_RENDER_ALLOW),
980 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
981 DRM_UNLOCKED | DRM_RENDER_ALLOW),
982 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
983 DRM_UNLOCKED | DRM_RENDER_ALLOW),
984 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
985 DRM_UNLOCKED | DRM_RENDER_ALLOW),
986 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
987 DRM_UNLOCKED | DRM_RENDER_ALLOW),
988 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
989 DRM_UNLOCKED | DRM_RENDER_ALLOW),
990 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
991 DRM_UNLOCKED | DRM_RENDER_ALLOW),
992 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
993 DRM_UNLOCKED | DRM_RENDER_ALLOW),
994 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
995 DRM_UNLOCKED | DRM_RENDER_ALLOW),
996 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
997 DRM_UNLOCKED | DRM_RENDER_ALLOW),
998 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
999 DRM_UNLOCKED | DRM_RENDER_ALLOW),
1000 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
1001 DRM_UNLOCKED | DRM_RENDER_ALLOW),
1002 #endif
1003 };
1004
1005 static const struct file_operations tegra_drm_fops = {
1006 .owner = THIS_MODULE,
1007 .open = drm_open,
1008 .release = drm_release,
1009 .unlocked_ioctl = drm_ioctl,
1010 .mmap = tegra_drm_mmap,
1011 .poll = drm_poll,
1012 .read = drm_read,
1013 .compat_ioctl = drm_compat_ioctl,
1014 .llseek = noop_llseek,
1015 };
1016
1017 static int tegra_drm_context_cleanup(int id, void *p, void *data)
1018 {
1019 struct tegra_drm_context *context = p;
1020
1021 tegra_drm_context_free(context);
1022
1023 return 0;
1024 }
1025
1026 static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
1027 {
1028 struct tegra_drm_file *fpriv = file->driver_priv;
1029
1030 mutex_lock(&fpriv->lock);
1031 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
1032 mutex_unlock(&fpriv->lock);
1033
1034 idr_destroy(&fpriv->contexts);
1035 mutex_destroy(&fpriv->lock);
1036 kfree(fpriv);
1037 }
1038
1039 #ifdef CONFIG_DEBUG_FS
1040 static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
1041 {
1042 struct drm_info_node *node = (struct drm_info_node *)s->private;
1043 struct drm_device *drm = node->minor->dev;
1044 struct drm_framebuffer *fb;
1045
1046 mutex_lock(&drm->mode_config.fb_lock);
1047
1048 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
1049 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
1050 fb->base.id, fb->width, fb->height,
1051 fb->format->depth,
1052 fb->format->cpp[0] * 8,
1053 drm_framebuffer_read_refcount(fb));
1054 }
1055
1056 mutex_unlock(&drm->mode_config.fb_lock);
1057
1058 return 0;
1059 }
1060
1061 static int tegra_debugfs_iova(struct seq_file *s, void *data)
1062 {
1063 struct drm_info_node *node = (struct drm_info_node *)s->private;
1064 struct drm_device *drm = node->minor->dev;
1065 struct tegra_drm *tegra = drm->dev_private;
1066 struct drm_printer p = drm_seq_file_printer(s);
1067
1068 if (tegra->domain) {
1069 mutex_lock(&tegra->mm_lock);
1070 drm_mm_print(&tegra->mm, &p);
1071 mutex_unlock(&tegra->mm_lock);
1072 }
1073
1074 return 0;
1075 }
1076
1077 static struct drm_info_list tegra_debugfs_list[] = {
1078 { "framebuffers", tegra_debugfs_framebuffers, 0 },
1079 { "iova", tegra_debugfs_iova, 0 },
1080 };
1081
1082 static int tegra_debugfs_init(struct drm_minor *minor)
1083 {
1084 return drm_debugfs_create_files(tegra_debugfs_list,
1085 ARRAY_SIZE(tegra_debugfs_list),
1086 minor->debugfs_root, minor);
1087 }
1088 #endif
1089
1090 static struct drm_driver tegra_drm_driver = {
1091 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
1092 DRIVER_ATOMIC | DRIVER_RENDER,
1093 .load = tegra_drm_load,
1094 .unload = tegra_drm_unload,
1095 .open = tegra_drm_open,
1096 .postclose = tegra_drm_postclose,
1097 .lastclose = drm_fb_helper_lastclose,
1098
1099 #if defined(CONFIG_DEBUG_FS)
1100 .debugfs_init = tegra_debugfs_init,
1101 #endif
1102
1103 .gem_free_object_unlocked = tegra_bo_free_object,
1104 .gem_vm_ops = &tegra_bo_vm_ops,
1105
1106 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1107 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1108 .gem_prime_export = tegra_gem_prime_export,
1109 .gem_prime_import = tegra_gem_prime_import,
1110
1111 .dumb_create = tegra_bo_dumb_create,
1112
1113 .ioctls = tegra_drm_ioctls,
1114 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
1115 .fops = &tegra_drm_fops,
1116
1117 .name = DRIVER_NAME,
1118 .desc = DRIVER_DESC,
1119 .date = DRIVER_DATE,
1120 .major = DRIVER_MAJOR,
1121 .minor = DRIVER_MINOR,
1122 .patchlevel = DRIVER_PATCHLEVEL,
1123 };
1124
1125 int tegra_drm_register_client(struct tegra_drm *tegra,
1126 struct tegra_drm_client *client)
1127 {
1128 mutex_lock(&tegra->clients_lock);
1129 list_add_tail(&client->list, &tegra->clients);
1130 mutex_unlock(&tegra->clients_lock);
1131
1132 return 0;
1133 }
1134
1135 int tegra_drm_unregister_client(struct tegra_drm *tegra,
1136 struct tegra_drm_client *client)
1137 {
1138 mutex_lock(&tegra->clients_lock);
1139 list_del_init(&client->list);
1140 mutex_unlock(&tegra->clients_lock);
1141
1142 return 0;
1143 }
1144
1145 void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
1146 {
1147 struct iova *alloc;
1148 void *virt;
1149 gfp_t gfp;
1150 int err;
1151
1152 if (tegra->domain)
1153 size = iova_align(&tegra->carveout.domain, size);
1154 else
1155 size = PAGE_ALIGN(size);
1156
1157 gfp = GFP_KERNEL | __GFP_ZERO;
1158 if (!tegra->domain) {
1159 /*
1160 * Many units only support 32-bit addresses, even on 64-bit
1161 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1162 * virtual address space, force allocations to be in the
1163 * lower 32-bit range.
1164 */
1165 gfp |= GFP_DMA;
1166 }
1167
1168 virt = (void *)__get_free_pages(gfp, get_order(size));
1169 if (!virt)
1170 return ERR_PTR(-ENOMEM);
1171
1172 if (!tegra->domain) {
1173 /*
1174 * If IOMMU is disabled, devices address physical memory
1175 * directly.
1176 */
1177 *dma = virt_to_phys(virt);
1178 return virt;
1179 }
1180
1181 alloc = alloc_iova(&tegra->carveout.domain,
1182 size >> tegra->carveout.shift,
1183 tegra->carveout.limit, true);
1184 if (!alloc) {
1185 err = -EBUSY;
1186 goto free_pages;
1187 }
1188
1189 *dma = iova_dma_addr(&tegra->carveout.domain, alloc);
1190 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
1191 size, IOMMU_READ | IOMMU_WRITE);
1192 if (err < 0)
1193 goto free_iova;
1194
1195 return virt;
1196
1197 free_iova:
1198 __free_iova(&tegra->carveout.domain, alloc);
1199 free_pages:
1200 free_pages((unsigned long)virt, get_order(size));
1201
1202 return ERR_PTR(err);
1203 }
1204
1205 void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
1206 dma_addr_t dma)
1207 {
1208 if (tegra->domain)
1209 size = iova_align(&tegra->carveout.domain, size);
1210 else
1211 size = PAGE_ALIGN(size);
1212
1213 if (tegra->domain) {
1214 iommu_unmap(tegra->domain, dma, size);
1215 free_iova(&tegra->carveout.domain,
1216 iova_pfn(&tegra->carveout.domain, dma));
1217 }
1218
1219 free_pages((unsigned long)virt, get_order(size));
1220 }
1221
1222 static int host1x_drm_probe(struct host1x_device *dev)
1223 {
1224 struct drm_driver *driver = &tegra_drm_driver;
1225 struct drm_device *drm;
1226 int err;
1227
1228 drm = drm_dev_alloc(driver, &dev->dev);
1229 if (IS_ERR(drm))
1230 return PTR_ERR(drm);
1231
1232 dev_set_drvdata(&dev->dev, drm);
1233
1234 err = drm_dev_register(drm, 0);
1235 if (err < 0)
1236 goto unref;
1237
1238 return 0;
1239
1240 unref:
1241 drm_dev_unref(drm);
1242 return err;
1243 }
1244
1245 static int host1x_drm_remove(struct host1x_device *dev)
1246 {
1247 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1248
1249 drm_dev_unregister(drm);
1250 drm_dev_unref(drm);
1251
1252 return 0;
1253 }
1254
1255 #ifdef CONFIG_PM_SLEEP
1256 static int host1x_drm_suspend(struct device *dev)
1257 {
1258 struct drm_device *drm = dev_get_drvdata(dev);
1259 struct tegra_drm *tegra = drm->dev_private;
1260
1261 drm_kms_helper_poll_disable(drm);
1262 tegra_drm_fb_suspend(drm);
1263
1264 tegra->state = drm_atomic_helper_suspend(drm);
1265 if (IS_ERR(tegra->state)) {
1266 tegra_drm_fb_resume(drm);
1267 drm_kms_helper_poll_enable(drm);
1268 return PTR_ERR(tegra->state);
1269 }
1270
1271 return 0;
1272 }
1273
1274 static int host1x_drm_resume(struct device *dev)
1275 {
1276 struct drm_device *drm = dev_get_drvdata(dev);
1277 struct tegra_drm *tegra = drm->dev_private;
1278
1279 drm_atomic_helper_resume(drm, tegra->state);
1280 tegra_drm_fb_resume(drm);
1281 drm_kms_helper_poll_enable(drm);
1282
1283 return 0;
1284 }
1285 #endif
1286
1287 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1288 host1x_drm_resume);
1289
1290 static const struct of_device_id host1x_drm_subdevs[] = {
1291 { .compatible = "nvidia,tegra20-dc", },
1292 { .compatible = "nvidia,tegra20-hdmi", },
1293 { .compatible = "nvidia,tegra20-gr2d", },
1294 { .compatible = "nvidia,tegra20-gr3d", },
1295 { .compatible = "nvidia,tegra30-dc", },
1296 { .compatible = "nvidia,tegra30-hdmi", },
1297 { .compatible = "nvidia,tegra30-gr2d", },
1298 { .compatible = "nvidia,tegra30-gr3d", },
1299 { .compatible = "nvidia,tegra114-dsi", },
1300 { .compatible = "nvidia,tegra114-hdmi", },
1301 { .compatible = "nvidia,tegra114-gr3d", },
1302 { .compatible = "nvidia,tegra124-dc", },
1303 { .compatible = "nvidia,tegra124-sor", },
1304 { .compatible = "nvidia,tegra124-hdmi", },
1305 { .compatible = "nvidia,tegra124-dsi", },
1306 { .compatible = "nvidia,tegra124-vic", },
1307 { .compatible = "nvidia,tegra132-dsi", },
1308 { .compatible = "nvidia,tegra210-dc", },
1309 { .compatible = "nvidia,tegra210-dsi", },
1310 { .compatible = "nvidia,tegra210-sor", },
1311 { .compatible = "nvidia,tegra210-sor1", },
1312 { .compatible = "nvidia,tegra210-vic", },
1313 { .compatible = "nvidia,tegra186-display", },
1314 { .compatible = "nvidia,tegra186-dc", },
1315 { .compatible = "nvidia,tegra186-sor", },
1316 { .compatible = "nvidia,tegra186-sor1", },
1317 { .compatible = "nvidia,tegra186-vic", },
1318 { /* sentinel */ }
1319 };
1320
1321 static struct host1x_driver host1x_drm_driver = {
1322 .driver = {
1323 .name = "drm",
1324 .pm = &host1x_drm_pm_ops,
1325 },
1326 .probe = host1x_drm_probe,
1327 .remove = host1x_drm_remove,
1328 .subdevs = host1x_drm_subdevs,
1329 };
1330
1331 static struct platform_driver * const drivers[] = {
1332 &tegra_display_hub_driver,
1333 &tegra_dc_driver,
1334 &tegra_hdmi_driver,
1335 &tegra_dsi_driver,
1336 &tegra_dpaux_driver,
1337 &tegra_sor_driver,
1338 &tegra_gr2d_driver,
1339 &tegra_gr3d_driver,
1340 &tegra_vic_driver,
1341 };
1342
1343 static int __init host1x_drm_init(void)
1344 {
1345 int err;
1346
1347 err = host1x_driver_register(&host1x_drm_driver);
1348 if (err < 0)
1349 return err;
1350
1351 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
1352 if (err < 0)
1353 goto unregister_host1x;
1354
1355 return 0;
1356
1357 unregister_host1x:
1358 host1x_driver_unregister(&host1x_drm_driver);
1359 return err;
1360 }
1361 module_init(host1x_drm_init);
1362
1363 static void __exit host1x_drm_exit(void)
1364 {
1365 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
1366 host1x_driver_unregister(&host1x_drm_driver);
1367 }
1368 module_exit(host1x_drm_exit);
1369
1370 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1371 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1372 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support