?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
bpf: Prevent memory disambiguation attack
[linux/fpc-iii.git] / drivers / tty / serial / altera_uart.c
blobb88b05f8e81e25c15cc9507697ff602cb1272630
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * altera_uart.c -- Altera UART driver
4 *
5 * Based on mcf.c -- Freescale ColdFire UART driver
6 *
7 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
8 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
9 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/timer.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/console.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/serial.h>
21 #include <linux/serial_core.h>
22 #include <linux/platform_device.h>
23 #include <linux/of.h>
24 #include <linux/io.h>
25 #include <linux/altera_uart.h>
26
27 #define DRV_NAME "altera_uart"
28 #define SERIAL_ALTERA_MAJOR 204
29 #define SERIAL_ALTERA_MINOR 213
30
31 /*
32 * Altera UART register definitions according to the Nios UART datasheet:
33 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
34 */
35
36 #define ALTERA_UART_SIZE 32
37
38 #define ALTERA_UART_RXDATA_REG 0
39 #define ALTERA_UART_TXDATA_REG 4
40 #define ALTERA_UART_STATUS_REG 8
41 #define ALTERA_UART_CONTROL_REG 12
42 #define ALTERA_UART_DIVISOR_REG 16
43 #define ALTERA_UART_EOP_REG 20
44
45 #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
46 #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
47 #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
48 #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
49 #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
50 #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
51 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
52 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
53 #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
54 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
55 #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
56 #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
57
58 /* Enable interrupt on... */
59 #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
60 #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
61 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
62 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
63 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
64 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
65 #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
66 #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
67 #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
68
69 #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
70 #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
71 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
72 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
73
74 /*
75 * Local per-uart structure.
76 */
77 struct altera_uart {
78 struct uart_port port;
79 struct timer_list tmr;
80 unsigned int sigs; /* Local copy of line sigs */
81 unsigned short imr; /* Local IMR mirror */
82 };
83
84 static u32 altera_uart_readl(struct uart_port *port, int reg)
85 {
86 return readl(port->membase + (reg << port->regshift));
87 }
88
89 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
90 {
91 writel(dat, port->membase + (reg << port->regshift));
92 }
93
94 static unsigned int altera_uart_tx_empty(struct uart_port *port)
95 {
96 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
97 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
98 }
99
100 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
101 {
102 struct altera_uart *pp = container_of(port, struct altera_uart, port);
103 unsigned int sigs;
104
105 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
106 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
107 sigs |= (pp->sigs & TIOCM_RTS);
108
109 return sigs;
110 }
111
112 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
113 {
114 struct altera_uart *pp = container_of(port, struct altera_uart, port);
115
116 pp->sigs = sigs;
117 if (sigs & TIOCM_RTS)
118 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
119 else
120 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
121 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
122 }
123
124 static void altera_uart_start_tx(struct uart_port *port)
125 {
126 struct altera_uart *pp = container_of(port, struct altera_uart, port);
127
128 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
129 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
130 }
131
132 static void altera_uart_stop_tx(struct uart_port *port)
133 {
134 struct altera_uart *pp = container_of(port, struct altera_uart, port);
135
136 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
137 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
138 }
139
140 static void altera_uart_stop_rx(struct uart_port *port)
141 {
142 struct altera_uart *pp = container_of(port, struct altera_uart, port);
143
144 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
145 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
146 }
147
148 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
149 {
150 struct altera_uart *pp = container_of(port, struct altera_uart, port);
151 unsigned long flags;
152
153 spin_lock_irqsave(&port->lock, flags);
154 if (break_state == -1)
155 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
156 else
157 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
158 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
159 spin_unlock_irqrestore(&port->lock, flags);
160 }
161
162 static void altera_uart_set_termios(struct uart_port *port,
163 struct ktermios *termios,
164 struct ktermios *old)
165 {
166 unsigned long flags;
167 unsigned int baud, baudclk;
168
169 baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
170 baudclk = port->uartclk / baud;
171
172 if (old)
173 tty_termios_copy_hw(termios, old);
174 tty_termios_encode_baud_rate(termios, baud, baud);
175
176 spin_lock_irqsave(&port->lock, flags);
177 uart_update_timeout(port, termios->c_cflag, baud);
178 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
179 spin_unlock_irqrestore(&port->lock, flags);
180
181 /*
182 * FIXME: port->read_status_mask and port->ignore_status_mask
183 * need to be initialized based on termios settings for
184 * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
185 */
186 }
187
188 static void altera_uart_rx_chars(struct altera_uart *pp)
189 {
190 struct uart_port *port = &pp->port;
191 unsigned char ch, flag;
192 unsigned short status;
193
194 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
195 ALTERA_UART_STATUS_RRDY_MSK) {
196 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
197 flag = TTY_NORMAL;
198 port->icount.rx++;
199
200 if (status & ALTERA_UART_STATUS_E_MSK) {
201 altera_uart_writel(port, status,
202 ALTERA_UART_STATUS_REG);
203
204 if (status & ALTERA_UART_STATUS_BRK_MSK) {
205 port->icount.brk++;
206 if (uart_handle_break(port))
207 continue;
208 } else if (status & ALTERA_UART_STATUS_PE_MSK) {
209 port->icount.parity++;
210 } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
211 port->icount.overrun++;
212 } else if (status & ALTERA_UART_STATUS_FE_MSK) {
213 port->icount.frame++;
214 }
215
216 status &= port->read_status_mask;
217
218 if (status & ALTERA_UART_STATUS_BRK_MSK)
219 flag = TTY_BREAK;
220 else if (status & ALTERA_UART_STATUS_PE_MSK)
221 flag = TTY_PARITY;
222 else if (status & ALTERA_UART_STATUS_FE_MSK)
223 flag = TTY_FRAME;
224 }
225
226 if (uart_handle_sysrq_char(port, ch))
227 continue;
228 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
229 flag);
230 }
231
232 spin_unlock(&port->lock);
233 tty_flip_buffer_push(&port->state->port);
234 spin_lock(&port->lock);
235 }
236
237 static void altera_uart_tx_chars(struct altera_uart *pp)
238 {
239 struct uart_port *port = &pp->port;
240 struct circ_buf *xmit = &port->state->xmit;
241
242 if (port->x_char) {
243 /* Send special char - probably flow control */
244 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
245 port->x_char = 0;
246 port->icount.tx++;
247 return;
248 }
249
250 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
251 ALTERA_UART_STATUS_TRDY_MSK) {
252 if (xmit->head == xmit->tail)
253 break;
254 altera_uart_writel(port, xmit->buf[xmit->tail],
255 ALTERA_UART_TXDATA_REG);
256 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
257 port->icount.tx++;
258 }
259
260 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
261 uart_write_wakeup(port);
262
263 if (xmit->head == xmit->tail) {
264 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
265 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
266 }
267 }
268
269 static irqreturn_t altera_uart_interrupt(int irq, void *data)
270 {
271 struct uart_port *port = data;
272 struct altera_uart *pp = container_of(port, struct altera_uart, port);
273 unsigned int isr;
274
275 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
276
277 spin_lock(&port->lock);
278 if (isr & ALTERA_UART_STATUS_RRDY_MSK)
279 altera_uart_rx_chars(pp);
280 if (isr & ALTERA_UART_STATUS_TRDY_MSK)
281 altera_uart_tx_chars(pp);
282 spin_unlock(&port->lock);
283
284 return IRQ_RETVAL(isr);
285 }
286
287 static void altera_uart_timer(struct timer_list *t)
288 {
289 struct altera_uart *pp = from_timer(pp, t, tmr);
290 struct uart_port *port = &pp->port;
291
292 altera_uart_interrupt(0, port);
293 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
294 }
295
296 static void altera_uart_config_port(struct uart_port *port, int flags)
297 {
298 port->type = PORT_ALTERA_UART;
299
300 /* Clear mask, so no surprise interrupts. */
301 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
302 /* Clear status register */
303 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
304 }
305
306 static int altera_uart_startup(struct uart_port *port)
307 {
308 struct altera_uart *pp = container_of(port, struct altera_uart, port);
309 unsigned long flags;
310 int ret;
311
312 if (!port->irq) {
313 timer_setup(&pp->tmr, altera_uart_timer, 0);
314 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
315 return 0;
316 }
317
318 ret = request_irq(port->irq, altera_uart_interrupt, 0,
319 DRV_NAME, port);
320 if (ret) {
321 pr_err(DRV_NAME ": unable to attach Altera UART %d "
322 "interrupt vector=%d\n", port->line, port->irq);
323 return ret;
324 }
325
326 spin_lock_irqsave(&port->lock, flags);
327
328 /* Enable RX interrupts now */
329 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
330 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
331
332 spin_unlock_irqrestore(&port->lock, flags);
333
334 return 0;
335 }
336
337 static void altera_uart_shutdown(struct uart_port *port)
338 {
339 struct altera_uart *pp = container_of(port, struct altera_uart, port);
340 unsigned long flags;
341
342 spin_lock_irqsave(&port->lock, flags);
343
344 /* Disable all interrupts now */
345 pp->imr = 0;
346 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
347
348 spin_unlock_irqrestore(&port->lock, flags);
349
350 if (port->irq)
351 free_irq(port->irq, port);
352 else
353 del_timer_sync(&pp->tmr);
354 }
355
356 static const char *altera_uart_type(struct uart_port *port)
357 {
358 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
359 }
360
361 static int altera_uart_request_port(struct uart_port *port)
362 {
363 /* UARTs always present */
364 return 0;
365 }
366
367 static void altera_uart_release_port(struct uart_port *port)
368 {
369 /* Nothing to release... */
370 }
371
372 static int altera_uart_verify_port(struct uart_port *port,
373 struct serial_struct *ser)
374 {
375 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
376 return -EINVAL;
377 return 0;
378 }
379
380 #ifdef CONFIG_CONSOLE_POLL
381 static int altera_uart_poll_get_char(struct uart_port *port)
382 {
383 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
384 ALTERA_UART_STATUS_RRDY_MSK))
385 cpu_relax();
386
387 return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
388 }
389
390 static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
391 {
392 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
393 ALTERA_UART_STATUS_TRDY_MSK))
394 cpu_relax();
395
396 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
397 }
398 #endif
399
400 /*
401 * Define the basic serial functions we support.
402 */
403 static const struct uart_ops altera_uart_ops = {
404 .tx_empty = altera_uart_tx_empty,
405 .get_mctrl = altera_uart_get_mctrl,
406 .set_mctrl = altera_uart_set_mctrl,
407 .start_tx = altera_uart_start_tx,
408 .stop_tx = altera_uart_stop_tx,
409 .stop_rx = altera_uart_stop_rx,
410 .break_ctl = altera_uart_break_ctl,
411 .startup = altera_uart_startup,
412 .shutdown = altera_uart_shutdown,
413 .set_termios = altera_uart_set_termios,
414 .type = altera_uart_type,
415 .request_port = altera_uart_request_port,
416 .release_port = altera_uart_release_port,
417 .config_port = altera_uart_config_port,
418 .verify_port = altera_uart_verify_port,
419 #ifdef CONFIG_CONSOLE_POLL
420 .poll_get_char = altera_uart_poll_get_char,
421 .poll_put_char = altera_uart_poll_put_char,
422 #endif
423 };
424
425 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
426
427 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
428
429 static void altera_uart_console_putc(struct uart_port *port, int c)
430 {
431 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
432 ALTERA_UART_STATUS_TRDY_MSK))
433 cpu_relax();
434
435 writel(c, port->membase + ALTERA_UART_TXDATA_REG);
436 }
437
438 static void altera_uart_console_write(struct console *co, const char *s,
439 unsigned int count)
440 {
441 struct uart_port *port = &(altera_uart_ports + co->index)->port;
442
443 uart_console_write(port, s, count, altera_uart_console_putc);
444 }
445
446 static int __init altera_uart_console_setup(struct console *co, char *options)
447 {
448 struct uart_port *port;
449 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
450 int bits = 8;
451 int parity = 'n';
452 int flow = 'n';
453
454 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
455 return -EINVAL;
456 port = &altera_uart_ports[co->index].port;
457 if (!port->membase)
458 return -ENODEV;
459
460 if (options)
461 uart_parse_options(options, &baud, &parity, &bits, &flow);
462
463 return uart_set_options(port, co, baud, parity, bits, flow);
464 }
465
466 static struct uart_driver altera_uart_driver;
467
468 static struct console altera_uart_console = {
469 .name = "ttyAL",
470 .write = altera_uart_console_write,
471 .device = uart_console_device,
472 .setup = altera_uart_console_setup,
473 .flags = CON_PRINTBUFFER,
474 .index = -1,
475 .data = &altera_uart_driver,
476 };
477
478 static int __init altera_uart_console_init(void)
479 {
480 register_console(&altera_uart_console);
481 return 0;
482 }
483
484 console_initcall(altera_uart_console_init);
485
486 #define ALTERA_UART_CONSOLE (&altera_uart_console)
487
488 static void altera_uart_earlycon_write(struct console *co, const char *s,
489 unsigned int count)
490 {
491 struct earlycon_device *dev = co->data;
492
493 uart_console_write(&dev->port, s, count, altera_uart_console_putc);
494 }
495
496 static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
497 const char *options)
498 {
499 struct uart_port *port = &dev->port;
500
501 if (!port->membase)
502 return -ENODEV;
503
504 /* Enable RX interrupts now */
505 writel(ALTERA_UART_CONTROL_RRDY_MSK,
506 port->membase + ALTERA_UART_CONTROL_REG);
507
508 if (dev->baud) {
509 unsigned int baudclk = port->uartclk / dev->baud;
510
511 writel(baudclk, port->membase + ALTERA_UART_DIVISOR_REG);
512 }
513
514 dev->con->write = altera_uart_earlycon_write;
515 return 0;
516 }
517
518 OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
519
520 #else
521
522 #define ALTERA_UART_CONSOLE NULL
523
524 #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
525
526 /*
527 * Define the altera_uart UART driver structure.
528 */
529 static struct uart_driver altera_uart_driver = {
530 .owner = THIS_MODULE,
531 .driver_name = DRV_NAME,
532 .dev_name = "ttyAL",
533 .major = SERIAL_ALTERA_MAJOR,
534 .minor = SERIAL_ALTERA_MINOR,
535 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
536 .cons = ALTERA_UART_CONSOLE,
537 };
538
539 static int altera_uart_probe(struct platform_device *pdev)
540 {
541 struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
542 struct uart_port *port;
543 struct resource *res_mem;
544 struct resource *res_irq;
545 int i = pdev->id;
546 int ret;
547
548 /* if id is -1 scan for a free id and use that one */
549 if (i == -1) {
550 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
551 if (altera_uart_ports[i].port.mapbase == 0)
552 break;
553 }
554
555 if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
556 return -EINVAL;
557
558 port = &altera_uart_ports[i].port;
559
560 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
561 if (res_mem)
562 port->mapbase = res_mem->start;
563 else if (platp)
564 port->mapbase = platp->mapbase;
565 else
566 return -EINVAL;
567
568 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
569 if (res_irq)
570 port->irq = res_irq->start;
571 else if (platp)
572 port->irq = platp->irq;
573
574 /* Check platform data first so we can override device node data */
575 if (platp)
576 port->uartclk = platp->uartclk;
577 else {
578 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
579 &port->uartclk);
580 if (ret)
581 return ret;
582 }
583
584 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
585 if (!port->membase)
586 return -ENOMEM;
587
588 if (platp)
589 port->regshift = platp->bus_shift;
590 else
591 port->regshift = 0;
592
593 port->line = i;
594 port->type = PORT_ALTERA_UART;
595 port->iotype = SERIAL_IO_MEM;
596 port->ops = &altera_uart_ops;
597 port->flags = UPF_BOOT_AUTOCONF;
598 port->dev = &pdev->dev;
599
600 platform_set_drvdata(pdev, port);
601
602 uart_add_one_port(&altera_uart_driver, port);
603
604 return 0;
605 }
606
607 static int altera_uart_remove(struct platform_device *pdev)
608 {
609 struct uart_port *port = platform_get_drvdata(pdev);
610
611 if (port) {
612 uart_remove_one_port(&altera_uart_driver, port);
613 port->mapbase = 0;
614 iounmap(port->membase);
615 }
616
617 return 0;
618 }
619
620 #ifdef CONFIG_OF
621 static const struct of_device_id altera_uart_match[] = {
622 { .compatible = "ALTR,uart-1.0", },
623 { .compatible = "altr,uart-1.0", },
624 {},
625 };
626 MODULE_DEVICE_TABLE(of, altera_uart_match);
627 #endif /* CONFIG_OF */
628
629 static struct platform_driver altera_uart_platform_driver = {
630 .probe = altera_uart_probe,
631 .remove = altera_uart_remove,
632 .driver = {
633 .name = DRV_NAME,
634 .of_match_table = of_match_ptr(altera_uart_match),
635 },
636 };
637
638 static int __init altera_uart_init(void)
639 {
640 int rc;
641
642 rc = uart_register_driver(&altera_uart_driver);
643 if (rc)
644 return rc;
645 rc = platform_driver_register(&altera_uart_platform_driver);
646 if (rc)
647 uart_unregister_driver(&altera_uart_driver);
648 return rc;
649 }
650
651 static void __exit altera_uart_exit(void)
652 {
653 platform_driver_unregister(&altera_uart_platform_driver);
654 uart_unregister_driver(&altera_uart_driver);
655 }
656
657 module_init(altera_uart_init);
658 module_exit(altera_uart_exit);
659
660 MODULE_DESCRIPTION("Altera UART driver");
661 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
662 MODULE_LICENSE("GPL");
663 MODULE_ALIAS("platform:" DRV_NAME);
664 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
Linux with added FPC-III support