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bpf: Prevent memory disambiguation attack
[linux/fpc-iii.git] / tools / perf / util / intel-pt.c
blob0979a6e8b2b7eefe39940dbfd52f776033df23a4
1 /*
2 * intel_pt.c: Intel Processor Trace support
3 * Copyright (c) 2013-2015, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 */
15
16 #include <inttypes.h>
17 #include <stdio.h>
18 #include <stdbool.h>
19 #include <errno.h>
20 #include <linux/kernel.h>
21 #include <linux/types.h>
22
23 #include "../perf.h"
24 #include "session.h"
25 #include "machine.h"
26 #include "memswap.h"
27 #include "sort.h"
28 #include "tool.h"
29 #include "event.h"
30 #include "evlist.h"
31 #include "evsel.h"
32 #include "map.h"
33 #include "color.h"
34 #include "util.h"
35 #include "thread.h"
36 #include "thread-stack.h"
37 #include "symbol.h"
38 #include "callchain.h"
39 #include "dso.h"
40 #include "debug.h"
41 #include "auxtrace.h"
42 #include "tsc.h"
43 #include "intel-pt.h"
44 #include "config.h"
45
46 #include "intel-pt-decoder/intel-pt-log.h"
47 #include "intel-pt-decoder/intel-pt-decoder.h"
48 #include "intel-pt-decoder/intel-pt-insn-decoder.h"
49 #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
50
51 #define MAX_TIMESTAMP (~0ULL)
52
53 struct intel_pt {
54 struct auxtrace auxtrace;
55 struct auxtrace_queues queues;
56 struct auxtrace_heap heap;
57 u32 auxtrace_type;
58 struct perf_session *session;
59 struct machine *machine;
60 struct perf_evsel *switch_evsel;
61 struct thread *unknown_thread;
62 bool timeless_decoding;
63 bool sampling_mode;
64 bool snapshot_mode;
65 bool per_cpu_mmaps;
66 bool have_tsc;
67 bool data_queued;
68 bool est_tsc;
69 bool sync_switch;
70 bool mispred_all;
71 int have_sched_switch;
72 u32 pmu_type;
73 u64 kernel_start;
74 u64 switch_ip;
75 u64 ptss_ip;
76
77 struct perf_tsc_conversion tc;
78 bool cap_user_time_zero;
79
80 struct itrace_synth_opts synth_opts;
81
82 bool sample_instructions;
83 u64 instructions_sample_type;
84 u64 instructions_id;
85
86 bool sample_branches;
87 u32 branches_filter;
88 u64 branches_sample_type;
89 u64 branches_id;
90
91 bool sample_transactions;
92 u64 transactions_sample_type;
93 u64 transactions_id;
94
95 bool sample_ptwrites;
96 u64 ptwrites_sample_type;
97 u64 ptwrites_id;
98
99 bool sample_pwr_events;
100 u64 pwr_events_sample_type;
101 u64 mwait_id;
102 u64 pwre_id;
103 u64 exstop_id;
104 u64 pwrx_id;
105 u64 cbr_id;
106
107 u64 tsc_bit;
108 u64 mtc_bit;
109 u64 mtc_freq_bits;
110 u32 tsc_ctc_ratio_n;
111 u32 tsc_ctc_ratio_d;
112 u64 cyc_bit;
113 u64 noretcomp_bit;
114 unsigned max_non_turbo_ratio;
115 unsigned cbr2khz;
116
117 unsigned long num_events;
118
119 char *filter;
120 struct addr_filters filts;
121 };
122
123 enum switch_state {
124 INTEL_PT_SS_NOT_TRACING,
125 INTEL_PT_SS_UNKNOWN,
126 INTEL_PT_SS_TRACING,
127 INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
128 INTEL_PT_SS_EXPECTING_SWITCH_IP,
129 };
130
131 struct intel_pt_queue {
132 struct intel_pt *pt;
133 unsigned int queue_nr;
134 struct auxtrace_buffer *buffer;
135 void *decoder;
136 const struct intel_pt_state *state;
137 struct ip_callchain *chain;
138 struct branch_stack *last_branch;
139 struct branch_stack *last_branch_rb;
140 size_t last_branch_pos;
141 union perf_event *event_buf;
142 bool on_heap;
143 bool stop;
144 bool step_through_buffers;
145 bool use_buffer_pid_tid;
146 bool sync_switch;
147 pid_t pid, tid;
148 int cpu;
149 int switch_state;
150 pid_t next_tid;
151 struct thread *thread;
152 bool exclude_kernel;
153 bool have_sample;
154 u64 time;
155 u64 timestamp;
156 u32 flags;
157 u16 insn_len;
158 u64 last_insn_cnt;
159 char insn[INTEL_PT_INSN_BUF_SZ];
160 };
161
162 static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
163 unsigned char *buf, size_t len)
164 {
165 struct intel_pt_pkt packet;
166 size_t pos = 0;
167 int ret, pkt_len, i;
168 char desc[INTEL_PT_PKT_DESC_MAX];
169 const char *color = PERF_COLOR_BLUE;
170
171 color_fprintf(stdout, color,
172 ". ... Intel Processor Trace data: size %zu bytes\n",
173 len);
174
175 while (len) {
176 ret = intel_pt_get_packet(buf, len, &packet);
177 if (ret > 0)
178 pkt_len = ret;
179 else
180 pkt_len = 1;
181 printf(".");
182 color_fprintf(stdout, color, " %08x: ", pos);
183 for (i = 0; i < pkt_len; i++)
184 color_fprintf(stdout, color, " %02x", buf[i]);
185 for (; i < 16; i++)
186 color_fprintf(stdout, color, " ");
187 if (ret > 0) {
188 ret = intel_pt_pkt_desc(&packet, desc,
189 INTEL_PT_PKT_DESC_MAX);
190 if (ret > 0)
191 color_fprintf(stdout, color, " %s\n", desc);
192 } else {
193 color_fprintf(stdout, color, " Bad packet!\n");
194 }
195 pos += pkt_len;
196 buf += pkt_len;
197 len -= pkt_len;
198 }
199 }
200
201 static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
202 size_t len)
203 {
204 printf(".\n");
205 intel_pt_dump(pt, buf, len);
206 }
207
208 static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
209 struct auxtrace_buffer *b)
210 {
211 bool consecutive = false;
212 void *start;
213
214 start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
215 pt->have_tsc, &consecutive);
216 if (!start)
217 return -EINVAL;
218 b->use_size = b->data + b->size - start;
219 b->use_data = start;
220 if (b->use_size && consecutive)
221 b->consecutive = true;
222 return 0;
223 }
224
225 static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
226 struct auxtrace_queue *queue,
227 struct auxtrace_buffer *buffer)
228 {
229 if (queue->cpu == -1 && buffer->cpu != -1)
230 ptq->cpu = buffer->cpu;
231
232 ptq->pid = buffer->pid;
233 ptq->tid = buffer->tid;
234
235 intel_pt_log("queue %u cpu %d pid %d tid %d\n",
236 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
237
238 thread__zput(ptq->thread);
239
240 if (ptq->tid != -1) {
241 if (ptq->pid != -1)
242 ptq->thread = machine__findnew_thread(ptq->pt->machine,
243 ptq->pid,
244 ptq->tid);
245 else
246 ptq->thread = machine__find_thread(ptq->pt->machine, -1,
247 ptq->tid);
248 }
249 }
250
251 /* This function assumes data is processed sequentially only */
252 static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
253 {
254 struct intel_pt_queue *ptq = data;
255 struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
256 struct auxtrace_queue *queue;
257
258 if (ptq->stop) {
259 b->len = 0;
260 return 0;
261 }
262
263 queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
264 next:
265 buffer = auxtrace_buffer__next(queue, buffer);
266 if (!buffer) {
267 if (old_buffer)
268 auxtrace_buffer__drop_data(old_buffer);
269 b->len = 0;
270 return 0;
271 }
272
273 ptq->buffer = buffer;
274
275 if (!buffer->data) {
276 int fd = perf_data__fd(ptq->pt->session->data);
277
278 buffer->data = auxtrace_buffer__get_data(buffer, fd);
279 if (!buffer->data)
280 return -ENOMEM;
281 }
282
283 if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
284 intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
285 return -ENOMEM;
286
287 if (buffer->use_data) {
288 b->len = buffer->use_size;
289 b->buf = buffer->use_data;
290 } else {
291 b->len = buffer->size;
292 b->buf = buffer->data;
293 }
294 b->ref_timestamp = buffer->reference;
295
296 /*
297 * If in snapshot mode and the buffer has no usable data, get next
298 * buffer and again check overlap against old_buffer.
299 */
300 if (ptq->pt->snapshot_mode && !b->len)
301 goto next;
302
303 if (old_buffer)
304 auxtrace_buffer__drop_data(old_buffer);
305
306 if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
307 !buffer->consecutive)) {
308 b->consecutive = false;
309 b->trace_nr = buffer->buffer_nr + 1;
310 } else {
311 b->consecutive = true;
312 }
313
314 if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
315 ptq->tid != buffer->tid))
316 intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
317
318 if (ptq->step_through_buffers)
319 ptq->stop = true;
320
321 if (!b->len)
322 return intel_pt_get_trace(b, data);
323
324 return 0;
325 }
326
327 struct intel_pt_cache_entry {
328 struct auxtrace_cache_entry entry;
329 u64 insn_cnt;
330 u64 byte_cnt;
331 enum intel_pt_insn_op op;
332 enum intel_pt_insn_branch branch;
333 int length;
334 int32_t rel;
335 char insn[INTEL_PT_INSN_BUF_SZ];
336 };
337
338 static int intel_pt_config_div(const char *var, const char *value, void *data)
339 {
340 int *d = data;
341 long val;
342
343 if (!strcmp(var, "intel-pt.cache-divisor")) {
344 val = strtol(value, NULL, 0);
345 if (val > 0 && val <= INT_MAX)
346 *d = val;
347 }
348
349 return 0;
350 }
351
352 static int intel_pt_cache_divisor(void)
353 {
354 static int d;
355
356 if (d)
357 return d;
358
359 perf_config(intel_pt_config_div, &d);
360
361 if (!d)
362 d = 64;
363
364 return d;
365 }
366
367 static unsigned int intel_pt_cache_size(struct dso *dso,
368 struct machine *machine)
369 {
370 off_t size;
371
372 size = dso__data_size(dso, machine);
373 size /= intel_pt_cache_divisor();
374 if (size < 1000)
375 return 10;
376 if (size > (1 << 21))
377 return 21;
378 return 32 - __builtin_clz(size);
379 }
380
381 static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
382 struct machine *machine)
383 {
384 struct auxtrace_cache *c;
385 unsigned int bits;
386
387 if (dso->auxtrace_cache)
388 return dso->auxtrace_cache;
389
390 bits = intel_pt_cache_size(dso, machine);
391
392 /* Ignoring cache creation failure */
393 c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
394
395 dso->auxtrace_cache = c;
396
397 return c;
398 }
399
400 static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
401 u64 offset, u64 insn_cnt, u64 byte_cnt,
402 struct intel_pt_insn *intel_pt_insn)
403 {
404 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
405 struct intel_pt_cache_entry *e;
406 int err;
407
408 if (!c)
409 return -ENOMEM;
410
411 e = auxtrace_cache__alloc_entry(c);
412 if (!e)
413 return -ENOMEM;
414
415 e->insn_cnt = insn_cnt;
416 e->byte_cnt = byte_cnt;
417 e->op = intel_pt_insn->op;
418 e->branch = intel_pt_insn->branch;
419 e->length = intel_pt_insn->length;
420 e->rel = intel_pt_insn->rel;
421 memcpy(e->insn, intel_pt_insn->buf, INTEL_PT_INSN_BUF_SZ);
422
423 err = auxtrace_cache__add(c, offset, &e->entry);
424 if (err)
425 auxtrace_cache__free_entry(c, e);
426
427 return err;
428 }
429
430 static struct intel_pt_cache_entry *
431 intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
432 {
433 struct auxtrace_cache *c = intel_pt_cache(dso, machine);
434
435 if (!c)
436 return NULL;
437
438 return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
439 }
440
441 static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
442 uint64_t *insn_cnt_ptr, uint64_t *ip,
443 uint64_t to_ip, uint64_t max_insn_cnt,
444 void *data)
445 {
446 struct intel_pt_queue *ptq = data;
447 struct machine *machine = ptq->pt->machine;
448 struct thread *thread;
449 struct addr_location al;
450 unsigned char buf[INTEL_PT_INSN_BUF_SZ];
451 ssize_t len;
452 int x86_64;
453 u8 cpumode;
454 u64 offset, start_offset, start_ip;
455 u64 insn_cnt = 0;
456 bool one_map = true;
457
458 intel_pt_insn->length = 0;
459
460 if (to_ip && *ip == to_ip)
461 goto out_no_cache;
462
463 if (*ip >= ptq->pt->kernel_start)
464 cpumode = PERF_RECORD_MISC_KERNEL;
465 else
466 cpumode = PERF_RECORD_MISC_USER;
467
468 thread = ptq->thread;
469 if (!thread) {
470 if (cpumode != PERF_RECORD_MISC_KERNEL)
471 return -EINVAL;
472 thread = ptq->pt->unknown_thread;
473 }
474
475 while (1) {
476 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
477 if (!al.map || !al.map->dso)
478 return -EINVAL;
479
480 if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
481 dso__data_status_seen(al.map->dso,
482 DSO_DATA_STATUS_SEEN_ITRACE))
483 return -ENOENT;
484
485 offset = al.map->map_ip(al.map, *ip);
486
487 if (!to_ip && one_map) {
488 struct intel_pt_cache_entry *e;
489
490 e = intel_pt_cache_lookup(al.map->dso, machine, offset);
491 if (e &&
492 (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
493 *insn_cnt_ptr = e->insn_cnt;
494 *ip += e->byte_cnt;
495 intel_pt_insn->op = e->op;
496 intel_pt_insn->branch = e->branch;
497 intel_pt_insn->length = e->length;
498 intel_pt_insn->rel = e->rel;
499 memcpy(intel_pt_insn->buf, e->insn,
500 INTEL_PT_INSN_BUF_SZ);
501 intel_pt_log_insn_no_data(intel_pt_insn, *ip);
502 return 0;
503 }
504 }
505
506 start_offset = offset;
507 start_ip = *ip;
508
509 /* Load maps to ensure dso->is_64_bit has been updated */
510 map__load(al.map);
511
512 x86_64 = al.map->dso->is_64_bit;
513
514 while (1) {
515 len = dso__data_read_offset(al.map->dso, machine,
516 offset, buf,
517 INTEL_PT_INSN_BUF_SZ);
518 if (len <= 0)
519 return -EINVAL;
520
521 if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
522 return -EINVAL;
523
524 intel_pt_log_insn(intel_pt_insn, *ip);
525
526 insn_cnt += 1;
527
528 if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
529 goto out;
530
531 if (max_insn_cnt && insn_cnt >= max_insn_cnt)
532 goto out_no_cache;
533
534 *ip += intel_pt_insn->length;
535
536 if (to_ip && *ip == to_ip)
537 goto out_no_cache;
538
539 if (*ip >= al.map->end)
540 break;
541
542 offset += intel_pt_insn->length;
543 }
544 one_map = false;
545 }
546 out:
547 *insn_cnt_ptr = insn_cnt;
548
549 if (!one_map)
550 goto out_no_cache;
551
552 /*
553 * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
554 * entries.
555 */
556 if (to_ip) {
557 struct intel_pt_cache_entry *e;
558
559 e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
560 if (e)
561 return 0;
562 }
563
564 /* Ignore cache errors */
565 intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
566 *ip - start_ip, intel_pt_insn);
567
568 return 0;
569
570 out_no_cache:
571 *insn_cnt_ptr = insn_cnt;
572 return 0;
573 }
574
575 static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
576 uint64_t offset, const char *filename)
577 {
578 struct addr_filter *filt;
579 bool have_filter = false;
580 bool hit_tracestop = false;
581 bool hit_filter = false;
582
583 list_for_each_entry(filt, &pt->filts.head, list) {
584 if (filt->start)
585 have_filter = true;
586
587 if ((filename && !filt->filename) ||
588 (!filename && filt->filename) ||
589 (filename && strcmp(filename, filt->filename)))
590 continue;
591
592 if (!(offset >= filt->addr && offset < filt->addr + filt->size))
593 continue;
594
595 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
596 ip, offset, filename ? filename : "[kernel]",
597 filt->start ? "filter" : "stop",
598 filt->addr, filt->size);
599
600 if (filt->start)
601 hit_filter = true;
602 else
603 hit_tracestop = true;
604 }
605
606 if (!hit_tracestop && !hit_filter)
607 intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
608 ip, offset, filename ? filename : "[kernel]");
609
610 return hit_tracestop || (have_filter && !hit_filter);
611 }
612
613 static int __intel_pt_pgd_ip(uint64_t ip, void *data)
614 {
615 struct intel_pt_queue *ptq = data;
616 struct thread *thread;
617 struct addr_location al;
618 u8 cpumode;
619 u64 offset;
620
621 if (ip >= ptq->pt->kernel_start)
622 return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
623
624 cpumode = PERF_RECORD_MISC_USER;
625
626 thread = ptq->thread;
627 if (!thread)
628 return -EINVAL;
629
630 thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al);
631 if (!al.map || !al.map->dso)
632 return -EINVAL;
633
634 offset = al.map->map_ip(al.map, ip);
635
636 return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
637 al.map->dso->long_name);
638 }
639
640 static bool intel_pt_pgd_ip(uint64_t ip, void *data)
641 {
642 return __intel_pt_pgd_ip(ip, data) > 0;
643 }
644
645 static bool intel_pt_get_config(struct intel_pt *pt,
646 struct perf_event_attr *attr, u64 *config)
647 {
648 if (attr->type == pt->pmu_type) {
649 if (config)
650 *config = attr->config;
651 return true;
652 }
653
654 return false;
655 }
656
657 static bool intel_pt_exclude_kernel(struct intel_pt *pt)
658 {
659 struct perf_evsel *evsel;
660
661 evlist__for_each_entry(pt->session->evlist, evsel) {
662 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
663 !evsel->attr.exclude_kernel)
664 return false;
665 }
666 return true;
667 }
668
669 static bool intel_pt_return_compression(struct intel_pt *pt)
670 {
671 struct perf_evsel *evsel;
672 u64 config;
673
674 if (!pt->noretcomp_bit)
675 return true;
676
677 evlist__for_each_entry(pt->session->evlist, evsel) {
678 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
679 (config & pt->noretcomp_bit))
680 return false;
681 }
682 return true;
683 }
684
685 static bool intel_pt_branch_enable(struct intel_pt *pt)
686 {
687 struct perf_evsel *evsel;
688 u64 config;
689
690 evlist__for_each_entry(pt->session->evlist, evsel) {
691 if (intel_pt_get_config(pt, &evsel->attr, &config) &&
692 (config & 1) && !(config & 0x2000))
693 return false;
694 }
695 return true;
696 }
697
698 static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
699 {
700 struct perf_evsel *evsel;
701 unsigned int shift;
702 u64 config;
703
704 if (!pt->mtc_freq_bits)
705 return 0;
706
707 for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
708 config >>= 1;
709
710 evlist__for_each_entry(pt->session->evlist, evsel) {
711 if (intel_pt_get_config(pt, &evsel->attr, &config))
712 return (config & pt->mtc_freq_bits) >> shift;
713 }
714 return 0;
715 }
716
717 static bool intel_pt_timeless_decoding(struct intel_pt *pt)
718 {
719 struct perf_evsel *evsel;
720 bool timeless_decoding = true;
721 u64 config;
722
723 if (!pt->tsc_bit || !pt->cap_user_time_zero)
724 return true;
725
726 evlist__for_each_entry(pt->session->evlist, evsel) {
727 if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
728 return true;
729 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
730 if (config & pt->tsc_bit)
731 timeless_decoding = false;
732 else
733 return true;
734 }
735 }
736 return timeless_decoding;
737 }
738
739 static bool intel_pt_tracing_kernel(struct intel_pt *pt)
740 {
741 struct perf_evsel *evsel;
742
743 evlist__for_each_entry(pt->session->evlist, evsel) {
744 if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
745 !evsel->attr.exclude_kernel)
746 return true;
747 }
748 return false;
749 }
750
751 static bool intel_pt_have_tsc(struct intel_pt *pt)
752 {
753 struct perf_evsel *evsel;
754 bool have_tsc = false;
755 u64 config;
756
757 if (!pt->tsc_bit)
758 return false;
759
760 evlist__for_each_entry(pt->session->evlist, evsel) {
761 if (intel_pt_get_config(pt, &evsel->attr, &config)) {
762 if (config & pt->tsc_bit)
763 have_tsc = true;
764 else
765 return false;
766 }
767 }
768 return have_tsc;
769 }
770
771 static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
772 {
773 u64 quot, rem;
774
775 quot = ns / pt->tc.time_mult;
776 rem = ns % pt->tc.time_mult;
777 return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
778 pt->tc.time_mult;
779 }
780
781 static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
782 unsigned int queue_nr)
783 {
784 struct intel_pt_params params = { .get_trace = 0, };
785 struct intel_pt_queue *ptq;
786
787 ptq = zalloc(sizeof(struct intel_pt_queue));
788 if (!ptq)
789 return NULL;
790
791 if (pt->synth_opts.callchain) {
792 size_t sz = sizeof(struct ip_callchain);
793
794 sz += pt->synth_opts.callchain_sz * sizeof(u64);
795 ptq->chain = zalloc(sz);
796 if (!ptq->chain)
797 goto out_free;
798 }
799
800 if (pt->synth_opts.last_branch) {
801 size_t sz = sizeof(struct branch_stack);
802
803 sz += pt->synth_opts.last_branch_sz *
804 sizeof(struct branch_entry);
805 ptq->last_branch = zalloc(sz);
806 if (!ptq->last_branch)
807 goto out_free;
808 ptq->last_branch_rb = zalloc(sz);
809 if (!ptq->last_branch_rb)
810 goto out_free;
811 }
812
813 ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
814 if (!ptq->event_buf)
815 goto out_free;
816
817 ptq->pt = pt;
818 ptq->queue_nr = queue_nr;
819 ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
820 ptq->pid = -1;
821 ptq->tid = -1;
822 ptq->cpu = -1;
823 ptq->next_tid = -1;
824
825 params.get_trace = intel_pt_get_trace;
826 params.walk_insn = intel_pt_walk_next_insn;
827 params.data = ptq;
828 params.return_compression = intel_pt_return_compression(pt);
829 params.branch_enable = intel_pt_branch_enable(pt);
830 params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
831 params.mtc_period = intel_pt_mtc_period(pt);
832 params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
833 params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
834
835 if (pt->filts.cnt > 0)
836 params.pgd_ip = intel_pt_pgd_ip;
837
838 if (pt->synth_opts.instructions) {
839 if (pt->synth_opts.period) {
840 switch (pt->synth_opts.period_type) {
841 case PERF_ITRACE_PERIOD_INSTRUCTIONS:
842 params.period_type =
843 INTEL_PT_PERIOD_INSTRUCTIONS;
844 params.period = pt->synth_opts.period;
845 break;
846 case PERF_ITRACE_PERIOD_TICKS:
847 params.period_type = INTEL_PT_PERIOD_TICKS;
848 params.period = pt->synth_opts.period;
849 break;
850 case PERF_ITRACE_PERIOD_NANOSECS:
851 params.period_type = INTEL_PT_PERIOD_TICKS;
852 params.period = intel_pt_ns_to_ticks(pt,
853 pt->synth_opts.period);
854 break;
855 default:
856 break;
857 }
858 }
859
860 if (!params.period) {
861 params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
862 params.period = 1;
863 }
864 }
865
866 ptq->decoder = intel_pt_decoder_new(&params);
867 if (!ptq->decoder)
868 goto out_free;
869
870 return ptq;
871
872 out_free:
873 zfree(&ptq->event_buf);
874 zfree(&ptq->last_branch);
875 zfree(&ptq->last_branch_rb);
876 zfree(&ptq->chain);
877 free(ptq);
878 return NULL;
879 }
880
881 static void intel_pt_free_queue(void *priv)
882 {
883 struct intel_pt_queue *ptq = priv;
884
885 if (!ptq)
886 return;
887 thread__zput(ptq->thread);
888 intel_pt_decoder_free(ptq->decoder);
889 zfree(&ptq->event_buf);
890 zfree(&ptq->last_branch);
891 zfree(&ptq->last_branch_rb);
892 zfree(&ptq->chain);
893 free(ptq);
894 }
895
896 static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
897 struct auxtrace_queue *queue)
898 {
899 struct intel_pt_queue *ptq = queue->priv;
900
901 if (queue->tid == -1 || pt->have_sched_switch) {
902 ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
903 thread__zput(ptq->thread);
904 }
905
906 if (!ptq->thread && ptq->tid != -1)
907 ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
908
909 if (ptq->thread) {
910 ptq->pid = ptq->thread->pid_;
911 if (queue->cpu == -1)
912 ptq->cpu = ptq->thread->cpu;
913 }
914 }
915
916 static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
917 {
918 if (ptq->state->flags & INTEL_PT_ABORT_TX) {
919 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
920 } else if (ptq->state->flags & INTEL_PT_ASYNC) {
921 if (ptq->state->to_ip)
922 ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
923 PERF_IP_FLAG_ASYNC |
924 PERF_IP_FLAG_INTERRUPT;
925 else
926 ptq->flags = PERF_IP_FLAG_BRANCH |
927 PERF_IP_FLAG_TRACE_END;
928 ptq->insn_len = 0;
929 } else {
930 if (ptq->state->from_ip)
931 ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
932 else
933 ptq->flags = PERF_IP_FLAG_BRANCH |
934 PERF_IP_FLAG_TRACE_BEGIN;
935 if (ptq->state->flags & INTEL_PT_IN_TX)
936 ptq->flags |= PERF_IP_FLAG_IN_TX;
937 ptq->insn_len = ptq->state->insn_len;
938 memcpy(ptq->insn, ptq->state->insn, INTEL_PT_INSN_BUF_SZ);
939 }
940 }
941
942 static int intel_pt_setup_queue(struct intel_pt *pt,
943 struct auxtrace_queue *queue,
944 unsigned int queue_nr)
945 {
946 struct intel_pt_queue *ptq = queue->priv;
947
948 if (list_empty(&queue->head))
949 return 0;
950
951 if (!ptq) {
952 ptq = intel_pt_alloc_queue(pt, queue_nr);
953 if (!ptq)
954 return -ENOMEM;
955 queue->priv = ptq;
956
957 if (queue->cpu != -1)
958 ptq->cpu = queue->cpu;
959 ptq->tid = queue->tid;
960
961 if (pt->sampling_mode) {
962 if (pt->timeless_decoding)
963 ptq->step_through_buffers = true;
964 if (pt->timeless_decoding || !pt->have_sched_switch)
965 ptq->use_buffer_pid_tid = true;
966 }
967
968 ptq->sync_switch = pt->sync_switch;
969 }
970
971 if (!ptq->on_heap &&
972 (!ptq->sync_switch ||
973 ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
974 const struct intel_pt_state *state;
975 int ret;
976
977 if (pt->timeless_decoding)
978 return 0;
979
980 intel_pt_log("queue %u getting timestamp\n", queue_nr);
981 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
982 queue_nr, ptq->cpu, ptq->pid, ptq->tid);
983 while (1) {
984 state = intel_pt_decode(ptq->decoder);
985 if (state->err) {
986 if (state->err == INTEL_PT_ERR_NODATA) {
987 intel_pt_log("queue %u has no timestamp\n",
988 queue_nr);
989 return 0;
990 }
991 continue;
992 }
993 if (state->timestamp)
994 break;
995 }
996
997 ptq->timestamp = state->timestamp;
998 intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
999 queue_nr, ptq->timestamp);
1000 ptq->state = state;
1001 ptq->have_sample = true;
1002 intel_pt_sample_flags(ptq);
1003 ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
1004 if (ret)
1005 return ret;
1006 ptq->on_heap = true;
1007 }
1008
1009 return 0;
1010 }
1011
1012 static int intel_pt_setup_queues(struct intel_pt *pt)
1013 {
1014 unsigned int i;
1015 int ret;
1016
1017 for (i = 0; i < pt->queues.nr_queues; i++) {
1018 ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
1019 if (ret)
1020 return ret;
1021 }
1022 return 0;
1023 }
1024
1025 static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
1026 {
1027 struct branch_stack *bs_src = ptq->last_branch_rb;
1028 struct branch_stack *bs_dst = ptq->last_branch;
1029 size_t nr = 0;
1030
1031 bs_dst->nr = bs_src->nr;
1032
1033 if (!bs_src->nr)
1034 return;
1035
1036 nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
1037 memcpy(&bs_dst->entries[0],
1038 &bs_src->entries[ptq->last_branch_pos],
1039 sizeof(struct branch_entry) * nr);
1040
1041 if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
1042 memcpy(&bs_dst->entries[nr],
1043 &bs_src->entries[0],
1044 sizeof(struct branch_entry) * ptq->last_branch_pos);
1045 }
1046 }
1047
1048 static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
1049 {
1050 ptq->last_branch_pos = 0;
1051 ptq->last_branch_rb->nr = 0;
1052 }
1053
1054 static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
1055 {
1056 const struct intel_pt_state *state = ptq->state;
1057 struct branch_stack *bs = ptq->last_branch_rb;
1058 struct branch_entry *be;
1059
1060 if (!ptq->last_branch_pos)
1061 ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
1062
1063 ptq->last_branch_pos -= 1;
1064
1065 be = &bs->entries[ptq->last_branch_pos];
1066 be->from = state->from_ip;
1067 be->to = state->to_ip;
1068 be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
1069 be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
1070 /* No support for mispredict */
1071 be->flags.mispred = ptq->pt->mispred_all;
1072
1073 if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
1074 bs->nr += 1;
1075 }
1076
1077 static inline bool intel_pt_skip_event(struct intel_pt *pt)
1078 {
1079 return pt->synth_opts.initial_skip &&
1080 pt->num_events++ < pt->synth_opts.initial_skip;
1081 }
1082
1083 static void intel_pt_prep_b_sample(struct intel_pt *pt,
1084 struct intel_pt_queue *ptq,
1085 union perf_event *event,
1086 struct perf_sample *sample)
1087 {
1088 event->sample.header.type = PERF_RECORD_SAMPLE;
1089 event->sample.header.misc = PERF_RECORD_MISC_USER;
1090 event->sample.header.size = sizeof(struct perf_event_header);
1091
1092 if (!pt->timeless_decoding)
1093 sample->time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
1094
1095 sample->cpumode = PERF_RECORD_MISC_USER;
1096 sample->ip = ptq->state->from_ip;
1097 sample->pid = ptq->pid;
1098 sample->tid = ptq->tid;
1099 sample->addr = ptq->state->to_ip;
1100 sample->period = 1;
1101 sample->cpu = ptq->cpu;
1102 sample->flags = ptq->flags;
1103 sample->insn_len = ptq->insn_len;
1104 memcpy(sample->insn, ptq->insn, INTEL_PT_INSN_BUF_SZ);
1105 }
1106
1107 static int intel_pt_inject_event(union perf_event *event,
1108 struct perf_sample *sample, u64 type)
1109 {
1110 event->header.size = perf_event__sample_event_size(sample, type, 0);
1111 return perf_event__synthesize_sample(event, type, 0, sample);
1112 }
1113
1114 static inline int intel_pt_opt_inject(struct intel_pt *pt,
1115 union perf_event *event,
1116 struct perf_sample *sample, u64 type)
1117 {
1118 if (!pt->synth_opts.inject)
1119 return 0;
1120
1121 return intel_pt_inject_event(event, sample, type);
1122 }
1123
1124 static int intel_pt_deliver_synth_b_event(struct intel_pt *pt,
1125 union perf_event *event,
1126 struct perf_sample *sample, u64 type)
1127 {
1128 int ret;
1129
1130 ret = intel_pt_opt_inject(pt, event, sample, type);
1131 if (ret)
1132 return ret;
1133
1134 ret = perf_session__deliver_synth_event(pt->session, event, sample);
1135 if (ret)
1136 pr_err("Intel PT: failed to deliver event, error %d\n", ret);
1137
1138 return ret;
1139 }
1140
1141 static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
1142 {
1143 struct intel_pt *pt = ptq->pt;
1144 union perf_event *event = ptq->event_buf;
1145 struct perf_sample sample = { .ip = 0, };
1146 struct dummy_branch_stack {
1147 u64 nr;
1148 struct branch_entry entries;
1149 } dummy_bs;
1150
1151 if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
1152 return 0;
1153
1154 if (intel_pt_skip_event(pt))
1155 return 0;
1156
1157 intel_pt_prep_b_sample(pt, ptq, event, &sample);
1158
1159 sample.id = ptq->pt->branches_id;
1160 sample.stream_id = ptq->pt->branches_id;
1161
1162 /*
1163 * perf report cannot handle events without a branch stack when using
1164 * SORT_MODE__BRANCH so make a dummy one.
1165 */
1166 if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
1167 dummy_bs = (struct dummy_branch_stack){
1168 .nr = 1,
1169 .entries = {
1170 .from = sample.ip,
1171 .to = sample.addr,
1172 },
1173 };
1174 sample.branch_stack = (struct branch_stack *)&dummy_bs;
1175 }
1176
1177 return intel_pt_deliver_synth_b_event(pt, event, &sample,
1178 pt->branches_sample_type);
1179 }
1180
1181 static void intel_pt_prep_sample(struct intel_pt *pt,
1182 struct intel_pt_queue *ptq,
1183 union perf_event *event,
1184 struct perf_sample *sample)
1185 {
1186 intel_pt_prep_b_sample(pt, ptq, event, sample);
1187
1188 if (pt->synth_opts.callchain) {
1189 thread_stack__sample(ptq->thread, ptq->chain,
1190 pt->synth_opts.callchain_sz, sample->ip);
1191 sample->callchain = ptq->chain;
1192 }
1193
1194 if (pt->synth_opts.last_branch) {
1195 intel_pt_copy_last_branch_rb(ptq);
1196 sample->branch_stack = ptq->last_branch;
1197 }
1198 }
1199
1200 static inline int intel_pt_deliver_synth_event(struct intel_pt *pt,
1201 struct intel_pt_queue *ptq,
1202 union perf_event *event,
1203 struct perf_sample *sample,
1204 u64 type)
1205 {
1206 int ret;
1207
1208 ret = intel_pt_deliver_synth_b_event(pt, event, sample, type);
1209
1210 if (pt->synth_opts.last_branch)
1211 intel_pt_reset_last_branch_rb(ptq);
1212
1213 return ret;
1214 }
1215
1216 static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
1217 {
1218 struct intel_pt *pt = ptq->pt;
1219 union perf_event *event = ptq->event_buf;
1220 struct perf_sample sample = { .ip = 0, };
1221
1222 if (intel_pt_skip_event(pt))
1223 return 0;
1224
1225 intel_pt_prep_sample(pt, ptq, event, &sample);
1226
1227 sample.id = ptq->pt->instructions_id;
1228 sample.stream_id = ptq->pt->instructions_id;
1229 sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
1230
1231 ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
1232
1233 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1234 pt->instructions_sample_type);
1235 }
1236
1237 static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
1238 {
1239 struct intel_pt *pt = ptq->pt;
1240 union perf_event *event = ptq->event_buf;
1241 struct perf_sample sample = { .ip = 0, };
1242
1243 if (intel_pt_skip_event(pt))
1244 return 0;
1245
1246 intel_pt_prep_sample(pt, ptq, event, &sample);
1247
1248 sample.id = ptq->pt->transactions_id;
1249 sample.stream_id = ptq->pt->transactions_id;
1250
1251 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1252 pt->transactions_sample_type);
1253 }
1254
1255 static void intel_pt_prep_p_sample(struct intel_pt *pt,
1256 struct intel_pt_queue *ptq,
1257 union perf_event *event,
1258 struct perf_sample *sample)
1259 {
1260 intel_pt_prep_sample(pt, ptq, event, sample);
1261
1262 /*
1263 * Zero IP is used to mean "trace start" but that is not the case for
1264 * power or PTWRITE events with no IP, so clear the flags.
1265 */
1266 if (!sample->ip)
1267 sample->flags = 0;
1268 }
1269
1270 static int intel_pt_synth_ptwrite_sample(struct intel_pt_queue *ptq)
1271 {
1272 struct intel_pt *pt = ptq->pt;
1273 union perf_event *event = ptq->event_buf;
1274 struct perf_sample sample = { .ip = 0, };
1275 struct perf_synth_intel_ptwrite raw;
1276
1277 if (intel_pt_skip_event(pt))
1278 return 0;
1279
1280 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1281
1282 sample.id = ptq->pt->ptwrites_id;
1283 sample.stream_id = ptq->pt->ptwrites_id;
1284
1285 raw.flags = 0;
1286 raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1287 raw.payload = cpu_to_le64(ptq->state->ptw_payload);
1288
1289 sample.raw_size = perf_synth__raw_size(raw);
1290 sample.raw_data = perf_synth__raw_data(&raw);
1291
1292 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1293 pt->ptwrites_sample_type);
1294 }
1295
1296 static int intel_pt_synth_cbr_sample(struct intel_pt_queue *ptq)
1297 {
1298 struct intel_pt *pt = ptq->pt;
1299 union perf_event *event = ptq->event_buf;
1300 struct perf_sample sample = { .ip = 0, };
1301 struct perf_synth_intel_cbr raw;
1302 u32 flags;
1303
1304 if (intel_pt_skip_event(pt))
1305 return 0;
1306
1307 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1308
1309 sample.id = ptq->pt->cbr_id;
1310 sample.stream_id = ptq->pt->cbr_id;
1311
1312 flags = (u16)ptq->state->cbr_payload | (pt->max_non_turbo_ratio << 16);
1313 raw.flags = cpu_to_le32(flags);
1314 raw.freq = cpu_to_le32(raw.cbr * pt->cbr2khz);
1315 raw.reserved3 = 0;
1316
1317 sample.raw_size = perf_synth__raw_size(raw);
1318 sample.raw_data = perf_synth__raw_data(&raw);
1319
1320 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1321 pt->pwr_events_sample_type);
1322 }
1323
1324 static int intel_pt_synth_mwait_sample(struct intel_pt_queue *ptq)
1325 {
1326 struct intel_pt *pt = ptq->pt;
1327 union perf_event *event = ptq->event_buf;
1328 struct perf_sample sample = { .ip = 0, };
1329 struct perf_synth_intel_mwait raw;
1330
1331 if (intel_pt_skip_event(pt))
1332 return 0;
1333
1334 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1335
1336 sample.id = ptq->pt->mwait_id;
1337 sample.stream_id = ptq->pt->mwait_id;
1338
1339 raw.reserved = 0;
1340 raw.payload = cpu_to_le64(ptq->state->mwait_payload);
1341
1342 sample.raw_size = perf_synth__raw_size(raw);
1343 sample.raw_data = perf_synth__raw_data(&raw);
1344
1345 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1346 pt->pwr_events_sample_type);
1347 }
1348
1349 static int intel_pt_synth_pwre_sample(struct intel_pt_queue *ptq)
1350 {
1351 struct intel_pt *pt = ptq->pt;
1352 union perf_event *event = ptq->event_buf;
1353 struct perf_sample sample = { .ip = 0, };
1354 struct perf_synth_intel_pwre raw;
1355
1356 if (intel_pt_skip_event(pt))
1357 return 0;
1358
1359 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1360
1361 sample.id = ptq->pt->pwre_id;
1362 sample.stream_id = ptq->pt->pwre_id;
1363
1364 raw.reserved = 0;
1365 raw.payload = cpu_to_le64(ptq->state->pwre_payload);
1366
1367 sample.raw_size = perf_synth__raw_size(raw);
1368 sample.raw_data = perf_synth__raw_data(&raw);
1369
1370 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1371 pt->pwr_events_sample_type);
1372 }
1373
1374 static int intel_pt_synth_exstop_sample(struct intel_pt_queue *ptq)
1375 {
1376 struct intel_pt *pt = ptq->pt;
1377 union perf_event *event = ptq->event_buf;
1378 struct perf_sample sample = { .ip = 0, };
1379 struct perf_synth_intel_exstop raw;
1380
1381 if (intel_pt_skip_event(pt))
1382 return 0;
1383
1384 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1385
1386 sample.id = ptq->pt->exstop_id;
1387 sample.stream_id = ptq->pt->exstop_id;
1388
1389 raw.flags = 0;
1390 raw.ip = !!(ptq->state->flags & INTEL_PT_FUP_IP);
1391
1392 sample.raw_size = perf_synth__raw_size(raw);
1393 sample.raw_data = perf_synth__raw_data(&raw);
1394
1395 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1396 pt->pwr_events_sample_type);
1397 }
1398
1399 static int intel_pt_synth_pwrx_sample(struct intel_pt_queue *ptq)
1400 {
1401 struct intel_pt *pt = ptq->pt;
1402 union perf_event *event = ptq->event_buf;
1403 struct perf_sample sample = { .ip = 0, };
1404 struct perf_synth_intel_pwrx raw;
1405
1406 if (intel_pt_skip_event(pt))
1407 return 0;
1408
1409 intel_pt_prep_p_sample(pt, ptq, event, &sample);
1410
1411 sample.id = ptq->pt->pwrx_id;
1412 sample.stream_id = ptq->pt->pwrx_id;
1413
1414 raw.reserved = 0;
1415 raw.payload = cpu_to_le64(ptq->state->pwrx_payload);
1416
1417 sample.raw_size = perf_synth__raw_size(raw);
1418 sample.raw_data = perf_synth__raw_data(&raw);
1419
1420 return intel_pt_deliver_synth_event(pt, ptq, event, &sample,
1421 pt->pwr_events_sample_type);
1422 }
1423
1424 static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
1425 pid_t pid, pid_t tid, u64 ip)
1426 {
1427 union perf_event event;
1428 char msg[MAX_AUXTRACE_ERROR_MSG];
1429 int err;
1430
1431 intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
1432
1433 auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
1434 code, cpu, pid, tid, ip, msg);
1435
1436 err = perf_session__deliver_synth_event(pt->session, &event, NULL);
1437 if (err)
1438 pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
1439 err);
1440
1441 return err;
1442 }
1443
1444 static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
1445 {
1446 struct auxtrace_queue *queue;
1447 pid_t tid = ptq->next_tid;
1448 int err;
1449
1450 if (tid == -1)
1451 return 0;
1452
1453 intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
1454
1455 err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
1456
1457 queue = &pt->queues.queue_array[ptq->queue_nr];
1458 intel_pt_set_pid_tid_cpu(pt, queue);
1459
1460 ptq->next_tid = -1;
1461
1462 return err;
1463 }
1464
1465 static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
1466 {
1467 struct intel_pt *pt = ptq->pt;
1468
1469 return ip == pt->switch_ip &&
1470 (ptq->flags & PERF_IP_FLAG_BRANCH) &&
1471 !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
1472 PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
1473 }
1474
1475 #define INTEL_PT_PWR_EVT (INTEL_PT_MWAIT_OP | INTEL_PT_PWR_ENTRY | \
1476 INTEL_PT_EX_STOP | INTEL_PT_PWR_EXIT | \
1477 INTEL_PT_CBR_CHG)
1478
1479 static int intel_pt_sample(struct intel_pt_queue *ptq)
1480 {
1481 const struct intel_pt_state *state = ptq->state;
1482 struct intel_pt *pt = ptq->pt;
1483 int err;
1484
1485 if (!ptq->have_sample)
1486 return 0;
1487
1488 ptq->have_sample = false;
1489
1490 if (pt->sample_pwr_events && (state->type & INTEL_PT_PWR_EVT)) {
1491 if (state->type & INTEL_PT_CBR_CHG) {
1492 err = intel_pt_synth_cbr_sample(ptq);
1493 if (err)
1494 return err;
1495 }
1496 if (state->type & INTEL_PT_MWAIT_OP) {
1497 err = intel_pt_synth_mwait_sample(ptq);
1498 if (err)
1499 return err;
1500 }
1501 if (state->type & INTEL_PT_PWR_ENTRY) {
1502 err = intel_pt_synth_pwre_sample(ptq);
1503 if (err)
1504 return err;
1505 }
1506 if (state->type & INTEL_PT_EX_STOP) {
1507 err = intel_pt_synth_exstop_sample(ptq);
1508 if (err)
1509 return err;
1510 }
1511 if (state->type & INTEL_PT_PWR_EXIT) {
1512 err = intel_pt_synth_pwrx_sample(ptq);
1513 if (err)
1514 return err;
1515 }
1516 }
1517
1518 if (pt->sample_instructions && (state->type & INTEL_PT_INSTRUCTION)) {
1519 err = intel_pt_synth_instruction_sample(ptq);
1520 if (err)
1521 return err;
1522 }
1523
1524 if (pt->sample_transactions && (state->type & INTEL_PT_TRANSACTION)) {
1525 err = intel_pt_synth_transaction_sample(ptq);
1526 if (err)
1527 return err;
1528 }
1529
1530 if (pt->sample_ptwrites && (state->type & INTEL_PT_PTW)) {
1531 err = intel_pt_synth_ptwrite_sample(ptq);
1532 if (err)
1533 return err;
1534 }
1535
1536 if (!(state->type & INTEL_PT_BRANCH))
1537 return 0;
1538
1539 if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
1540 thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
1541 state->to_ip, ptq->insn_len,
1542 state->trace_nr);
1543 else
1544 thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
1545
1546 if (pt->sample_branches) {
1547 err = intel_pt_synth_branch_sample(ptq);
1548 if (err)
1549 return err;
1550 }
1551
1552 if (pt->synth_opts.last_branch)
1553 intel_pt_update_last_branch_rb(ptq);
1554
1555 if (!ptq->sync_switch)
1556 return 0;
1557
1558 if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
1559 switch (ptq->switch_state) {
1560 case INTEL_PT_SS_UNKNOWN:
1561 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1562 err = intel_pt_next_tid(pt, ptq);
1563 if (err)
1564 return err;
1565 ptq->switch_state = INTEL_PT_SS_TRACING;
1566 break;
1567 default:
1568 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
1569 return 1;
1570 }
1571 } else if (!state->to_ip) {
1572 ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
1573 } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
1574 ptq->switch_state = INTEL_PT_SS_UNKNOWN;
1575 } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1576 state->to_ip == pt->ptss_ip &&
1577 (ptq->flags & PERF_IP_FLAG_CALL)) {
1578 ptq->switch_state = INTEL_PT_SS_TRACING;
1579 }
1580
1581 return 0;
1582 }
1583
1584 static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
1585 {
1586 struct machine *machine = pt->machine;
1587 struct map *map;
1588 struct symbol *sym, *start;
1589 u64 ip, switch_ip = 0;
1590 const char *ptss;
1591
1592 if (ptss_ip)
1593 *ptss_ip = 0;
1594
1595 map = machine__kernel_map(machine);
1596 if (!map)
1597 return 0;
1598
1599 if (map__load(map))
1600 return 0;
1601
1602 start = dso__first_symbol(map->dso, MAP__FUNCTION);
1603
1604 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1605 if (sym->binding == STB_GLOBAL &&
1606 !strcmp(sym->name, "__switch_to")) {
1607 ip = map->unmap_ip(map, sym->start);
1608 if (ip >= map->start && ip < map->end) {
1609 switch_ip = ip;
1610 break;
1611 }
1612 }
1613 }
1614
1615 if (!switch_ip || !ptss_ip)
1616 return 0;
1617
1618 if (pt->have_sched_switch == 1)
1619 ptss = "perf_trace_sched_switch";
1620 else
1621 ptss = "__perf_event_task_sched_out";
1622
1623 for (sym = start; sym; sym = dso__next_symbol(sym)) {
1624 if (!strcmp(sym->name, ptss)) {
1625 ip = map->unmap_ip(map, sym->start);
1626 if (ip >= map->start && ip < map->end) {
1627 *ptss_ip = ip;
1628 break;
1629 }
1630 }
1631 }
1632
1633 return switch_ip;
1634 }
1635
1636 static void intel_pt_enable_sync_switch(struct intel_pt *pt)
1637 {
1638 unsigned int i;
1639
1640 pt->sync_switch = true;
1641
1642 for (i = 0; i < pt->queues.nr_queues; i++) {
1643 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1644 struct intel_pt_queue *ptq = queue->priv;
1645
1646 if (ptq)
1647 ptq->sync_switch = true;
1648 }
1649 }
1650
1651 static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
1652 {
1653 const struct intel_pt_state *state = ptq->state;
1654 struct intel_pt *pt = ptq->pt;
1655 int err;
1656
1657 if (!pt->kernel_start) {
1658 pt->kernel_start = machine__kernel_start(pt->machine);
1659 if (pt->per_cpu_mmaps &&
1660 (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
1661 !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
1662 !pt->sampling_mode) {
1663 pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
1664 if (pt->switch_ip) {
1665 intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
1666 pt->switch_ip, pt->ptss_ip);
1667 intel_pt_enable_sync_switch(pt);
1668 }
1669 }
1670 }
1671
1672 intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
1673 ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
1674 while (1) {
1675 err = intel_pt_sample(ptq);
1676 if (err)
1677 return err;
1678
1679 state = intel_pt_decode(ptq->decoder);
1680 if (state->err) {
1681 if (state->err == INTEL_PT_ERR_NODATA)
1682 return 1;
1683 if (ptq->sync_switch &&
1684 state->from_ip >= pt->kernel_start) {
1685 ptq->sync_switch = false;
1686 intel_pt_next_tid(pt, ptq);
1687 }
1688 if (pt->synth_opts.errors) {
1689 err = intel_pt_synth_error(pt, state->err,
1690 ptq->cpu, ptq->pid,
1691 ptq->tid,
1692 state->from_ip);
1693 if (err)
1694 return err;
1695 }
1696 continue;
1697 }
1698
1699 ptq->state = state;
1700 ptq->have_sample = true;
1701 intel_pt_sample_flags(ptq);
1702
1703 /* Use estimated TSC upon return to user space */
1704 if (pt->est_tsc &&
1705 (state->from_ip >= pt->kernel_start || !state->from_ip) &&
1706 state->to_ip && state->to_ip < pt->kernel_start) {
1707 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1708 state->timestamp, state->est_timestamp);
1709 ptq->timestamp = state->est_timestamp;
1710 /* Use estimated TSC in unknown switch state */
1711 } else if (ptq->sync_switch &&
1712 ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
1713 intel_pt_is_switch_ip(ptq, state->to_ip) &&
1714 ptq->next_tid == -1) {
1715 intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
1716 state->timestamp, state->est_timestamp);
1717 ptq->timestamp = state->est_timestamp;
1718 } else if (state->timestamp > ptq->timestamp) {
1719 ptq->timestamp = state->timestamp;
1720 }
1721
1722 if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
1723 *timestamp = ptq->timestamp;
1724 return 0;
1725 }
1726 }
1727 return 0;
1728 }
1729
1730 static inline int intel_pt_update_queues(struct intel_pt *pt)
1731 {
1732 if (pt->queues.new_data) {
1733 pt->queues.new_data = false;
1734 return intel_pt_setup_queues(pt);
1735 }
1736 return 0;
1737 }
1738
1739 static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
1740 {
1741 unsigned int queue_nr;
1742 u64 ts;
1743 int ret;
1744
1745 while (1) {
1746 struct auxtrace_queue *queue;
1747 struct intel_pt_queue *ptq;
1748
1749 if (!pt->heap.heap_cnt)
1750 return 0;
1751
1752 if (pt->heap.heap_array[0].ordinal >= timestamp)
1753 return 0;
1754
1755 queue_nr = pt->heap.heap_array[0].queue_nr;
1756 queue = &pt->queues.queue_array[queue_nr];
1757 ptq = queue->priv;
1758
1759 intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
1760 queue_nr, pt->heap.heap_array[0].ordinal,
1761 timestamp);
1762
1763 auxtrace_heap__pop(&pt->heap);
1764
1765 if (pt->heap.heap_cnt) {
1766 ts = pt->heap.heap_array[0].ordinal + 1;
1767 if (ts > timestamp)
1768 ts = timestamp;
1769 } else {
1770 ts = timestamp;
1771 }
1772
1773 intel_pt_set_pid_tid_cpu(pt, queue);
1774
1775 ret = intel_pt_run_decoder(ptq, &ts);
1776
1777 if (ret < 0) {
1778 auxtrace_heap__add(&pt->heap, queue_nr, ts);
1779 return ret;
1780 }
1781
1782 if (!ret) {
1783 ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
1784 if (ret < 0)
1785 return ret;
1786 } else {
1787 ptq->on_heap = false;
1788 }
1789 }
1790
1791 return 0;
1792 }
1793
1794 static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
1795 u64 time_)
1796 {
1797 struct auxtrace_queues *queues = &pt->queues;
1798 unsigned int i;
1799 u64 ts = 0;
1800
1801 for (i = 0; i < queues->nr_queues; i++) {
1802 struct auxtrace_queue *queue = &pt->queues.queue_array[i];
1803 struct intel_pt_queue *ptq = queue->priv;
1804
1805 if (ptq && (tid == -1 || ptq->tid == tid)) {
1806 ptq->time = time_;
1807 intel_pt_set_pid_tid_cpu(pt, queue);
1808 intel_pt_run_decoder(ptq, &ts);
1809 }
1810 }
1811 return 0;
1812 }
1813
1814 static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
1815 {
1816 return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
1817 sample->pid, sample->tid, 0);
1818 }
1819
1820 static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
1821 {
1822 unsigned i, j;
1823
1824 if (cpu < 0 || !pt->queues.nr_queues)
1825 return NULL;
1826
1827 if ((unsigned)cpu >= pt->queues.nr_queues)
1828 i = pt->queues.nr_queues - 1;
1829 else
1830 i = cpu;
1831
1832 if (pt->queues.queue_array[i].cpu == cpu)
1833 return pt->queues.queue_array[i].priv;
1834
1835 for (j = 0; i > 0; j++) {
1836 if (pt->queues.queue_array[--i].cpu == cpu)
1837 return pt->queues.queue_array[i].priv;
1838 }
1839
1840 for (; j < pt->queues.nr_queues; j++) {
1841 if (pt->queues.queue_array[j].cpu == cpu)
1842 return pt->queues.queue_array[j].priv;
1843 }
1844
1845 return NULL;
1846 }
1847
1848 static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
1849 u64 timestamp)
1850 {
1851 struct intel_pt_queue *ptq;
1852 int err;
1853
1854 if (!pt->sync_switch)
1855 return 1;
1856
1857 ptq = intel_pt_cpu_to_ptq(pt, cpu);
1858 if (!ptq || !ptq->sync_switch)
1859 return 1;
1860
1861 switch (ptq->switch_state) {
1862 case INTEL_PT_SS_NOT_TRACING:
1863 ptq->next_tid = -1;
1864 break;
1865 case INTEL_PT_SS_UNKNOWN:
1866 case INTEL_PT_SS_TRACING:
1867 ptq->next_tid = tid;
1868 ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
1869 return 0;
1870 case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
1871 if (!ptq->on_heap) {
1872 ptq->timestamp = perf_time_to_tsc(timestamp,
1873 &pt->tc);
1874 err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
1875 ptq->timestamp);
1876 if (err)
1877 return err;
1878 ptq->on_heap = true;
1879 }
1880 ptq->switch_state = INTEL_PT_SS_TRACING;
1881 break;
1882 case INTEL_PT_SS_EXPECTING_SWITCH_IP:
1883 ptq->next_tid = tid;
1884 intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
1885 break;
1886 default:
1887 break;
1888 }
1889
1890 return 1;
1891 }
1892
1893 static int intel_pt_process_switch(struct intel_pt *pt,
1894 struct perf_sample *sample)
1895 {
1896 struct perf_evsel *evsel;
1897 pid_t tid;
1898 int cpu, ret;
1899
1900 evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
1901 if (evsel != pt->switch_evsel)
1902 return 0;
1903
1904 tid = perf_evsel__intval(evsel, sample, "next_pid");
1905 cpu = sample->cpu;
1906
1907 intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1908 cpu, tid, sample->time, perf_time_to_tsc(sample->time,
1909 &pt->tc));
1910
1911 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1912 if (ret <= 0)
1913 return ret;
1914
1915 return machine__set_current_tid(pt->machine, cpu, -1, tid);
1916 }
1917
1918 static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
1919 struct perf_sample *sample)
1920 {
1921 bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
1922 pid_t pid, tid;
1923 int cpu, ret;
1924
1925 cpu = sample->cpu;
1926
1927 if (pt->have_sched_switch == 3) {
1928 if (!out)
1929 return 0;
1930 if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
1931 pr_err("Expecting CPU-wide context switch event\n");
1932 return -EINVAL;
1933 }
1934 pid = event->context_switch.next_prev_pid;
1935 tid = event->context_switch.next_prev_tid;
1936 } else {
1937 if (out)
1938 return 0;
1939 pid = sample->pid;
1940 tid = sample->tid;
1941 }
1942
1943 if (tid == -1) {
1944 pr_err("context_switch event has no tid\n");
1945 return -EINVAL;
1946 }
1947
1948 intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1949 cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
1950 &pt->tc));
1951
1952 ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
1953 if (ret <= 0)
1954 return ret;
1955
1956 return machine__set_current_tid(pt->machine, cpu, pid, tid);
1957 }
1958
1959 static int intel_pt_process_itrace_start(struct intel_pt *pt,
1960 union perf_event *event,
1961 struct perf_sample *sample)
1962 {
1963 if (!pt->per_cpu_mmaps)
1964 return 0;
1965
1966 intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
1967 sample->cpu, event->itrace_start.pid,
1968 event->itrace_start.tid, sample->time,
1969 perf_time_to_tsc(sample->time, &pt->tc));
1970
1971 return machine__set_current_tid(pt->machine, sample->cpu,
1972 event->itrace_start.pid,
1973 event->itrace_start.tid);
1974 }
1975
1976 static int intel_pt_process_event(struct perf_session *session,
1977 union perf_event *event,
1978 struct perf_sample *sample,
1979 struct perf_tool *tool)
1980 {
1981 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
1982 auxtrace);
1983 u64 timestamp;
1984 int err = 0;
1985
1986 if (dump_trace)
1987 return 0;
1988
1989 if (!tool->ordered_events) {
1990 pr_err("Intel Processor Trace requires ordered events\n");
1991 return -EINVAL;
1992 }
1993
1994 if (sample->time && sample->time != (u64)-1)
1995 timestamp = perf_time_to_tsc(sample->time, &pt->tc);
1996 else
1997 timestamp = 0;
1998
1999 if (timestamp || pt->timeless_decoding) {
2000 err = intel_pt_update_queues(pt);
2001 if (err)
2002 return err;
2003 }
2004
2005 if (pt->timeless_decoding) {
2006 if (event->header.type == PERF_RECORD_EXIT) {
2007 err = intel_pt_process_timeless_queues(pt,
2008 event->fork.tid,
2009 sample->time);
2010 }
2011 } else if (timestamp) {
2012 err = intel_pt_process_queues(pt, timestamp);
2013 }
2014 if (err)
2015 return err;
2016
2017 if (event->header.type == PERF_RECORD_AUX &&
2018 (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
2019 pt->synth_opts.errors) {
2020 err = intel_pt_lost(pt, sample);
2021 if (err)
2022 return err;
2023 }
2024
2025 if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
2026 err = intel_pt_process_switch(pt, sample);
2027 else if (event->header.type == PERF_RECORD_ITRACE_START)
2028 err = intel_pt_process_itrace_start(pt, event, sample);
2029 else if (event->header.type == PERF_RECORD_SWITCH ||
2030 event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
2031 err = intel_pt_context_switch(pt, event, sample);
2032
2033 intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
2034 perf_event__name(event->header.type), event->header.type,
2035 sample->cpu, sample->time, timestamp);
2036
2037 return err;
2038 }
2039
2040 static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
2041 {
2042 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2043 auxtrace);
2044 int ret;
2045
2046 if (dump_trace)
2047 return 0;
2048
2049 if (!tool->ordered_events)
2050 return -EINVAL;
2051
2052 ret = intel_pt_update_queues(pt);
2053 if (ret < 0)
2054 return ret;
2055
2056 if (pt->timeless_decoding)
2057 return intel_pt_process_timeless_queues(pt, -1,
2058 MAX_TIMESTAMP - 1);
2059
2060 return intel_pt_process_queues(pt, MAX_TIMESTAMP);
2061 }
2062
2063 static void intel_pt_free_events(struct perf_session *session)
2064 {
2065 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2066 auxtrace);
2067 struct auxtrace_queues *queues = &pt->queues;
2068 unsigned int i;
2069
2070 for (i = 0; i < queues->nr_queues; i++) {
2071 intel_pt_free_queue(queues->queue_array[i].priv);
2072 queues->queue_array[i].priv = NULL;
2073 }
2074 intel_pt_log_disable();
2075 auxtrace_queues__free(queues);
2076 }
2077
2078 static void intel_pt_free(struct perf_session *session)
2079 {
2080 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2081 auxtrace);
2082
2083 auxtrace_heap__free(&pt->heap);
2084 intel_pt_free_events(session);
2085 session->auxtrace = NULL;
2086 thread__put(pt->unknown_thread);
2087 addr_filters__exit(&pt->filts);
2088 zfree(&pt->filter);
2089 free(pt);
2090 }
2091
2092 static int intel_pt_process_auxtrace_event(struct perf_session *session,
2093 union perf_event *event,
2094 struct perf_tool *tool __maybe_unused)
2095 {
2096 struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
2097 auxtrace);
2098
2099 if (pt->sampling_mode)
2100 return 0;
2101
2102 if (!pt->data_queued) {
2103 struct auxtrace_buffer *buffer;
2104 off_t data_offset;
2105 int fd = perf_data__fd(session->data);
2106 int err;
2107
2108 if (perf_data__is_pipe(session->data)) {
2109 data_offset = 0;
2110 } else {
2111 data_offset = lseek(fd, 0, SEEK_CUR);
2112 if (data_offset == -1)
2113 return -errno;
2114 }
2115
2116 err = auxtrace_queues__add_event(&pt->queues, session, event,
2117 data_offset, &buffer);
2118 if (err)
2119 return err;
2120
2121 /* Dump here now we have copied a piped trace out of the pipe */
2122 if (dump_trace) {
2123 if (auxtrace_buffer__get_data(buffer, fd)) {
2124 intel_pt_dump_event(pt, buffer->data,
2125 buffer->size);
2126 auxtrace_buffer__put_data(buffer);
2127 }
2128 }
2129 }
2130
2131 return 0;
2132 }
2133
2134 struct intel_pt_synth {
2135 struct perf_tool dummy_tool;
2136 struct perf_session *session;
2137 };
2138
2139 static int intel_pt_event_synth(struct perf_tool *tool,
2140 union perf_event *event,
2141 struct perf_sample *sample __maybe_unused,
2142 struct machine *machine __maybe_unused)
2143 {
2144 struct intel_pt_synth *intel_pt_synth =
2145 container_of(tool, struct intel_pt_synth, dummy_tool);
2146
2147 return perf_session__deliver_synth_event(intel_pt_synth->session, event,
2148 NULL);
2149 }
2150
2151 static int intel_pt_synth_event(struct perf_session *session, const char *name,
2152 struct perf_event_attr *attr, u64 id)
2153 {
2154 struct intel_pt_synth intel_pt_synth;
2155 int err;
2156
2157 pr_debug("Synthesizing '%s' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
2158 name, id, (u64)attr->sample_type);
2159
2160 memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
2161 intel_pt_synth.session = session;
2162
2163 err = perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
2164 &id, intel_pt_event_synth);
2165 if (err)
2166 pr_err("%s: failed to synthesize '%s' event type\n",
2167 __func__, name);
2168
2169 return err;
2170 }
2171
2172 static void intel_pt_set_event_name(struct perf_evlist *evlist, u64 id,
2173 const char *name)
2174 {
2175 struct perf_evsel *evsel;
2176
2177 evlist__for_each_entry(evlist, evsel) {
2178 if (evsel->id && evsel->id[0] == id) {
2179 if (evsel->name)
2180 zfree(&evsel->name);
2181 evsel->name = strdup(name);
2182 break;
2183 }
2184 }
2185 }
2186
2187 static struct perf_evsel *intel_pt_evsel(struct intel_pt *pt,
2188 struct perf_evlist *evlist)
2189 {
2190 struct perf_evsel *evsel;
2191
2192 evlist__for_each_entry(evlist, evsel) {
2193 if (evsel->attr.type == pt->pmu_type && evsel->ids)
2194 return evsel;
2195 }
2196
2197 return NULL;
2198 }
2199
2200 static int intel_pt_synth_events(struct intel_pt *pt,
2201 struct perf_session *session)
2202 {
2203 struct perf_evlist *evlist = session->evlist;
2204 struct perf_evsel *evsel = intel_pt_evsel(pt, evlist);
2205 struct perf_event_attr attr;
2206 u64 id;
2207 int err;
2208
2209 if (!evsel) {
2210 pr_debug("There are no selected events with Intel Processor Trace data\n");
2211 return 0;
2212 }
2213
2214 memset(&attr, 0, sizeof(struct perf_event_attr));
2215 attr.size = sizeof(struct perf_event_attr);
2216 attr.type = PERF_TYPE_HARDWARE;
2217 attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
2218 attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
2219 PERF_SAMPLE_PERIOD;
2220 if (pt->timeless_decoding)
2221 attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
2222 else
2223 attr.sample_type |= PERF_SAMPLE_TIME;
2224 if (!pt->per_cpu_mmaps)
2225 attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
2226 attr.exclude_user = evsel->attr.exclude_user;
2227 attr.exclude_kernel = evsel->attr.exclude_kernel;
2228 attr.exclude_hv = evsel->attr.exclude_hv;
2229 attr.exclude_host = evsel->attr.exclude_host;
2230 attr.exclude_guest = evsel->attr.exclude_guest;
2231 attr.sample_id_all = evsel->attr.sample_id_all;
2232 attr.read_format = evsel->attr.read_format;
2233
2234 id = evsel->id[0] + 1000000000;
2235 if (!id)
2236 id = 1;
2237
2238 if (pt->synth_opts.branches) {
2239 attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
2240 attr.sample_period = 1;
2241 attr.sample_type |= PERF_SAMPLE_ADDR;
2242 err = intel_pt_synth_event(session, "branches", &attr, id);
2243 if (err)
2244 return err;
2245 pt->sample_branches = true;
2246 pt->branches_sample_type = attr.sample_type;
2247 pt->branches_id = id;
2248 id += 1;
2249 attr.sample_type &= ~(u64)PERF_SAMPLE_ADDR;
2250 }
2251
2252 if (pt->synth_opts.callchain)
2253 attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
2254 if (pt->synth_opts.last_branch)
2255 attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
2256
2257 if (pt->synth_opts.instructions) {
2258 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2259 if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
2260 attr.sample_period =
2261 intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
2262 else
2263 attr.sample_period = pt->synth_opts.period;
2264 err = intel_pt_synth_event(session, "instructions", &attr, id);
2265 if (err)
2266 return err;
2267 pt->sample_instructions = true;
2268 pt->instructions_sample_type = attr.sample_type;
2269 pt->instructions_id = id;
2270 id += 1;
2271 }
2272
2273 attr.sample_type &= ~(u64)PERF_SAMPLE_PERIOD;
2274 attr.sample_period = 1;
2275
2276 if (pt->synth_opts.transactions) {
2277 attr.config = PERF_COUNT_HW_INSTRUCTIONS;
2278 err = intel_pt_synth_event(session, "transactions", &attr, id);
2279 if (err)
2280 return err;
2281 pt->sample_transactions = true;
2282 pt->transactions_sample_type = attr.sample_type;
2283 pt->transactions_id = id;
2284 intel_pt_set_event_name(evlist, id, "transactions");
2285 id += 1;
2286 }
2287
2288 attr.type = PERF_TYPE_SYNTH;
2289 attr.sample_type |= PERF_SAMPLE_RAW;
2290
2291 if (pt->synth_opts.ptwrites) {
2292 attr.config = PERF_SYNTH_INTEL_PTWRITE;
2293 err = intel_pt_synth_event(session, "ptwrite", &attr, id);
2294 if (err)
2295 return err;
2296 pt->sample_ptwrites = true;
2297 pt->ptwrites_sample_type = attr.sample_type;
2298 pt->ptwrites_id = id;
2299 intel_pt_set_event_name(evlist, id, "ptwrite");
2300 id += 1;
2301 }
2302
2303 if (pt->synth_opts.pwr_events) {
2304 pt->sample_pwr_events = true;
2305 pt->pwr_events_sample_type = attr.sample_type;
2306
2307 attr.config = PERF_SYNTH_INTEL_CBR;
2308 err = intel_pt_synth_event(session, "cbr", &attr, id);
2309 if (err)
2310 return err;
2311 pt->cbr_id = id;
2312 intel_pt_set_event_name(evlist, id, "cbr");
2313 id += 1;
2314 }
2315
2316 if (pt->synth_opts.pwr_events && (evsel->attr.config & 0x10)) {
2317 attr.config = PERF_SYNTH_INTEL_MWAIT;
2318 err = intel_pt_synth_event(session, "mwait", &attr, id);
2319 if (err)
2320 return err;
2321 pt->mwait_id = id;
2322 intel_pt_set_event_name(evlist, id, "mwait");
2323 id += 1;
2324
2325 attr.config = PERF_SYNTH_INTEL_PWRE;
2326 err = intel_pt_synth_event(session, "pwre", &attr, id);
2327 if (err)
2328 return err;
2329 pt->pwre_id = id;
2330 intel_pt_set_event_name(evlist, id, "pwre");
2331 id += 1;
2332
2333 attr.config = PERF_SYNTH_INTEL_EXSTOP;
2334 err = intel_pt_synth_event(session, "exstop", &attr, id);
2335 if (err)
2336 return err;
2337 pt->exstop_id = id;
2338 intel_pt_set_event_name(evlist, id, "exstop");
2339 id += 1;
2340
2341 attr.config = PERF_SYNTH_INTEL_PWRX;
2342 err = intel_pt_synth_event(session, "pwrx", &attr, id);
2343 if (err)
2344 return err;
2345 pt->pwrx_id = id;
2346 intel_pt_set_event_name(evlist, id, "pwrx");
2347 id += 1;
2348 }
2349
2350 return 0;
2351 }
2352
2353 static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
2354 {
2355 struct perf_evsel *evsel;
2356
2357 evlist__for_each_entry_reverse(evlist, evsel) {
2358 const char *name = perf_evsel__name(evsel);
2359
2360 if (!strcmp(name, "sched:sched_switch"))
2361 return evsel;
2362 }
2363
2364 return NULL;
2365 }
2366
2367 static bool intel_pt_find_switch(struct perf_evlist *evlist)
2368 {
2369 struct perf_evsel *evsel;
2370
2371 evlist__for_each_entry(evlist, evsel) {
2372 if (evsel->attr.context_switch)
2373 return true;
2374 }
2375
2376 return false;
2377 }
2378
2379 static int intel_pt_perf_config(const char *var, const char *value, void *data)
2380 {
2381 struct intel_pt *pt = data;
2382
2383 if (!strcmp(var, "intel-pt.mispred-all"))
2384 pt->mispred_all = perf_config_bool(var, value);
2385
2386 return 0;
2387 }
2388
2389 static const char * const intel_pt_info_fmts[] = {
2390 [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
2391 [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
2392 [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
2393 [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
2394 [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
2395 [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
2396 [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
2397 [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
2398 [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
2399 [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
2400 [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
2401 [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
2402 [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
2403 [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
2404 [INTEL_PT_MAX_NONTURBO_RATIO] = " Max non-turbo ratio %"PRIu64"\n",
2405 [INTEL_PT_FILTER_STR_LEN] = " Filter string len. %"PRIu64"\n",
2406 };
2407
2408 static void intel_pt_print_info(u64 *arr, int start, int finish)
2409 {
2410 int i;
2411
2412 if (!dump_trace)
2413 return;
2414
2415 for (i = start; i <= finish; i++)
2416 fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
2417 }
2418
2419 static void intel_pt_print_info_str(const char *name, const char *str)
2420 {
2421 if (!dump_trace)
2422 return;
2423
2424 fprintf(stdout, " %-20s%s\n", name, str ? str : "");
2425 }
2426
2427 static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
2428 {
2429 return auxtrace_info->header.size >=
2430 sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
2431 }
2432
2433 int intel_pt_process_auxtrace_info(union perf_event *event,
2434 struct perf_session *session)
2435 {
2436 struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
2437 size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
2438 struct intel_pt *pt;
2439 void *info_end;
2440 u64 *info;
2441 int err;
2442
2443 if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
2444 min_sz)
2445 return -EINVAL;
2446
2447 pt = zalloc(sizeof(struct intel_pt));
2448 if (!pt)
2449 return -ENOMEM;
2450
2451 addr_filters__init(&pt->filts);
2452
2453 err = perf_config(intel_pt_perf_config, pt);
2454 if (err)
2455 goto err_free;
2456
2457 err = auxtrace_queues__init(&pt->queues);
2458 if (err)
2459 goto err_free;
2460
2461 intel_pt_log_set_name(INTEL_PT_PMU_NAME);
2462
2463 pt->session = session;
2464 pt->machine = &session->machines.host; /* No kvm support */
2465 pt->auxtrace_type = auxtrace_info->type;
2466 pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
2467 pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
2468 pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
2469 pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
2470 pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
2471 pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
2472 pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
2473 pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
2474 pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
2475 pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
2476 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
2477 INTEL_PT_PER_CPU_MMAPS);
2478
2479 if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
2480 pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
2481 pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
2482 pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
2483 pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
2484 pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
2485 intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
2486 INTEL_PT_CYC_BIT);
2487 }
2488
2489 if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
2490 pt->max_non_turbo_ratio =
2491 auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
2492 intel_pt_print_info(&auxtrace_info->priv[0],
2493 INTEL_PT_MAX_NONTURBO_RATIO,
2494 INTEL_PT_MAX_NONTURBO_RATIO);
2495 }
2496
2497 info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
2498 info_end = (void *)info + auxtrace_info->header.size;
2499
2500 if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
2501 size_t len;
2502
2503 len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
2504 intel_pt_print_info(&auxtrace_info->priv[0],
2505 INTEL_PT_FILTER_STR_LEN,
2506 INTEL_PT_FILTER_STR_LEN);
2507 if (len) {
2508 const char *filter = (const char *)info;
2509
2510 len = roundup(len + 1, 8);
2511 info += len >> 3;
2512 if ((void *)info > info_end) {
2513 pr_err("%s: bad filter string length\n", __func__);
2514 err = -EINVAL;
2515 goto err_free_queues;
2516 }
2517 pt->filter = memdup(filter, len);
2518 if (!pt->filter) {
2519 err = -ENOMEM;
2520 goto err_free_queues;
2521 }
2522 if (session->header.needs_swap)
2523 mem_bswap_64(pt->filter, len);
2524 if (pt->filter[len - 1]) {
2525 pr_err("%s: filter string not null terminated\n", __func__);
2526 err = -EINVAL;
2527 goto err_free_queues;
2528 }
2529 err = addr_filters__parse_bare_filter(&pt->filts,
2530 filter);
2531 if (err)
2532 goto err_free_queues;
2533 }
2534 intel_pt_print_info_str("Filter string", pt->filter);
2535 }
2536
2537 pt->timeless_decoding = intel_pt_timeless_decoding(pt);
2538 pt->have_tsc = intel_pt_have_tsc(pt);
2539 pt->sampling_mode = false;
2540 pt->est_tsc = !pt->timeless_decoding;
2541
2542 pt->unknown_thread = thread__new(999999999, 999999999);
2543 if (!pt->unknown_thread) {
2544 err = -ENOMEM;
2545 goto err_free_queues;
2546 }
2547
2548 /*
2549 * Since this thread will not be kept in any rbtree not in a
2550 * list, initialize its list node so that at thread__put() the
2551 * current thread lifetime assuption is kept and we don't segfault
2552 * at list_del_init().
2553 */
2554 INIT_LIST_HEAD(&pt->unknown_thread->node);
2555
2556 err = thread__set_comm(pt->unknown_thread, "unknown", 0);
2557 if (err)
2558 goto err_delete_thread;
2559 if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
2560 err = -ENOMEM;
2561 goto err_delete_thread;
2562 }
2563
2564 pt->auxtrace.process_event = intel_pt_process_event;
2565 pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
2566 pt->auxtrace.flush_events = intel_pt_flush;
2567 pt->auxtrace.free_events = intel_pt_free_events;
2568 pt->auxtrace.free = intel_pt_free;
2569 session->auxtrace = &pt->auxtrace;
2570
2571 if (dump_trace)
2572 return 0;
2573
2574 if (pt->have_sched_switch == 1) {
2575 pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
2576 if (!pt->switch_evsel) {
2577 pr_err("%s: missing sched_switch event\n", __func__);
2578 err = -EINVAL;
2579 goto err_delete_thread;
2580 }
2581 } else if (pt->have_sched_switch == 2 &&
2582 !intel_pt_find_switch(session->evlist)) {
2583 pr_err("%s: missing context_switch attribute flag\n", __func__);
2584 err = -EINVAL;
2585 goto err_delete_thread;
2586 }
2587
2588 if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
2589 pt->synth_opts = *session->itrace_synth_opts;
2590 } else {
2591 itrace_synth_opts__set_default(&pt->synth_opts);
2592 if (use_browser != -1) {
2593 pt->synth_opts.branches = false;
2594 pt->synth_opts.callchain = true;
2595 }
2596 if (session->itrace_synth_opts)
2597 pt->synth_opts.thread_stack =
2598 session->itrace_synth_opts->thread_stack;
2599 }
2600
2601 if (pt->synth_opts.log)
2602 intel_pt_log_enable();
2603
2604 /* Maximum non-turbo ratio is TSC freq / 100 MHz */
2605 if (pt->tc.time_mult) {
2606 u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
2607
2608 if (!pt->max_non_turbo_ratio)
2609 pt->max_non_turbo_ratio =
2610 (tsc_freq + 50000000) / 100000000;
2611 intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
2612 intel_pt_log("Maximum non-turbo ratio %u\n",
2613 pt->max_non_turbo_ratio);
2614 pt->cbr2khz = tsc_freq / pt->max_non_turbo_ratio / 1000;
2615 }
2616
2617 if (pt->synth_opts.calls)
2618 pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
2619 PERF_IP_FLAG_TRACE_END;
2620 if (pt->synth_opts.returns)
2621 pt->branches_filter |= PERF_IP_FLAG_RETURN |
2622 PERF_IP_FLAG_TRACE_BEGIN;
2623
2624 if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
2625 symbol_conf.use_callchain = true;
2626 if (callchain_register_param(&callchain_param) < 0) {
2627 symbol_conf.use_callchain = false;
2628 pt->synth_opts.callchain = false;
2629 }
2630 }
2631
2632 err = intel_pt_synth_events(pt, session);
2633 if (err)
2634 goto err_delete_thread;
2635
2636 err = auxtrace_queues__process_index(&pt->queues, session);
2637 if (err)
2638 goto err_delete_thread;
2639
2640 if (pt->queues.populated)
2641 pt->data_queued = true;
2642
2643 if (pt->timeless_decoding)
2644 pr_debug2("Intel PT decoding without timestamps\n");
2645
2646 return 0;
2647
2648 err_delete_thread:
2649 thread__zput(pt->unknown_thread);
2650 err_free_queues:
2651 intel_pt_log_disable();
2652 auxtrace_queues__free(&pt->queues);
2653 session->auxtrace = NULL;
2654 err_free:
2655 addr_filters__exit(&pt->filts);
2656 zfree(&pt->filter);
2657 free(pt);
2658 return err;
2659 }
Linux with added FPC-III support