?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
PNP: stop using the subsystem rwsem
[linux/fpc-iii.git] / drivers / kvm / mmu.c
blobcab26f301eab5caed62b1a3dcf8c4c7896b23d8b
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <asm/page.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
25
26 #include "vmx.h"
27 #include "kvm.h"
28
29 #undef MMU_DEBUG
30
31 #undef AUDIT
32
33 #ifdef AUDIT
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
35 #else
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
37 #endif
38
39 #ifdef MMU_DEBUG
40
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
43
44 #else
45
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
48
49 #endif
50
51 #if defined(MMU_DEBUG) || defined(AUDIT)
52 static int dbg = 1;
53 #endif
54
55 #define ASSERT(x) \
56 if (!(x)) { \
57 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
58 __FILE__, __LINE__, #x); \
59 }
60
61 #define PT64_PT_BITS 9
62 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
63 #define PT32_PT_BITS 10
64 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
65
66 #define PT_WRITABLE_SHIFT 1
67
68 #define PT_PRESENT_MASK (1ULL << 0)
69 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
70 #define PT_USER_MASK (1ULL << 2)
71 #define PT_PWT_MASK (1ULL << 3)
72 #define PT_PCD_MASK (1ULL << 4)
73 #define PT_ACCESSED_MASK (1ULL << 5)
74 #define PT_DIRTY_MASK (1ULL << 6)
75 #define PT_PAGE_SIZE_MASK (1ULL << 7)
76 #define PT_PAT_MASK (1ULL << 7)
77 #define PT_GLOBAL_MASK (1ULL << 8)
78 #define PT64_NX_MASK (1ULL << 63)
79
80 #define PT_PAT_SHIFT 7
81 #define PT_DIR_PAT_SHIFT 12
82 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
83
84 #define PT32_DIR_PSE36_SIZE 4
85 #define PT32_DIR_PSE36_SHIFT 13
86 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
87
88
89 #define PT32_PTE_COPY_MASK \
90 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
91
92 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
93
94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96
97 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
98 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
99
100 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
101 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
102
103 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
104 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
105
106 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
107
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
109
110 #define PT64_LEVEL_BITS 9
111
112 #define PT64_LEVEL_SHIFT(level) \
113 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
114
115 #define PT64_LEVEL_MASK(level) \
116 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
117
118 #define PT64_INDEX(address, level)\
119 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
120
121
122 #define PT32_LEVEL_BITS 10
123
124 #define PT32_LEVEL_SHIFT(level) \
125 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
126
127 #define PT32_LEVEL_MASK(level) \
128 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
129
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
132
133
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
137
138 #define PT32_BASE_ADDR_MASK PAGE_MASK
139 #define PT32_DIR_BASE_ADDR_MASK \
140 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
141
142
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
147
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
151
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
154
155 #define RMAP_EXT 4
156
157 struct kvm_rmap_desc {
158 u64 *shadow_ptes[RMAP_EXT];
159 struct kvm_rmap_desc *more;
160 };
161
162 static int is_write_protection(struct kvm_vcpu *vcpu)
163 {
164 return vcpu->cr0 & CR0_WP_MASK;
165 }
166
167 static int is_cpuid_PSE36(void)
168 {
169 return 1;
170 }
171
172 static int is_nx(struct kvm_vcpu *vcpu)
173 {
174 return vcpu->shadow_efer & EFER_NX;
175 }
176
177 static int is_present_pte(unsigned long pte)
178 {
179 return pte & PT_PRESENT_MASK;
180 }
181
182 static int is_writeble_pte(unsigned long pte)
183 {
184 return pte & PT_WRITABLE_MASK;
185 }
186
187 static int is_io_pte(unsigned long pte)
188 {
189 return pte & PT_SHADOW_IO_MARK;
190 }
191
192 static int is_rmap_pte(u64 pte)
193 {
194 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
195 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
196 }
197
198 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
199 size_t objsize, int min)
200 {
201 void *obj;
202
203 if (cache->nobjs >= min)
204 return 0;
205 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
206 obj = kzalloc(objsize, GFP_NOWAIT);
207 if (!obj)
208 return -ENOMEM;
209 cache->objects[cache->nobjs++] = obj;
210 }
211 return 0;
212 }
213
214 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
215 {
216 while (mc->nobjs)
217 kfree(mc->objects[--mc->nobjs]);
218 }
219
220 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
221 {
222 int r;
223
224 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
225 sizeof(struct kvm_pte_chain), 4);
226 if (r)
227 goto out;
228 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
229 sizeof(struct kvm_rmap_desc), 1);
230 out:
231 return r;
232 }
233
234 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
235 {
236 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
237 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
238 }
239
240 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
241 size_t size)
242 {
243 void *p;
244
245 BUG_ON(!mc->nobjs);
246 p = mc->objects[--mc->nobjs];
247 memset(p, 0, size);
248 return p;
249 }
250
251 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
252 {
253 if (mc->nobjs < KVM_NR_MEM_OBJS)
254 mc->objects[mc->nobjs++] = obj;
255 else
256 kfree(obj);
257 }
258
259 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
260 {
261 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
262 sizeof(struct kvm_pte_chain));
263 }
264
265 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
266 struct kvm_pte_chain *pc)
267 {
268 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
269 }
270
271 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
272 {
273 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
274 sizeof(struct kvm_rmap_desc));
275 }
276
277 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
278 struct kvm_rmap_desc *rd)
279 {
280 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
281 }
282
283 /*
284 * Reverse mapping data structures:
285 *
286 * If page->private bit zero is zero, then page->private points to the
287 * shadow page table entry that points to page_address(page).
288 *
289 * If page->private bit zero is one, (then page->private & ~1) points
290 * to a struct kvm_rmap_desc containing more mappings.
291 */
292 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
293 {
294 struct page *page;
295 struct kvm_rmap_desc *desc;
296 int i;
297
298 if (!is_rmap_pte(*spte))
299 return;
300 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
301 if (!page_private(page)) {
302 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
303 set_page_private(page,(unsigned long)spte);
304 } else if (!(page_private(page) & 1)) {
305 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
306 desc = mmu_alloc_rmap_desc(vcpu);
307 desc->shadow_ptes[0] = (u64 *)page_private(page);
308 desc->shadow_ptes[1] = spte;
309 set_page_private(page,(unsigned long)desc | 1);
310 } else {
311 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
312 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
313 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
314 desc = desc->more;
315 if (desc->shadow_ptes[RMAP_EXT-1]) {
316 desc->more = mmu_alloc_rmap_desc(vcpu);
317 desc = desc->more;
318 }
319 for (i = 0; desc->shadow_ptes[i]; ++i)
320 ;
321 desc->shadow_ptes[i] = spte;
322 }
323 }
324
325 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
326 struct page *page,
327 struct kvm_rmap_desc *desc,
328 int i,
329 struct kvm_rmap_desc *prev_desc)
330 {
331 int j;
332
333 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
334 ;
335 desc->shadow_ptes[i] = desc->shadow_ptes[j];
336 desc->shadow_ptes[j] = NULL;
337 if (j != 0)
338 return;
339 if (!prev_desc && !desc->more)
340 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
341 else
342 if (prev_desc)
343 prev_desc->more = desc->more;
344 else
345 set_page_private(page,(unsigned long)desc->more | 1);
346 mmu_free_rmap_desc(vcpu, desc);
347 }
348
349 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
350 {
351 struct page *page;
352 struct kvm_rmap_desc *desc;
353 struct kvm_rmap_desc *prev_desc;
354 int i;
355
356 if (!is_rmap_pte(*spte))
357 return;
358 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
359 if (!page_private(page)) {
360 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
361 BUG();
362 } else if (!(page_private(page) & 1)) {
363 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
364 if ((u64 *)page_private(page) != spte) {
365 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
366 spte, *spte);
367 BUG();
368 }
369 set_page_private(page,0);
370 } else {
371 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
372 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
373 prev_desc = NULL;
374 while (desc) {
375 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
376 if (desc->shadow_ptes[i] == spte) {
377 rmap_desc_remove_entry(vcpu, page,
378 desc, i,
379 prev_desc);
380 return;
381 }
382 prev_desc = desc;
383 desc = desc->more;
384 }
385 BUG();
386 }
387 }
388
389 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
390 {
391 struct kvm *kvm = vcpu->kvm;
392 struct page *page;
393 struct kvm_memory_slot *slot;
394 struct kvm_rmap_desc *desc;
395 u64 *spte;
396
397 slot = gfn_to_memslot(kvm, gfn);
398 BUG_ON(!slot);
399 page = gfn_to_page(slot, gfn);
400
401 while (page_private(page)) {
402 if (!(page_private(page) & 1))
403 spte = (u64 *)page_private(page);
404 else {
405 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
406 spte = desc->shadow_ptes[0];
407 }
408 BUG_ON(!spte);
409 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
410 != page_to_pfn(page));
411 BUG_ON(!(*spte & PT_PRESENT_MASK));
412 BUG_ON(!(*spte & PT_WRITABLE_MASK));
413 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
414 rmap_remove(vcpu, spte);
415 kvm_arch_ops->tlb_flush(vcpu);
416 *spte &= ~(u64)PT_WRITABLE_MASK;
417 }
418 }
419
420 static int is_empty_shadow_page(hpa_t page_hpa)
421 {
422 u64 *pos;
423 u64 *end;
424
425 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
426 pos != end; pos++)
427 if (*pos != 0) {
428 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
429 pos, *pos);
430 return 0;
431 }
432 return 1;
433 }
434
435 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
436 {
437 struct kvm_mmu_page *page_head = page_header(page_hpa);
438
439 ASSERT(is_empty_shadow_page(page_hpa));
440 list_del(&page_head->link);
441 page_head->page_hpa = page_hpa;
442 list_add(&page_head->link, &vcpu->free_pages);
443 ++vcpu->kvm->n_free_mmu_pages;
444 }
445
446 static unsigned kvm_page_table_hashfn(gfn_t gfn)
447 {
448 return gfn;
449 }
450
451 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
452 u64 *parent_pte)
453 {
454 struct kvm_mmu_page *page;
455
456 if (list_empty(&vcpu->free_pages))
457 return NULL;
458
459 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
460 list_del(&page->link);
461 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
462 ASSERT(is_empty_shadow_page(page->page_hpa));
463 page->slot_bitmap = 0;
464 page->global = 1;
465 page->multimapped = 0;
466 page->parent_pte = parent_pte;
467 --vcpu->kvm->n_free_mmu_pages;
468 return page;
469 }
470
471 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
472 struct kvm_mmu_page *page, u64 *parent_pte)
473 {
474 struct kvm_pte_chain *pte_chain;
475 struct hlist_node *node;
476 int i;
477
478 if (!parent_pte)
479 return;
480 if (!page->multimapped) {
481 u64 *old = page->parent_pte;
482
483 if (!old) {
484 page->parent_pte = parent_pte;
485 return;
486 }
487 page->multimapped = 1;
488 pte_chain = mmu_alloc_pte_chain(vcpu);
489 INIT_HLIST_HEAD(&page->parent_ptes);
490 hlist_add_head(&pte_chain->link, &page->parent_ptes);
491 pte_chain->parent_ptes[0] = old;
492 }
493 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
494 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
495 continue;
496 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
497 if (!pte_chain->parent_ptes[i]) {
498 pte_chain->parent_ptes[i] = parent_pte;
499 return;
500 }
501 }
502 pte_chain = mmu_alloc_pte_chain(vcpu);
503 BUG_ON(!pte_chain);
504 hlist_add_head(&pte_chain->link, &page->parent_ptes);
505 pte_chain->parent_ptes[0] = parent_pte;
506 }
507
508 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
509 struct kvm_mmu_page *page,
510 u64 *parent_pte)
511 {
512 struct kvm_pte_chain *pte_chain;
513 struct hlist_node *node;
514 int i;
515
516 if (!page->multimapped) {
517 BUG_ON(page->parent_pte != parent_pte);
518 page->parent_pte = NULL;
519 return;
520 }
521 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
522 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
523 if (!pte_chain->parent_ptes[i])
524 break;
525 if (pte_chain->parent_ptes[i] != parent_pte)
526 continue;
527 while (i + 1 < NR_PTE_CHAIN_ENTRIES
528 && pte_chain->parent_ptes[i + 1]) {
529 pte_chain->parent_ptes[i]
530 = pte_chain->parent_ptes[i + 1];
531 ++i;
532 }
533 pte_chain->parent_ptes[i] = NULL;
534 if (i == 0) {
535 hlist_del(&pte_chain->link);
536 mmu_free_pte_chain(vcpu, pte_chain);
537 if (hlist_empty(&page->parent_ptes)) {
538 page->multimapped = 0;
539 page->parent_pte = NULL;
540 }
541 }
542 return;
543 }
544 BUG();
545 }
546
547 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
548 gfn_t gfn)
549 {
550 unsigned index;
551 struct hlist_head *bucket;
552 struct kvm_mmu_page *page;
553 struct hlist_node *node;
554
555 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
556 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
557 bucket = &vcpu->kvm->mmu_page_hash[index];
558 hlist_for_each_entry(page, node, bucket, hash_link)
559 if (page->gfn == gfn && !page->role.metaphysical) {
560 pgprintk("%s: found role %x\n",
561 __FUNCTION__, page->role.word);
562 return page;
563 }
564 return NULL;
565 }
566
567 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
568 gfn_t gfn,
569 gva_t gaddr,
570 unsigned level,
571 int metaphysical,
572 u64 *parent_pte)
573 {
574 union kvm_mmu_page_role role;
575 unsigned index;
576 unsigned quadrant;
577 struct hlist_head *bucket;
578 struct kvm_mmu_page *page;
579 struct hlist_node *node;
580
581 role.word = 0;
582 role.glevels = vcpu->mmu.root_level;
583 role.level = level;
584 role.metaphysical = metaphysical;
585 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
586 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
587 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
588 role.quadrant = quadrant;
589 }
590 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
591 gfn, role.word);
592 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
593 bucket = &vcpu->kvm->mmu_page_hash[index];
594 hlist_for_each_entry(page, node, bucket, hash_link)
595 if (page->gfn == gfn && page->role.word == role.word) {
596 mmu_page_add_parent_pte(vcpu, page, parent_pte);
597 pgprintk("%s: found\n", __FUNCTION__);
598 return page;
599 }
600 page = kvm_mmu_alloc_page(vcpu, parent_pte);
601 if (!page)
602 return page;
603 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
604 page->gfn = gfn;
605 page->role = role;
606 hlist_add_head(&page->hash_link, bucket);
607 if (!metaphysical)
608 rmap_write_protect(vcpu, gfn);
609 return page;
610 }
611
612 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
613 struct kvm_mmu_page *page)
614 {
615 unsigned i;
616 u64 *pt;
617 u64 ent;
618
619 pt = __va(page->page_hpa);
620
621 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
622 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
623 if (pt[i] & PT_PRESENT_MASK)
624 rmap_remove(vcpu, &pt[i]);
625 pt[i] = 0;
626 }
627 kvm_arch_ops->tlb_flush(vcpu);
628 return;
629 }
630
631 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
632 ent = pt[i];
633
634 pt[i] = 0;
635 if (!(ent & PT_PRESENT_MASK))
636 continue;
637 ent &= PT64_BASE_ADDR_MASK;
638 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
639 }
640 }
641
642 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
643 struct kvm_mmu_page *page,
644 u64 *parent_pte)
645 {
646 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
647 }
648
649 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
650 struct kvm_mmu_page *page)
651 {
652 u64 *parent_pte;
653
654 while (page->multimapped || page->parent_pte) {
655 if (!page->multimapped)
656 parent_pte = page->parent_pte;
657 else {
658 struct kvm_pte_chain *chain;
659
660 chain = container_of(page->parent_ptes.first,
661 struct kvm_pte_chain, link);
662 parent_pte = chain->parent_ptes[0];
663 }
664 BUG_ON(!parent_pte);
665 kvm_mmu_put_page(vcpu, page, parent_pte);
666 *parent_pte = 0;
667 }
668 kvm_mmu_page_unlink_children(vcpu, page);
669 if (!page->root_count) {
670 hlist_del(&page->hash_link);
671 kvm_mmu_free_page(vcpu, page->page_hpa);
672 } else {
673 list_del(&page->link);
674 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
675 }
676 }
677
678 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
679 {
680 unsigned index;
681 struct hlist_head *bucket;
682 struct kvm_mmu_page *page;
683 struct hlist_node *node, *n;
684 int r;
685
686 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
687 r = 0;
688 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
689 bucket = &vcpu->kvm->mmu_page_hash[index];
690 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
691 if (page->gfn == gfn && !page->role.metaphysical) {
692 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
693 page->role.word);
694 kvm_mmu_zap_page(vcpu, page);
695 r = 1;
696 }
697 return r;
698 }
699
700 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
701 {
702 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
703 struct kvm_mmu_page *page_head = page_header(__pa(pte));
704
705 __set_bit(slot, &page_head->slot_bitmap);
706 }
707
708 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
709 {
710 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
711
712 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
713 }
714
715 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
716 {
717 struct kvm_memory_slot *slot;
718 struct page *page;
719
720 ASSERT((gpa & HPA_ERR_MASK) == 0);
721 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
722 if (!slot)
723 return gpa | HPA_ERR_MASK;
724 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
725 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
726 | (gpa & (PAGE_SIZE-1));
727 }
728
729 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
730 {
731 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
732
733 if (gpa == UNMAPPED_GVA)
734 return UNMAPPED_GVA;
735 return gpa_to_hpa(vcpu, gpa);
736 }
737
738 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
739 {
740 }
741
742 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
743 {
744 int level = PT32E_ROOT_LEVEL;
745 hpa_t table_addr = vcpu->mmu.root_hpa;
746
747 for (; ; level--) {
748 u32 index = PT64_INDEX(v, level);
749 u64 *table;
750 u64 pte;
751
752 ASSERT(VALID_PAGE(table_addr));
753 table = __va(table_addr);
754
755 if (level == 1) {
756 pte = table[index];
757 if (is_present_pte(pte) && is_writeble_pte(pte))
758 return 0;
759 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
760 page_header_update_slot(vcpu->kvm, table, v);
761 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
762 PT_USER_MASK;
763 rmap_add(vcpu, &table[index]);
764 return 0;
765 }
766
767 if (table[index] == 0) {
768 struct kvm_mmu_page *new_table;
769 gfn_t pseudo_gfn;
770
771 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
772 >> PAGE_SHIFT;
773 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
774 v, level - 1,
775 1, &table[index]);
776 if (!new_table) {
777 pgprintk("nonpaging_map: ENOMEM\n");
778 return -ENOMEM;
779 }
780
781 table[index] = new_table->page_hpa | PT_PRESENT_MASK
782 | PT_WRITABLE_MASK | PT_USER_MASK;
783 }
784 table_addr = table[index] & PT64_BASE_ADDR_MASK;
785 }
786 }
787
788 static void mmu_free_roots(struct kvm_vcpu *vcpu)
789 {
790 int i;
791 struct kvm_mmu_page *page;
792
793 #ifdef CONFIG_X86_64
794 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
795 hpa_t root = vcpu->mmu.root_hpa;
796
797 ASSERT(VALID_PAGE(root));
798 page = page_header(root);
799 --page->root_count;
800 vcpu->mmu.root_hpa = INVALID_PAGE;
801 return;
802 }
803 #endif
804 for (i = 0; i < 4; ++i) {
805 hpa_t root = vcpu->mmu.pae_root[i];
806
807 ASSERT(VALID_PAGE(root));
808 root &= PT64_BASE_ADDR_MASK;
809 page = page_header(root);
810 --page->root_count;
811 vcpu->mmu.pae_root[i] = INVALID_PAGE;
812 }
813 vcpu->mmu.root_hpa = INVALID_PAGE;
814 }
815
816 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
817 {
818 int i;
819 gfn_t root_gfn;
820 struct kvm_mmu_page *page;
821
822 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
823
824 #ifdef CONFIG_X86_64
825 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
826 hpa_t root = vcpu->mmu.root_hpa;
827
828 ASSERT(!VALID_PAGE(root));
829 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
830 PT64_ROOT_LEVEL, 0, NULL);
831 root = page->page_hpa;
832 ++page->root_count;
833 vcpu->mmu.root_hpa = root;
834 return;
835 }
836 #endif
837 for (i = 0; i < 4; ++i) {
838 hpa_t root = vcpu->mmu.pae_root[i];
839
840 ASSERT(!VALID_PAGE(root));
841 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
842 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
843 else if (vcpu->mmu.root_level == 0)
844 root_gfn = 0;
845 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
846 PT32_ROOT_LEVEL, !is_paging(vcpu),
847 NULL);
848 root = page->page_hpa;
849 ++page->root_count;
850 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
851 }
852 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
853 }
854
855 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
856 {
857 return vaddr;
858 }
859
860 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
861 u32 error_code)
862 {
863 gpa_t addr = gva;
864 hpa_t paddr;
865 int r;
866
867 r = mmu_topup_memory_caches(vcpu);
868 if (r)
869 return r;
870
871 ASSERT(vcpu);
872 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
873
874
875 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
876
877 if (is_error_hpa(paddr))
878 return 1;
879
880 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
881 }
882
883 static void nonpaging_free(struct kvm_vcpu *vcpu)
884 {
885 mmu_free_roots(vcpu);
886 }
887
888 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
889 {
890 struct kvm_mmu *context = &vcpu->mmu;
891
892 context->new_cr3 = nonpaging_new_cr3;
893 context->page_fault = nonpaging_page_fault;
894 context->gva_to_gpa = nonpaging_gva_to_gpa;
895 context->free = nonpaging_free;
896 context->root_level = 0;
897 context->shadow_root_level = PT32E_ROOT_LEVEL;
898 mmu_alloc_roots(vcpu);
899 ASSERT(VALID_PAGE(context->root_hpa));
900 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
901 return 0;
902 }
903
904 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
905 {
906 ++kvm_stat.tlb_flush;
907 kvm_arch_ops->tlb_flush(vcpu);
908 }
909
910 static void paging_new_cr3(struct kvm_vcpu *vcpu)
911 {
912 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
913 mmu_free_roots(vcpu);
914 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
915 kvm_mmu_free_some_pages(vcpu);
916 mmu_alloc_roots(vcpu);
917 kvm_mmu_flush_tlb(vcpu);
918 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
919 }
920
921 static void mark_pagetable_nonglobal(void *shadow_pte)
922 {
923 page_header(__pa(shadow_pte))->global = 0;
924 }
925
926 static inline void set_pte_common(struct kvm_vcpu *vcpu,
927 u64 *shadow_pte,
928 gpa_t gaddr,
929 int dirty,
930 u64 access_bits,
931 gfn_t gfn)
932 {
933 hpa_t paddr;
934
935 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
936 if (!dirty)
937 access_bits &= ~PT_WRITABLE_MASK;
938
939 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
940
941 *shadow_pte |= access_bits;
942
943 if (!(*shadow_pte & PT_GLOBAL_MASK))
944 mark_pagetable_nonglobal(shadow_pte);
945
946 if (is_error_hpa(paddr)) {
947 *shadow_pte |= gaddr;
948 *shadow_pte |= PT_SHADOW_IO_MARK;
949 *shadow_pte &= ~PT_PRESENT_MASK;
950 return;
951 }
952
953 *shadow_pte |= paddr;
954
955 if (access_bits & PT_WRITABLE_MASK) {
956 struct kvm_mmu_page *shadow;
957
958 shadow = kvm_mmu_lookup_page(vcpu, gfn);
959 if (shadow) {
960 pgprintk("%s: found shadow page for %lx, marking ro\n",
961 __FUNCTION__, gfn);
962 access_bits &= ~PT_WRITABLE_MASK;
963 if (is_writeble_pte(*shadow_pte)) {
964 *shadow_pte &= ~PT_WRITABLE_MASK;
965 kvm_arch_ops->tlb_flush(vcpu);
966 }
967 }
968 }
969
970 if (access_bits & PT_WRITABLE_MASK)
971 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
972
973 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
974 rmap_add(vcpu, shadow_pte);
975 }
976
977 static void inject_page_fault(struct kvm_vcpu *vcpu,
978 u64 addr,
979 u32 err_code)
980 {
981 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
982 }
983
984 static inline int fix_read_pf(u64 *shadow_ent)
985 {
986 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
987 !(*shadow_ent & PT_USER_MASK)) {
988 /*
989 * If supervisor write protect is disabled, we shadow kernel
990 * pages as user pages so we can trap the write access.
991 */
992 *shadow_ent |= PT_USER_MASK;
993 *shadow_ent &= ~PT_WRITABLE_MASK;
994
995 return 1;
996
997 }
998 return 0;
999 }
1000
1001 static void paging_free(struct kvm_vcpu *vcpu)
1002 {
1003 nonpaging_free(vcpu);
1004 }
1005
1006 #define PTTYPE 64
1007 #include "paging_tmpl.h"
1008 #undef PTTYPE
1009
1010 #define PTTYPE 32
1011 #include "paging_tmpl.h"
1012 #undef PTTYPE
1013
1014 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1015 {
1016 struct kvm_mmu *context = &vcpu->mmu;
1017
1018 ASSERT(is_pae(vcpu));
1019 context->new_cr3 = paging_new_cr3;
1020 context->page_fault = paging64_page_fault;
1021 context->gva_to_gpa = paging64_gva_to_gpa;
1022 context->free = paging_free;
1023 context->root_level = level;
1024 context->shadow_root_level = level;
1025 mmu_alloc_roots(vcpu);
1026 ASSERT(VALID_PAGE(context->root_hpa));
1027 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1028 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1029 return 0;
1030 }
1031
1032 static int paging64_init_context(struct kvm_vcpu *vcpu)
1033 {
1034 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1035 }
1036
1037 static int paging32_init_context(struct kvm_vcpu *vcpu)
1038 {
1039 struct kvm_mmu *context = &vcpu->mmu;
1040
1041 context->new_cr3 = paging_new_cr3;
1042 context->page_fault = paging32_page_fault;
1043 context->gva_to_gpa = paging32_gva_to_gpa;
1044 context->free = paging_free;
1045 context->root_level = PT32_ROOT_LEVEL;
1046 context->shadow_root_level = PT32E_ROOT_LEVEL;
1047 mmu_alloc_roots(vcpu);
1048 ASSERT(VALID_PAGE(context->root_hpa));
1049 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1050 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1051 return 0;
1052 }
1053
1054 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1055 {
1056 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1057 }
1058
1059 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1060 {
1061 ASSERT(vcpu);
1062 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1063
1064 if (!is_paging(vcpu))
1065 return nonpaging_init_context(vcpu);
1066 else if (is_long_mode(vcpu))
1067 return paging64_init_context(vcpu);
1068 else if (is_pae(vcpu))
1069 return paging32E_init_context(vcpu);
1070 else
1071 return paging32_init_context(vcpu);
1072 }
1073
1074 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1075 {
1076 ASSERT(vcpu);
1077 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1078 vcpu->mmu.free(vcpu);
1079 vcpu->mmu.root_hpa = INVALID_PAGE;
1080 }
1081 }
1082
1083 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1084 {
1085 int r;
1086
1087 destroy_kvm_mmu(vcpu);
1088 r = init_kvm_mmu(vcpu);
1089 if (r < 0)
1090 goto out;
1091 r = mmu_topup_memory_caches(vcpu);
1092 out:
1093 return r;
1094 }
1095
1096 static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu,
1097 struct kvm_mmu_page *page,
1098 u64 *spte)
1099 {
1100 u64 pte;
1101 struct kvm_mmu_page *child;
1102
1103 pte = *spte;
1104 if (is_present_pte(pte)) {
1105 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1106 rmap_remove(vcpu, spte);
1107 else {
1108 child = page_header(pte & PT64_BASE_ADDR_MASK);
1109 mmu_page_remove_parent_pte(vcpu, child, spte);
1110 }
1111 }
1112 *spte = 0;
1113 }
1114
1115 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1116 {
1117 gfn_t gfn = gpa >> PAGE_SHIFT;
1118 struct kvm_mmu_page *page;
1119 struct hlist_node *node, *n;
1120 struct hlist_head *bucket;
1121 unsigned index;
1122 u64 *spte;
1123 unsigned offset = offset_in_page(gpa);
1124 unsigned pte_size;
1125 unsigned page_offset;
1126 unsigned misaligned;
1127 int level;
1128 int flooded = 0;
1129 int npte;
1130
1131 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1132 if (gfn == vcpu->last_pt_write_gfn) {
1133 ++vcpu->last_pt_write_count;
1134 if (vcpu->last_pt_write_count >= 3)
1135 flooded = 1;
1136 } else {
1137 vcpu->last_pt_write_gfn = gfn;
1138 vcpu->last_pt_write_count = 1;
1139 }
1140 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1141 bucket = &vcpu->kvm->mmu_page_hash[index];
1142 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1143 if (page->gfn != gfn || page->role.metaphysical)
1144 continue;
1145 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1146 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1147 if (misaligned || flooded) {
1148 /*
1149 * Misaligned accesses are too much trouble to fix
1150 * up; also, they usually indicate a page is not used
1151 * as a page table.
1152 *
1153 * If we're seeing too many writes to a page,
1154 * it may no longer be a page table, or we may be
1155 * forking, in which case it is better to unmap the
1156 * page.
1157 */
1158 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1159 gpa, bytes, page->role.word);
1160 kvm_mmu_zap_page(vcpu, page);
1161 continue;
1162 }
1163 page_offset = offset;
1164 level = page->role.level;
1165 npte = 1;
1166 if (page->role.glevels == PT32_ROOT_LEVEL) {
1167 page_offset <<= 1; /* 32->64 */
1168 /*
1169 * A 32-bit pde maps 4MB while the shadow pdes map
1170 * only 2MB. So we need to double the offset again
1171 * and zap two pdes instead of one.
1172 */
1173 if (level == PT32_ROOT_LEVEL) {
1174 page_offset &= ~7; /* kill rounding error */
1175 page_offset <<= 1;
1176 npte = 2;
1177 }
1178 page_offset &= ~PAGE_MASK;
1179 }
1180 spte = __va(page->page_hpa);
1181 spte += page_offset / sizeof(*spte);
1182 while (npte--) {
1183 mmu_pre_write_zap_pte(vcpu, page, spte);
1184 ++spte;
1185 }
1186 }
1187 }
1188
1189 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1190 {
1191 }
1192
1193 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1194 {
1195 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1196
1197 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1198 }
1199
1200 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1201 {
1202 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1203 struct kvm_mmu_page *page;
1204
1205 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1206 struct kvm_mmu_page, link);
1207 kvm_mmu_zap_page(vcpu, page);
1208 }
1209 }
1210 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1211
1212 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1213 {
1214 struct kvm_mmu_page *page;
1215
1216 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1217 page = container_of(vcpu->kvm->active_mmu_pages.next,
1218 struct kvm_mmu_page, link);
1219 kvm_mmu_zap_page(vcpu, page);
1220 }
1221 while (!list_empty(&vcpu->free_pages)) {
1222 page = list_entry(vcpu->free_pages.next,
1223 struct kvm_mmu_page, link);
1224 list_del(&page->link);
1225 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1226 page->page_hpa = INVALID_PAGE;
1227 }
1228 free_page((unsigned long)vcpu->mmu.pae_root);
1229 }
1230
1231 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1232 {
1233 struct page *page;
1234 int i;
1235
1236 ASSERT(vcpu);
1237
1238 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1239 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1240
1241 INIT_LIST_HEAD(&page_header->link);
1242 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1243 goto error_1;
1244 set_page_private(page, (unsigned long)page_header);
1245 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1246 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1247 list_add(&page_header->link, &vcpu->free_pages);
1248 ++vcpu->kvm->n_free_mmu_pages;
1249 }
1250
1251 /*
1252 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1253 * Therefore we need to allocate shadow page tables in the first
1254 * 4GB of memory, which happens to fit the DMA32 zone.
1255 */
1256 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1257 if (!page)
1258 goto error_1;
1259 vcpu->mmu.pae_root = page_address(page);
1260 for (i = 0; i < 4; ++i)
1261 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1262
1263 return 0;
1264
1265 error_1:
1266 free_mmu_pages(vcpu);
1267 return -ENOMEM;
1268 }
1269
1270 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1271 {
1272 ASSERT(vcpu);
1273 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1274 ASSERT(list_empty(&vcpu->free_pages));
1275
1276 return alloc_mmu_pages(vcpu);
1277 }
1278
1279 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1280 {
1281 ASSERT(vcpu);
1282 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1283 ASSERT(!list_empty(&vcpu->free_pages));
1284
1285 return init_kvm_mmu(vcpu);
1286 }
1287
1288 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1289 {
1290 ASSERT(vcpu);
1291
1292 destroy_kvm_mmu(vcpu);
1293 free_mmu_pages(vcpu);
1294 mmu_free_memory_caches(vcpu);
1295 }
1296
1297 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1298 {
1299 struct kvm *kvm = vcpu->kvm;
1300 struct kvm_mmu_page *page;
1301
1302 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1303 int i;
1304 u64 *pt;
1305
1306 if (!test_bit(slot, &page->slot_bitmap))
1307 continue;
1308
1309 pt = __va(page->page_hpa);
1310 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1311 /* avoid RMW */
1312 if (pt[i] & PT_WRITABLE_MASK) {
1313 rmap_remove(vcpu, &pt[i]);
1314 pt[i] &= ~PT_WRITABLE_MASK;
1315 }
1316 }
1317 }
1318
1319 #ifdef AUDIT
1320
1321 static const char *audit_msg;
1322
1323 static gva_t canonicalize(gva_t gva)
1324 {
1325 #ifdef CONFIG_X86_64
1326 gva = (long long)(gva << 16) >> 16;
1327 #endif
1328 return gva;
1329 }
1330
1331 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1332 gva_t va, int level)
1333 {
1334 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1335 int i;
1336 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1337
1338 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1339 u64 ent = pt[i];
1340
1341 if (!ent & PT_PRESENT_MASK)
1342 continue;
1343
1344 va = canonicalize(va);
1345 if (level > 1)
1346 audit_mappings_page(vcpu, ent, va, level - 1);
1347 else {
1348 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1349 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1350
1351 if ((ent & PT_PRESENT_MASK)
1352 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1353 printk(KERN_ERR "audit error: (%s) levels %d"
1354 " gva %lx gpa %llx hpa %llx ent %llx\n",
1355 audit_msg, vcpu->mmu.root_level,
1356 va, gpa, hpa, ent);
1357 }
1358 }
1359 }
1360
1361 static void audit_mappings(struct kvm_vcpu *vcpu)
1362 {
1363 int i;
1364
1365 if (vcpu->mmu.root_level == 4)
1366 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1367 else
1368 for (i = 0; i < 4; ++i)
1369 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1370 audit_mappings_page(vcpu,
1371 vcpu->mmu.pae_root[i],
1372 i << 30,
1373 2);
1374 }
1375
1376 static int count_rmaps(struct kvm_vcpu *vcpu)
1377 {
1378 int nmaps = 0;
1379 int i, j, k;
1380
1381 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1382 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1383 struct kvm_rmap_desc *d;
1384
1385 for (j = 0; j < m->npages; ++j) {
1386 struct page *page = m->phys_mem[j];
1387
1388 if (!page->private)
1389 continue;
1390 if (!(page->private & 1)) {
1391 ++nmaps;
1392 continue;
1393 }
1394 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1395 while (d) {
1396 for (k = 0; k < RMAP_EXT; ++k)
1397 if (d->shadow_ptes[k])
1398 ++nmaps;
1399 else
1400 break;
1401 d = d->more;
1402 }
1403 }
1404 }
1405 return nmaps;
1406 }
1407
1408 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1409 {
1410 int nmaps = 0;
1411 struct kvm_mmu_page *page;
1412 int i;
1413
1414 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1415 u64 *pt = __va(page->page_hpa);
1416
1417 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1418 continue;
1419
1420 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1421 u64 ent = pt[i];
1422
1423 if (!(ent & PT_PRESENT_MASK))
1424 continue;
1425 if (!(ent & PT_WRITABLE_MASK))
1426 continue;
1427 ++nmaps;
1428 }
1429 }
1430 return nmaps;
1431 }
1432
1433 static void audit_rmap(struct kvm_vcpu *vcpu)
1434 {
1435 int n_rmap = count_rmaps(vcpu);
1436 int n_actual = count_writable_mappings(vcpu);
1437
1438 if (n_rmap != n_actual)
1439 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1440 __FUNCTION__, audit_msg, n_rmap, n_actual);
1441 }
1442
1443 static void audit_write_protection(struct kvm_vcpu *vcpu)
1444 {
1445 struct kvm_mmu_page *page;
1446
1447 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1448 hfn_t hfn;
1449 struct page *pg;
1450
1451 if (page->role.metaphysical)
1452 continue;
1453
1454 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1455 >> PAGE_SHIFT;
1456 pg = pfn_to_page(hfn);
1457 if (pg->private)
1458 printk(KERN_ERR "%s: (%s) shadow page has writable"
1459 " mappings: gfn %lx role %x\n",
1460 __FUNCTION__, audit_msg, page->gfn,
1461 page->role.word);
1462 }
1463 }
1464
1465 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1466 {
1467 int olddbg = dbg;
1468
1469 dbg = 0;
1470 audit_msg = msg;
1471 audit_rmap(vcpu);
1472 audit_write_protection(vcpu);
1473 audit_mappings(vcpu);
1474 dbg = olddbg;
1475 }
1476
1477 #endif
Linux with added FPC-III support