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[linux/fpc-iii.git] / sound / i2c / cs8427.c
blobe57e9cbe6a0f99aa36d8090a222c91b76b555771
1 /*
2 * Routines for control of the CS8427 via i2c bus
3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/slab.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <sound/core.h>
27 #include <sound/control.h>
28 #include <sound/pcm.h>
29 #include <sound/cs8427.h>
30 #include <sound/asoundef.h>
32 static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
34 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
35 MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
36 MODULE_LICENSE("GPL");
38 #define CS8427_ADDR (0x20>>1) /* fixed address */
40 struct cs8427_stream {
41 struct snd_pcm_substream *substream;
42 char hw_status[24]; /* hardware status */
43 char def_status[24]; /* default status */
44 char pcm_status[24]; /* PCM private status */
45 char hw_udata[32];
46 struct snd_kcontrol *pcm_ctl;
49 struct cs8427 {
50 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
51 unsigned int rate;
52 unsigned int reset_timeout;
53 struct cs8427_stream playback;
54 struct cs8427_stream capture;
57 static unsigned char swapbits(unsigned char val)
59 int bit;
60 unsigned char res = 0;
61 for (bit = 0; bit < 8; bit++) {
62 res <<= 1;
63 res |= val & 1;
64 val >>= 1;
66 return res;
69 int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
70 unsigned char val)
72 int err;
73 unsigned char buf[2];
75 buf[0] = reg & 0x7f;
76 buf[1] = val;
77 if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
78 snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
79 "to CS8427 (%i)\n", buf[0], buf[1], err);
80 return err < 0 ? err : -EIO;
82 return 0;
85 EXPORT_SYMBOL(snd_cs8427_reg_write);
87 static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
89 int err;
90 unsigned char buf;
92 if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
93 snd_printk(KERN_ERR "unable to send register 0x%x byte "
94 "to CS8427\n", reg);
95 return err < 0 ? err : -EIO;
97 if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
98 snd_printk(KERN_ERR "unable to read register 0x%x byte "
99 "from CS8427\n", reg);
100 return err < 0 ? err : -EIO;
102 return buf;
105 static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
107 struct cs8427 *chip = device->private_data;
108 int err;
110 udata = udata ? CS8427_BSEL : 0;
111 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
112 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
113 chip->regmap[CS8427_REG_CSDATABUF] |= udata;
114 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
115 chip->regmap[CS8427_REG_CSDATABUF]);
116 if (err < 0)
117 return err;
119 return 0;
122 static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
123 int udata,
124 unsigned char *ndata,
125 int count)
127 struct cs8427 *chip = device->private_data;
128 char *hw_data = udata ?
129 chip->playback.hw_udata : chip->playback.hw_status;
130 char data[32];
131 int err, idx;
133 if (!memcmp(hw_data, ndata, count))
134 return 0;
135 if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
136 return err;
137 memcpy(hw_data, ndata, count);
138 if (udata) {
139 memset(data, 0, sizeof(data));
140 if (memcmp(hw_data, data, count) == 0) {
141 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
142 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
143 CS8427_EFTUI;
144 err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
145 chip->regmap[CS8427_REG_UDATABUF]);
146 return err < 0 ? err : 0;
149 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
150 for (idx = 0; idx < count; idx++)
151 data[idx + 1] = swapbits(ndata[idx]);
152 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
153 return -EIO;
154 return 1;
157 static void snd_cs8427_free(struct snd_i2c_device *device)
159 kfree(device->private_data);
162 int snd_cs8427_create(struct snd_i2c_bus *bus,
163 unsigned char addr,
164 unsigned int reset_timeout,
165 struct snd_i2c_device **r_cs8427)
167 static unsigned char initvals1[] = {
168 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
169 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
170 TCBL=output */
171 CS8427_SWCLK | CS8427_TCBLDIR,
172 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
173 normal stereo operation */
174 0x00,
175 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
176 Rx=>serial */
177 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
178 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
179 output time base = OMCK, input time base = recovered input clock,
180 recovered input clock source is ILRCK changed to AES3INPUT
181 (workaround, see snd_cs8427_reset) */
182 CS8427_RXDILRCK,
183 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
184 24-bit, 64*Fsi */
185 CS8427_SIDEL | CS8427_SILRPOL,
186 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
187 = I2S, 24-bit, 64*Fsi */
188 CS8427_SODEL | CS8427_SOLRPOL,
190 static unsigned char initvals2[] = {
191 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
192 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
193 biphase, parity status bits */
194 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
195 0xff, /* set everything */
196 /* CS8427_REG_CSDATABUF:
197 Registers 32-55 window to CS buffer
198 Inhibit D->E transfers from overwriting first 5 bytes of CS data.
199 Inhibit D->E transfers (all) of CS data.
200 Allow E->F transfer of CS data.
201 One byte mode; both A/B channels get same written CB data.
202 A channel info is output to chip's EMPH* pin. */
203 CS8427_CBMR | CS8427_DETCI,
204 /* CS8427_REG_UDATABUF:
205 Use internal buffer to transmit User (U) data.
206 Chip's U pin is an output.
207 Transmit all O's for user data.
208 Inhibit D->E transfers.
209 Inhibit E->F transfers. */
210 CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
212 int err;
213 struct cs8427 *chip;
214 struct snd_i2c_device *device;
215 unsigned char buf[24];
217 if ((err = snd_i2c_device_create(bus, "CS8427",
218 CS8427_ADDR | (addr & 7),
219 &device)) < 0)
220 return err;
221 chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
222 if (chip == NULL) {
223 snd_i2c_device_free(device);
224 return -ENOMEM;
226 device->private_free = snd_cs8427_free;
228 snd_i2c_lock(bus);
229 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
230 if (err != CS8427_VER8427A) {
231 /* give second chance */
232 snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: "
233 "let me try again...\n", err);
234 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
236 if (err != CS8427_VER8427A) {
237 snd_i2c_unlock(bus);
238 snd_printk(KERN_ERR "unable to find CS8427 signature "
239 "(expected 0x%x, read 0x%x),\n",
240 CS8427_VER8427A, err);
241 snd_printk(KERN_ERR " initialization is not completed\n");
242 return -EFAULT;
244 /* turn off run bit while making changes to configuration */
245 err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
246 if (err < 0)
247 goto __fail;
248 /* send initial values */
249 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
250 if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
251 err = err < 0 ? err : -EIO;
252 goto __fail;
254 /* Turn off CS8427 interrupt stuff that is not used in hardware */
255 memset(buf, 0, 7);
256 /* from address 9 to 15 */
257 buf[0] = 9; /* register */
258 if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
259 goto __fail;
260 /* send transfer initialization sequence */
261 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
262 if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
263 err = err < 0 ? err : -EIO;
264 goto __fail;
266 /* write default channel status bytes */
267 buf[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 0));
268 buf[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 8));
269 buf[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 16));
270 buf[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 24));
271 memset(buf + 4, 0, 24 - 4);
272 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
273 goto __fail;
274 memcpy(chip->playback.def_status, buf, 24);
275 memcpy(chip->playback.pcm_status, buf, 24);
276 snd_i2c_unlock(bus);
278 /* turn on run bit and rock'n'roll */
279 if (reset_timeout < 1)
280 reset_timeout = 1;
281 chip->reset_timeout = reset_timeout;
282 snd_cs8427_reset(device);
284 #if 0 // it's nice for read tests
286 char buf[128];
287 int xx;
288 buf[0] = 0x81;
289 snd_i2c_sendbytes(device, buf, 1);
290 snd_i2c_readbytes(device, buf, 127);
291 for (xx = 0; xx < 127; xx++)
292 printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
294 #endif
296 if (r_cs8427)
297 *r_cs8427 = device;
298 return 0;
300 __fail:
301 snd_i2c_unlock(bus);
302 snd_i2c_device_free(device);
303 return err < 0 ? err : -EIO;
306 EXPORT_SYMBOL(snd_cs8427_create);
309 * Reset the chip using run bit, also lock PLL using ILRCK and
310 * put back AES3INPUT. This workaround is described in latest
311 * CS8427 datasheet, otherwise TXDSERIAL will not work.
313 static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
315 struct cs8427 *chip;
316 unsigned long end_time;
317 int data, aes3input = 0;
319 snd_assert(cs8427, return);
320 chip = cs8427->private_data;
321 snd_i2c_lock(cs8427->bus);
322 if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
323 CS8427_RXDAES3INPUT) /* AES3 bit is set */
324 aes3input = 1;
325 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
326 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
327 chip->regmap[CS8427_REG_CLOCKSOURCE]);
328 udelay(200);
329 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
330 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
331 chip->regmap[CS8427_REG_CLOCKSOURCE]);
332 udelay(200);
333 snd_i2c_unlock(cs8427->bus);
334 end_time = jiffies + chip->reset_timeout;
335 while (time_after_eq(end_time, jiffies)) {
336 snd_i2c_lock(cs8427->bus);
337 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
338 snd_i2c_unlock(cs8427->bus);
339 if (!(data & CS8427_UNLOCK))
340 break;
341 schedule_timeout_uninterruptible(1);
343 snd_i2c_lock(cs8427->bus);
344 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
345 if (aes3input)
346 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
347 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
348 chip->regmap[CS8427_REG_CLOCKSOURCE]);
349 snd_i2c_unlock(cs8427->bus);
352 static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
353 struct snd_ctl_elem_info *uinfo)
355 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
356 uinfo->count = 1;
357 uinfo->value.integer.min = 0;
358 uinfo->value.integer.max = 255;
359 return 0;
362 static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
363 struct snd_ctl_elem_value *ucontrol)
365 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
366 int data;
368 snd_i2c_lock(device->bus);
369 data = snd_cs8427_reg_read(device, kcontrol->private_value);
370 snd_i2c_unlock(device->bus);
371 if (data < 0)
372 return data;
373 ucontrol->value.integer.value[0] = data;
374 return 0;
377 static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
378 struct snd_ctl_elem_info *uinfo)
380 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
381 uinfo->count = 10;
382 return 0;
385 static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
386 struct snd_ctl_elem_value *ucontrol)
388 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
389 unsigned char reg = CS8427_REG_QSUBCODE;
390 int err;
392 snd_i2c_lock(device->bus);
393 if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
394 snd_printk(KERN_ERR "unable to send register 0x%x byte "
395 "to CS8427\n", reg);
396 snd_i2c_unlock(device->bus);
397 return err < 0 ? err : -EIO;
399 err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
400 if (err != 10) {
401 snd_printk(KERN_ERR "unable to read Q-subcode bytes "
402 "from CS8427\n");
403 snd_i2c_unlock(device->bus);
404 return err < 0 ? err : -EIO;
406 snd_i2c_unlock(device->bus);
407 return 0;
410 static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
411 struct snd_ctl_elem_info *uinfo)
413 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
414 uinfo->count = 1;
415 return 0;
418 static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
419 struct snd_ctl_elem_value *ucontrol)
421 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
422 struct cs8427 *chip = device->private_data;
424 snd_i2c_lock(device->bus);
425 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
426 snd_i2c_unlock(device->bus);
427 return 0;
430 static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
431 struct snd_ctl_elem_value *ucontrol)
433 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
434 struct cs8427 *chip = device->private_data;
435 unsigned char *status = kcontrol->private_value ?
436 chip->playback.pcm_status : chip->playback.def_status;
437 struct snd_pcm_runtime *runtime = chip->playback.substream ?
438 chip->playback.substream->runtime : NULL;
439 int err, change;
441 snd_i2c_lock(device->bus);
442 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
443 memcpy(status, ucontrol->value.iec958.status, 24);
444 if (change && (kcontrol->private_value ?
445 runtime != NULL : runtime == NULL)) {
446 err = snd_cs8427_send_corudata(device, 0, status, 24);
447 if (err < 0)
448 change = err;
450 snd_i2c_unlock(device->bus);
451 return change;
454 static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
455 struct snd_ctl_elem_info *uinfo)
457 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
458 uinfo->count = 1;
459 return 0;
462 static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
463 struct snd_ctl_elem_value *ucontrol)
465 memset(ucontrol->value.iec958.status, 0xff, 24);
466 return 0;
469 static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
471 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
472 .info = snd_cs8427_in_status_info,
473 .name = "IEC958 CS8427 Input Status",
474 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
475 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
476 .get = snd_cs8427_in_status_get,
477 .private_value = 15,
480 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
481 .info = snd_cs8427_in_status_info,
482 .name = "IEC958 CS8427 Error Status",
483 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
484 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
485 .get = snd_cs8427_in_status_get,
486 .private_value = 16,
489 .access = SNDRV_CTL_ELEM_ACCESS_READ,
490 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
491 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
492 .info = snd_cs8427_spdif_mask_info,
493 .get = snd_cs8427_spdif_mask_get,
496 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
497 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
498 .info = snd_cs8427_spdif_info,
499 .get = snd_cs8427_spdif_get,
500 .put = snd_cs8427_spdif_put,
501 .private_value = 0
504 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
505 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
506 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
507 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
508 .info = snd_cs8427_spdif_info,
509 .get = snd_cs8427_spdif_get,
510 .put = snd_cs8427_spdif_put,
511 .private_value = 1
514 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
515 .info = snd_cs8427_qsubcode_info,
516 .name = "IEC958 Q-subcode Capture Default",
517 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
518 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
519 .get = snd_cs8427_qsubcode_get
522 int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
523 struct snd_pcm_substream *play_substream,
524 struct snd_pcm_substream *cap_substream)
526 struct cs8427 *chip = cs8427->private_data;
527 struct snd_kcontrol *kctl;
528 unsigned int idx;
529 int err;
531 snd_assert(play_substream && cap_substream, return -EINVAL);
532 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
533 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
534 if (kctl == NULL)
535 return -ENOMEM;
536 kctl->id.device = play_substream->pcm->device;
537 kctl->id.subdevice = play_substream->number;
538 err = snd_ctl_add(cs8427->bus->card, kctl);
539 if (err < 0)
540 return err;
541 if (! strcmp(kctl->id.name,
542 SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
543 chip->playback.pcm_ctl = kctl;
546 chip->playback.substream = play_substream;
547 chip->capture.substream = cap_substream;
548 snd_assert(chip->playback.pcm_ctl, return -EIO);
549 return 0;
552 EXPORT_SYMBOL(snd_cs8427_iec958_build);
554 int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
556 struct cs8427 *chip;
558 snd_assert(cs8427, return -ENXIO);
559 chip = cs8427->private_data;
560 if (active)
561 memcpy(chip->playback.pcm_status,
562 chip->playback.def_status, 24);
563 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
564 snd_ctl_notify(cs8427->bus->card,
565 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
566 &chip->playback.pcm_ctl->id);
567 return 0;
570 EXPORT_SYMBOL(snd_cs8427_iec958_active);
572 int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
574 struct cs8427 *chip;
575 char *status;
576 int err, reset;
578 snd_assert(cs8427, return -ENXIO);
579 chip = cs8427->private_data;
580 status = chip->playback.pcm_status;
581 snd_i2c_lock(cs8427->bus);
582 if (status[0] & IEC958_AES0_PROFESSIONAL) {
583 status[0] &= ~IEC958_AES0_PRO_FS;
584 switch (rate) {
585 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
586 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
587 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
588 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
590 } else {
591 status[3] &= ~IEC958_AES3_CON_FS;
592 switch (rate) {
593 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
594 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
595 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
598 err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
599 if (err > 0)
600 snd_ctl_notify(cs8427->bus->card,
601 SNDRV_CTL_EVENT_MASK_VALUE,
602 &chip->playback.pcm_ctl->id);
603 reset = chip->rate != rate;
604 chip->rate = rate;
605 snd_i2c_unlock(cs8427->bus);
606 if (reset)
607 snd_cs8427_reset(cs8427);
608 return err < 0 ? err : 0;
611 EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
613 static int __init alsa_cs8427_module_init(void)
615 return 0;
618 static void __exit alsa_cs8427_module_exit(void)
622 module_init(alsa_cs8427_module_init)
623 module_exit(alsa_cs8427_module_exit)