drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h

   1 #ifndef __GK104_FIFO_H__
   2 #define __GK104_FIFO_H__
   3 #define gk104_fifo(p) container_of((p), struct gk104_fifo, base)
   4 #include "priv.h"
   5
   6 #include <core/enum.h>
   7 #include <subdev/mmu.h>
   8
   9 struct gk104_fifo_chan;
  10 struct gk104_fifo {
  11         const struct gk104_fifo_func *func;
  12         struct nvkm_fifo base;
  13
  14         struct {
  15                 struct work_struct work;
  16                 u32 engm;
  17                 u32 runm;
  18         } recover;
  19
  20         int pbdma_nr;
  21
  22         struct {
  23                 struct nvkm_engine *engine;
  24                 int runl;
  25                 int pbid;
  26         } engine[16];
  27         int engine_nr;
  28
  29         struct {
  30                 struct nvkm_memory *mem[2];
  31                 int next;
  32                 wait_queue_head_t wait;
  33                 struct list_head chan;
  34                 u32 engm;
  35         } runlist[16];
  36         int runlist_nr;
  37
  38         struct {
  39                 struct nvkm_memory *mem;
  40                 struct nvkm_vma bar;
  41         } user;
  42 };
  43
  44 struct gk104_fifo_func {
  45         struct {
  46                 const struct nvkm_enum *engine;
  47                 const struct nvkm_enum *reason;
  48                 const struct nvkm_enum *hubclient;
  49                 const struct nvkm_enum *gpcclient;
  50         } fault;
  51
  52         const struct nvkm_fifo_chan_oclass *chan[];
  53 };
  54
  55 int gk104_fifo_new_(const struct gk104_fifo_func *, struct nvkm_device *,
  56                     int index, int nr, struct nvkm_fifo **);
  57 void gk104_fifo_runlist_insert(struct gk104_fifo *, struct gk104_fifo_chan *);
  58 void gk104_fifo_runlist_remove(struct gk104_fifo *, struct gk104_fifo_chan *);
  59 void gk104_fifo_runlist_commit(struct gk104_fifo *, int runl);
  60
  61 static inline u64
  62 gk104_fifo_engine_subdev(int engine)
  63 {
  64         switch (engine) {
  65         case 0: return (1ULL << NVKM_ENGINE_GR) |
  66                        (1ULL << NVKM_ENGINE_SW) |
  67                        (1ULL << NVKM_ENGINE_CE2);
  68         case 1: return (1ULL << NVKM_ENGINE_MSPDEC);
  69         case 2: return (1ULL << NVKM_ENGINE_MSPPP);
  70         case 3: return (1ULL << NVKM_ENGINE_MSVLD);
  71         case 4: return (1ULL << NVKM_ENGINE_CE0);
  72         case 5: return (1ULL << NVKM_ENGINE_CE1);
  73         case 6: return (1ULL << NVKM_ENGINE_MSENC);
  74         default:
  75                 WARN_ON(1);
  76                 return 0;
  77         }
  78 }
  79
  80 extern const struct nvkm_enum gk104_fifo_fault_engine[];
  81 extern const struct nvkm_enum gk104_fifo_fault_reason[];
  82 extern const struct nvkm_enum gk104_fifo_fault_hubclient[];
  83 extern const struct nvkm_enum gk104_fifo_fault_gpcclient[];
  84
  85 extern const struct nvkm_enum gm107_fifo_fault_engine[];
  86 #endif