drm/nouveau/fb: add gm20b device
[linux/fpc-iii.git] / drivers / gpu / drm / omapdrm / omap_drv.c
blob39c5312b466ce6064d8b66a0f14c0efb79cde801
1 /*
2 * drivers/gpu/drm/omapdrm/omap_drv.c
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/wait.h>
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_helper.h>
27 #include "omap_dmm_tiler.h"
28 #include "omap_drv.h"
30 #define DRIVER_NAME MODULE_NAME
31 #define DRIVER_DESC "OMAP DRM"
32 #define DRIVER_DATE "20110917"
33 #define DRIVER_MAJOR 1
34 #define DRIVER_MINOR 0
35 #define DRIVER_PATCHLEVEL 0
37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
40 module_param(num_crtc, int, 0600);
43 * mode config funcs
46 /* Notes about mapping DSS and DRM entities:
47 * CRTC: overlay
48 * encoder: manager.. with some extension to allow one primary CRTC
49 * and zero or more video CRTC's to be mapped to one encoder?
50 * connector: dssdev.. manager can be attached/detached from different
51 * devices
54 static void omap_fb_output_poll_changed(struct drm_device *dev)
56 struct omap_drm_private *priv = dev->dev_private;
57 DBG("dev=%p", dev);
58 if (priv->fbdev)
59 drm_fb_helper_hotplug_event(priv->fbdev);
62 struct omap_atomic_state_commit {
63 struct work_struct work;
64 struct drm_device *dev;
65 struct drm_atomic_state *state;
66 u32 crtcs;
69 static void omap_atomic_wait_for_completion(struct drm_device *dev,
70 struct drm_atomic_state *old_state)
72 struct drm_crtc_state *old_crtc_state;
73 struct drm_crtc *crtc;
74 unsigned int i;
75 int ret;
77 for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
78 if (!crtc->state->enable)
79 continue;
81 ret = omap_crtc_wait_pending(crtc);
83 if (!ret)
84 dev_warn(dev->dev,
85 "atomic complete timeout (pipe %u)!\n", i);
89 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
91 struct drm_device *dev = commit->dev;
92 struct omap_drm_private *priv = dev->dev_private;
93 struct drm_atomic_state *old_state = commit->state;
95 /* Apply the atomic update. */
96 dispc_runtime_get();
98 drm_atomic_helper_commit_modeset_disables(dev, old_state);
99 drm_atomic_helper_commit_planes(dev, old_state, 0);
100 drm_atomic_helper_commit_modeset_enables(dev, old_state);
102 omap_atomic_wait_for_completion(dev, old_state);
104 drm_atomic_helper_cleanup_planes(dev, old_state);
106 dispc_runtime_put();
108 drm_atomic_state_put(old_state);
110 /* Complete the commit, wake up any waiter. */
111 spin_lock(&priv->commit.lock);
112 priv->commit.pending &= ~commit->crtcs;
113 spin_unlock(&priv->commit.lock);
115 wake_up_all(&priv->commit.wait);
117 kfree(commit);
120 static void omap_atomic_work(struct work_struct *work)
122 struct omap_atomic_state_commit *commit =
123 container_of(work, struct omap_atomic_state_commit, work);
125 omap_atomic_complete(commit);
128 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
129 struct omap_atomic_state_commit *commit)
131 bool pending;
133 spin_lock(&priv->commit.lock);
134 pending = priv->commit.pending & commit->crtcs;
135 spin_unlock(&priv->commit.lock);
137 return pending;
140 static int omap_atomic_commit(struct drm_device *dev,
141 struct drm_atomic_state *state, bool nonblock)
143 struct omap_drm_private *priv = dev->dev_private;
144 struct omap_atomic_state_commit *commit;
145 struct drm_crtc *crtc;
146 struct drm_crtc_state *crtc_state;
147 int i, ret;
149 ret = drm_atomic_helper_prepare_planes(dev, state);
150 if (ret)
151 return ret;
153 /* Allocate the commit object. */
154 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
155 if (commit == NULL) {
156 ret = -ENOMEM;
157 goto error;
160 INIT_WORK(&commit->work, omap_atomic_work);
161 commit->dev = dev;
162 commit->state = state;
164 /* Wait until all affected CRTCs have completed previous commits and
165 * mark them as pending.
167 for_each_crtc_in_state(state, crtc, crtc_state, i)
168 commit->crtcs |= drm_crtc_mask(crtc);
170 wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
172 spin_lock(&priv->commit.lock);
173 priv->commit.pending |= commit->crtcs;
174 spin_unlock(&priv->commit.lock);
176 /* Swap the state, this is the point of no return. */
177 drm_atomic_helper_swap_state(state, true);
179 drm_atomic_state_get(state);
180 if (nonblock)
181 schedule_work(&commit->work);
182 else
183 omap_atomic_complete(commit);
185 return 0;
187 error:
188 drm_atomic_helper_cleanup_planes(dev, state);
189 return ret;
192 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
193 .fb_create = omap_framebuffer_create,
194 .output_poll_changed = omap_fb_output_poll_changed,
195 .atomic_check = drm_atomic_helper_check,
196 .atomic_commit = omap_atomic_commit,
199 static int get_connector_type(struct omap_dss_device *dssdev)
201 switch (dssdev->type) {
202 case OMAP_DISPLAY_TYPE_HDMI:
203 return DRM_MODE_CONNECTOR_HDMIA;
204 case OMAP_DISPLAY_TYPE_DVI:
205 return DRM_MODE_CONNECTOR_DVID;
206 case OMAP_DISPLAY_TYPE_DSI:
207 return DRM_MODE_CONNECTOR_DSI;
208 default:
209 return DRM_MODE_CONNECTOR_Unknown;
213 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
215 struct omap_drm_private *priv = dev->dev_private;
216 int i;
218 for (i = 0; i < priv->num_crtcs; i++) {
219 struct drm_crtc *crtc = priv->crtcs[i];
221 if (omap_crtc_channel(crtc) == channel)
222 return true;
225 return false;
227 static void omap_disconnect_dssdevs(void)
229 struct omap_dss_device *dssdev = NULL;
231 for_each_dss_dev(dssdev)
232 dssdev->driver->disconnect(dssdev);
235 static int omap_connect_dssdevs(void)
237 int r;
238 struct omap_dss_device *dssdev = NULL;
239 bool no_displays = true;
241 for_each_dss_dev(dssdev) {
242 r = dssdev->driver->connect(dssdev);
243 if (r == -EPROBE_DEFER) {
244 omap_dss_put_device(dssdev);
245 goto cleanup;
246 } else if (r) {
247 dev_warn(dssdev->dev, "could not connect display: %s\n",
248 dssdev->name);
249 } else {
250 no_displays = false;
254 if (no_displays)
255 return -EPROBE_DEFER;
257 return 0;
259 cleanup:
261 * if we are deferring probe, we disconnect the devices we previously
262 * connected
264 omap_disconnect_dssdevs();
266 return r;
269 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
270 enum omap_channel channel)
272 struct omap_drm_private *priv = dev->dev_private;
273 struct drm_plane *plane;
274 struct drm_crtc *crtc;
276 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY);
277 if (IS_ERR(plane))
278 return PTR_ERR(plane);
280 crtc = omap_crtc_init(dev, plane, channel, id);
282 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
283 priv->crtcs[id] = crtc;
284 priv->num_crtcs++;
286 priv->planes[id] = plane;
287 priv->num_planes++;
289 return 0;
292 static int omap_modeset_init_properties(struct drm_device *dev)
294 struct omap_drm_private *priv = dev->dev_private;
296 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
297 if (!priv->zorder_prop)
298 return -ENOMEM;
300 return 0;
303 static int omap_modeset_init(struct drm_device *dev)
305 struct omap_drm_private *priv = dev->dev_private;
306 struct omap_dss_device *dssdev = NULL;
307 int num_ovls = dss_feat_get_num_ovls();
308 int num_mgrs = dss_feat_get_num_mgrs();
309 int num_crtcs;
310 int i, id = 0;
311 int ret;
313 drm_mode_config_init(dev);
315 omap_drm_irq_install(dev);
317 ret = omap_modeset_init_properties(dev);
318 if (ret < 0)
319 return ret;
322 * We usually don't want to create a CRTC for each manager, at least
323 * not until we have a way to expose private planes to userspace.
324 * Otherwise there would not be enough video pipes left for drm planes.
325 * We use the num_crtc argument to limit the number of crtcs we create.
327 num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
329 dssdev = NULL;
331 for_each_dss_dev(dssdev) {
332 struct drm_connector *connector;
333 struct drm_encoder *encoder;
334 enum omap_channel channel;
335 struct omap_dss_device *out;
337 if (!omapdss_device_is_connected(dssdev))
338 continue;
340 encoder = omap_encoder_init(dev, dssdev);
342 if (!encoder) {
343 dev_err(dev->dev, "could not create encoder: %s\n",
344 dssdev->name);
345 return -ENOMEM;
348 connector = omap_connector_init(dev,
349 get_connector_type(dssdev), dssdev, encoder);
351 if (!connector) {
352 dev_err(dev->dev, "could not create connector: %s\n",
353 dssdev->name);
354 return -ENOMEM;
357 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
358 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
360 priv->encoders[priv->num_encoders++] = encoder;
361 priv->connectors[priv->num_connectors++] = connector;
363 drm_mode_connector_attach_encoder(connector, encoder);
366 * if we have reached the limit of the crtcs we are allowed to
367 * create, let's not try to look for a crtc for this
368 * panel/encoder and onwards, we will, of course, populate the
369 * the possible_crtcs field for all the encoders with the final
370 * set of crtcs we create
372 if (id == num_crtcs)
373 continue;
376 * get the recommended DISPC channel for this encoder. For now,
377 * we only try to get create a crtc out of the recommended, the
378 * other possible channels to which the encoder can connect are
379 * not considered.
382 out = omapdss_find_output_from_display(dssdev);
383 channel = out->dispc_channel;
384 omap_dss_put_device(out);
387 * if this channel hasn't already been taken by a previously
388 * allocated crtc, we create a new crtc for it
390 if (!channel_used(dev, channel)) {
391 ret = omap_modeset_create_crtc(dev, id, channel);
392 if (ret < 0) {
393 dev_err(dev->dev,
394 "could not create CRTC (channel %u)\n",
395 channel);
396 return ret;
399 id++;
404 * we have allocated crtcs according to the need of the panels/encoders,
405 * adding more crtcs here if needed
407 for (; id < num_crtcs; id++) {
409 /* find a free manager for this crtc */
410 for (i = 0; i < num_mgrs; i++) {
411 if (!channel_used(dev, i))
412 break;
415 if (i == num_mgrs) {
416 /* this shouldn't really happen */
417 dev_err(dev->dev, "no managers left for crtc\n");
418 return -ENOMEM;
421 ret = omap_modeset_create_crtc(dev, id, i);
422 if (ret < 0) {
423 dev_err(dev->dev,
424 "could not create CRTC (channel %u)\n", i);
425 return ret;
430 * Create normal planes for the remaining overlays:
432 for (; id < num_ovls; id++) {
433 struct drm_plane *plane;
435 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY);
436 if (IS_ERR(plane))
437 return PTR_ERR(plane);
439 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
440 priv->planes[priv->num_planes++] = plane;
443 for (i = 0; i < priv->num_encoders; i++) {
444 struct drm_encoder *encoder = priv->encoders[i];
445 struct omap_dss_device *dssdev =
446 omap_encoder_get_dssdev(encoder);
447 struct omap_dss_device *output;
449 output = omapdss_find_output_from_display(dssdev);
451 /* figure out which crtc's we can connect the encoder to: */
452 encoder->possible_crtcs = 0;
453 for (id = 0; id < priv->num_crtcs; id++) {
454 struct drm_crtc *crtc = priv->crtcs[id];
455 enum omap_channel crtc_channel;
457 crtc_channel = omap_crtc_channel(crtc);
459 if (output->dispc_channel == crtc_channel) {
460 encoder->possible_crtcs |= (1 << id);
461 break;
465 omap_dss_put_device(output);
468 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
469 priv->num_planes, priv->num_crtcs, priv->num_encoders,
470 priv->num_connectors);
472 dev->mode_config.min_width = 32;
473 dev->mode_config.min_height = 32;
475 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
476 * to fill in these limits properly on different OMAP generations..
478 dev->mode_config.max_width = 2048;
479 dev->mode_config.max_height = 2048;
481 dev->mode_config.funcs = &omap_mode_config_funcs;
483 drm_mode_config_reset(dev);
485 return 0;
488 static void omap_modeset_free(struct drm_device *dev)
490 drm_mode_config_cleanup(dev);
494 * drm ioctl funcs
498 static int ioctl_get_param(struct drm_device *dev, void *data,
499 struct drm_file *file_priv)
501 struct omap_drm_private *priv = dev->dev_private;
502 struct drm_omap_param *args = data;
504 DBG("%p: param=%llu", dev, args->param);
506 switch (args->param) {
507 case OMAP_PARAM_CHIPSET_ID:
508 args->value = priv->omaprev;
509 break;
510 default:
511 DBG("unknown parameter %lld", args->param);
512 return -EINVAL;
515 return 0;
518 static int ioctl_set_param(struct drm_device *dev, void *data,
519 struct drm_file *file_priv)
521 struct drm_omap_param *args = data;
523 switch (args->param) {
524 default:
525 DBG("unknown parameter %lld", args->param);
526 return -EINVAL;
529 return 0;
532 #define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */
534 static int ioctl_gem_new(struct drm_device *dev, void *data,
535 struct drm_file *file_priv)
537 struct drm_omap_gem_new *args = data;
538 u32 flags = args->flags & OMAP_BO_USER_MASK;
540 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
541 args->size.bytes, flags);
543 return omap_gem_new_handle(dev, file_priv, args->size, flags,
544 &args->handle);
547 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
548 struct drm_file *file_priv)
550 struct drm_omap_gem_cpu_prep *args = data;
551 struct drm_gem_object *obj;
552 int ret;
554 VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
556 obj = drm_gem_object_lookup(file_priv, args->handle);
557 if (!obj)
558 return -ENOENT;
560 ret = omap_gem_op_sync(obj, args->op);
562 if (!ret)
563 ret = omap_gem_op_start(obj, args->op);
565 drm_gem_object_unreference_unlocked(obj);
567 return ret;
570 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
571 struct drm_file *file_priv)
573 struct drm_omap_gem_cpu_fini *args = data;
574 struct drm_gem_object *obj;
575 int ret;
577 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
579 obj = drm_gem_object_lookup(file_priv, args->handle);
580 if (!obj)
581 return -ENOENT;
583 /* XXX flushy, flushy */
584 ret = 0;
586 if (!ret)
587 ret = omap_gem_op_finish(obj, args->op);
589 drm_gem_object_unreference_unlocked(obj);
591 return ret;
594 static int ioctl_gem_info(struct drm_device *dev, void *data,
595 struct drm_file *file_priv)
597 struct drm_omap_gem_info *args = data;
598 struct drm_gem_object *obj;
599 int ret = 0;
601 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
603 obj = drm_gem_object_lookup(file_priv, args->handle);
604 if (!obj)
605 return -ENOENT;
607 args->size = omap_gem_mmap_size(obj);
608 args->offset = omap_gem_mmap_offset(obj);
610 drm_gem_object_unreference_unlocked(obj);
612 return ret;
615 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
616 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH),
617 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
618 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH),
619 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH),
620 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH),
621 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH),
625 * drm driver funcs
629 * load - setup chip and create an initial config
630 * @dev: DRM device
631 * @flags: startup flags
633 * The driver load routine has to do several things:
634 * - initialize the memory manager
635 * - allocate initial config memory
636 * - setup the DRM framebuffer with the allocated memory
638 static int dev_load(struct drm_device *dev, unsigned long flags)
640 struct omap_drm_platform_data *pdata = dev->dev->platform_data;
641 struct omap_drm_private *priv;
642 unsigned int i;
643 int ret;
645 DBG("load: dev=%p", dev);
647 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
648 if (!priv)
649 return -ENOMEM;
651 priv->omaprev = pdata->omaprev;
653 dev->dev_private = priv;
655 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
656 init_waitqueue_head(&priv->commit.wait);
657 spin_lock_init(&priv->commit.lock);
659 spin_lock_init(&priv->list_lock);
660 INIT_LIST_HEAD(&priv->obj_list);
662 omap_gem_init(dev);
664 ret = omap_modeset_init(dev);
665 if (ret) {
666 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
667 dev->dev_private = NULL;
668 kfree(priv);
669 return ret;
672 /* Initialize vblank handling, start with all CRTCs disabled. */
673 ret = drm_vblank_init(dev, priv->num_crtcs);
674 if (ret)
675 dev_warn(dev->dev, "could not init vblank\n");
677 for (i = 0; i < priv->num_crtcs; i++)
678 drm_crtc_vblank_off(priv->crtcs[i]);
680 priv->fbdev = omap_fbdev_init(dev);
682 /* store off drm_device for use in pm ops */
683 dev_set_drvdata(dev->dev, dev);
685 drm_kms_helper_poll_init(dev);
687 return 0;
690 static int dev_unload(struct drm_device *dev)
692 struct omap_drm_private *priv = dev->dev_private;
694 DBG("unload: dev=%p", dev);
696 drm_kms_helper_poll_fini(dev);
698 if (priv->fbdev)
699 omap_fbdev_free(dev);
701 omap_modeset_free(dev);
702 omap_gem_deinit(dev);
704 destroy_workqueue(priv->wq);
706 drm_vblank_cleanup(dev);
707 omap_drm_irq_uninstall(dev);
709 kfree(dev->dev_private);
710 dev->dev_private = NULL;
712 dev_set_drvdata(dev->dev, NULL);
714 return 0;
717 static int dev_open(struct drm_device *dev, struct drm_file *file)
719 file->driver_priv = NULL;
721 DBG("open: dev=%p, file=%p", dev, file);
723 return 0;
727 * lastclose - clean up after all DRM clients have exited
728 * @dev: DRM device
730 * Take care of cleaning up after all DRM clients have exited. In the
731 * mode setting case, we want to restore the kernel's initial mode (just
732 * in case the last client left us in a bad state).
734 static void dev_lastclose(struct drm_device *dev)
736 int i;
738 /* we don't support vga_switcheroo.. so just make sure the fbdev
739 * mode is active
741 struct omap_drm_private *priv = dev->dev_private;
742 int ret;
744 DBG("lastclose: dev=%p", dev);
746 /* need to restore default rotation state.. not sure
747 * if there is a cleaner way to restore properties to
748 * default state? Maybe a flag that properties should
749 * automatically be restored to default state on
750 * lastclose?
752 for (i = 0; i < priv->num_crtcs; i++) {
753 struct drm_crtc *crtc = priv->crtcs[i];
755 if (!crtc->primary->rotation_property)
756 continue;
758 drm_object_property_set_value(&crtc->base,
759 crtc->primary->rotation_property,
760 DRM_ROTATE_0);
763 for (i = 0; i < priv->num_planes; i++) {
764 struct drm_plane *plane = priv->planes[i];
766 if (!plane->rotation_property)
767 continue;
769 drm_object_property_set_value(&plane->base,
770 plane->rotation_property,
771 DRM_ROTATE_0);
774 if (priv->fbdev) {
775 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
776 if (ret)
777 DBG("failed to restore crtc mode");
781 static const struct vm_operations_struct omap_gem_vm_ops = {
782 .fault = omap_gem_fault,
783 .open = drm_gem_vm_open,
784 .close = drm_gem_vm_close,
787 static const struct file_operations omapdriver_fops = {
788 .owner = THIS_MODULE,
789 .open = drm_open,
790 .unlocked_ioctl = drm_ioctl,
791 .release = drm_release,
792 .mmap = omap_gem_mmap,
793 .poll = drm_poll,
794 .read = drm_read,
795 .llseek = noop_llseek,
798 static struct drm_driver omap_drm_driver = {
799 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
800 DRIVER_ATOMIC,
801 .load = dev_load,
802 .unload = dev_unload,
803 .open = dev_open,
804 .lastclose = dev_lastclose,
805 .get_vblank_counter = drm_vblank_no_hw_counter,
806 .enable_vblank = omap_irq_enable_vblank,
807 .disable_vblank = omap_irq_disable_vblank,
808 #ifdef CONFIG_DEBUG_FS
809 .debugfs_init = omap_debugfs_init,
810 .debugfs_cleanup = omap_debugfs_cleanup,
811 #endif
812 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
813 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
814 .gem_prime_export = omap_gem_prime_export,
815 .gem_prime_import = omap_gem_prime_import,
816 .gem_free_object = omap_gem_free_object,
817 .gem_vm_ops = &omap_gem_vm_ops,
818 .dumb_create = omap_gem_dumb_create,
819 .dumb_map_offset = omap_gem_dumb_map_offset,
820 .dumb_destroy = drm_gem_dumb_destroy,
821 .ioctls = ioctls,
822 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
823 .fops = &omapdriver_fops,
824 .name = DRIVER_NAME,
825 .desc = DRIVER_DESC,
826 .date = DRIVER_DATE,
827 .major = DRIVER_MAJOR,
828 .minor = DRIVER_MINOR,
829 .patchlevel = DRIVER_PATCHLEVEL,
832 static int pdev_probe(struct platform_device *device)
834 int r;
836 if (omapdss_is_initialized() == false)
837 return -EPROBE_DEFER;
839 omap_crtc_pre_init();
841 r = omap_connect_dssdevs();
842 if (r) {
843 omap_crtc_pre_uninit();
844 return r;
847 DBG("%s", device->name);
848 return drm_platform_init(&omap_drm_driver, device);
851 static int pdev_remove(struct platform_device *device)
853 DBG("");
855 drm_put_dev(platform_get_drvdata(device));
857 omap_disconnect_dssdevs();
858 omap_crtc_pre_uninit();
860 return 0;
863 #ifdef CONFIG_PM_SLEEP
864 static int omap_drm_suspend_all_displays(void)
866 struct omap_dss_device *dssdev = NULL;
868 for_each_dss_dev(dssdev) {
869 if (!dssdev->driver)
870 continue;
872 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
873 dssdev->driver->disable(dssdev);
874 dssdev->activate_after_resume = true;
875 } else {
876 dssdev->activate_after_resume = false;
880 return 0;
883 static int omap_drm_resume_all_displays(void)
885 struct omap_dss_device *dssdev = NULL;
887 for_each_dss_dev(dssdev) {
888 if (!dssdev->driver)
889 continue;
891 if (dssdev->activate_after_resume) {
892 dssdev->driver->enable(dssdev);
893 dssdev->activate_after_resume = false;
897 return 0;
900 static int omap_drm_suspend(struct device *dev)
902 struct drm_device *drm_dev = dev_get_drvdata(dev);
904 drm_kms_helper_poll_disable(drm_dev);
906 drm_modeset_lock_all(drm_dev);
907 omap_drm_suspend_all_displays();
908 drm_modeset_unlock_all(drm_dev);
910 return 0;
913 static int omap_drm_resume(struct device *dev)
915 struct drm_device *drm_dev = dev_get_drvdata(dev);
917 drm_modeset_lock_all(drm_dev);
918 omap_drm_resume_all_displays();
919 drm_modeset_unlock_all(drm_dev);
921 drm_kms_helper_poll_enable(drm_dev);
923 return omap_gem_resume(dev);
925 #endif
927 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
929 static struct platform_driver pdev = {
930 .driver = {
931 .name = DRIVER_NAME,
932 .pm = &omapdrm_pm_ops,
934 .probe = pdev_probe,
935 .remove = pdev_remove,
938 static struct platform_driver * const drivers[] = {
939 &omap_dmm_driver,
940 &pdev,
943 static int __init omap_drm_init(void)
945 DBG("init");
947 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
950 static void __exit omap_drm_fini(void)
952 DBG("fini");
954 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
957 /* need late_initcall() so we load after dss_driver's are loaded */
958 late_initcall(omap_drm_init);
959 module_exit(omap_drm_fini);
961 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
962 MODULE_DESCRIPTION("OMAP DRM Display Driver");
963 MODULE_ALIAS("platform:" DRIVER_NAME);
964 MODULE_LICENSE("GPL v2");