2 * drivers/net/phy/marvell.c
4 * Driver for Marvell PHYs
8 * Copyright (c) 2004 Freescale Semiconductor, Inc.
10 * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/kernel.h>
19 #include <linux/string.h>
20 #include <linux/ctype.h>
21 #include <linux/errno.h>
22 #include <linux/unistd.h>
23 #include <linux/hwmon.h>
24 #include <linux/interrupt.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/spinlock.h>
32 #include <linux/module.h>
33 #include <linux/mii.h>
34 #include <linux/ethtool.h>
35 #include <linux/phy.h>
36 #include <linux/marvell_phy.h>
41 #include <linux/uaccess.h>
43 #define MII_MARVELL_PHY_PAGE 22
44 #define MII_MARVELL_COPPER_PAGE 0x00
45 #define MII_MARVELL_FIBER_PAGE 0x01
46 #define MII_MARVELL_MSCR_PAGE 0x02
47 #define MII_MARVELL_LED_PAGE 0x03
48 #define MII_MARVELL_MISC_TEST_PAGE 0x06
49 #define MII_MARVELL_WOL_PAGE 0x11
51 #define MII_M1011_IEVENT 0x13
52 #define MII_M1011_IEVENT_CLEAR 0x0000
54 #define MII_M1011_IMASK 0x12
55 #define MII_M1011_IMASK_INIT 0x6400
56 #define MII_M1011_IMASK_CLEAR 0x0000
58 #define MII_M1011_PHY_SCR 0x10
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
61 #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
62 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
63 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
64 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
66 #define MII_M1111_PHY_LED_CONTROL 0x18
67 #define MII_M1111_PHY_LED_DIRECT 0x4100
68 #define MII_M1111_PHY_LED_COMBINE 0x411c
69 #define MII_M1111_PHY_EXT_CR 0x14
70 #define MII_M1111_RGMII_RX_DELAY BIT(7)
71 #define MII_M1111_RGMII_TX_DELAY BIT(1)
72 #define MII_M1111_PHY_EXT_SR 0x1b
74 #define MII_M1111_HWCFG_MODE_MASK 0xf
75 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
76 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
77 #define MII_M1111_HWCFG_MODE_RTBI 0x7
78 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
79 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
80 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
81 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
83 #define MII_88E1121_PHY_MSCR_REG 21
84 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
85 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
86 #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
88 #define MII_88E1121_MISC_TEST 0x1a
89 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
90 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
91 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
92 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
93 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
94 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
96 #define MII_88E1510_TEMP_SENSOR 0x1b
97 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
99 #define MII_88E1318S_PHY_MSCR1_REG 16
100 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
102 /* Copper Specific Interrupt Enable Register */
103 #define MII_88E1318S_PHY_CSIER 0x12
104 /* WOL Event Interrupt Enable */
105 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
107 /* LED Timer Control Register */
108 #define MII_88E1318S_PHY_LED_TCR 0x12
109 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
110 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
111 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
113 /* Magic Packet MAC address registers */
114 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
115 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
116 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
118 #define MII_88E1318S_PHY_WOL_CTRL 0x10
119 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
120 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
122 #define MII_88E1121_PHY_LED_CTRL 16
123 #define MII_88E1121_PHY_LED_DEF 0x0030
125 #define MII_M1011_PHY_STATUS 0x11
126 #define MII_M1011_PHY_STATUS_1000 0x8000
127 #define MII_M1011_PHY_STATUS_100 0x4000
128 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
129 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
130 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
131 #define MII_M1011_PHY_STATUS_LINK 0x0400
133 #define MII_88E3016_PHY_SPEC_CTRL 0x10
134 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
135 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
137 #define MII_88E1510_GEN_CTRL_REG_1 0x14
138 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
139 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
140 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
142 #define LPA_FIBER_1000HALF 0x40
143 #define LPA_FIBER_1000FULL 0x20
145 #define LPA_PAUSE_FIBER 0x180
146 #define LPA_PAUSE_ASYM_FIBER 0x100
148 #define ADVERTISE_FIBER_1000HALF 0x40
149 #define ADVERTISE_FIBER_1000FULL 0x20
151 #define ADVERTISE_PAUSE_FIBER 0x180
152 #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
154 #define REGISTER_LINK_STATUS 0x400
155 #define NB_FIBER_STATS 1
157 MODULE_DESCRIPTION("Marvell PHY driver");
158 MODULE_AUTHOR("Andy Fleming");
159 MODULE_LICENSE("GPL");
161 struct marvell_hw_stat
{
168 static struct marvell_hw_stat marvell_hw_stats
[] = {
169 { "phy_receive_errors_copper", 0, 21, 16},
170 { "phy_idle_errors", 0, 10, 8 },
171 { "phy_receive_errors_fiber", 1, 21, 16},
174 struct marvell_priv
{
175 u64 stats
[ARRAY_SIZE(marvell_hw_stats
)];
177 struct device
*hwmon_dev
;
180 static int marvell_get_page(struct phy_device
*phydev
)
182 return phy_read(phydev
, MII_MARVELL_PHY_PAGE
);
185 static int marvell_set_page(struct phy_device
*phydev
, int page
)
187 return phy_write(phydev
, MII_MARVELL_PHY_PAGE
, page
);
190 static int marvell_get_set_page(struct phy_device
*phydev
, int page
)
192 int oldpage
= marvell_get_page(phydev
);
198 return marvell_set_page(phydev
, page
);
203 static int marvell_ack_interrupt(struct phy_device
*phydev
)
207 /* Clear the interrupts by reading the reg */
208 err
= phy_read(phydev
, MII_M1011_IEVENT
);
216 static int marvell_config_intr(struct phy_device
*phydev
)
220 if (phydev
->interrupts
== PHY_INTERRUPT_ENABLED
)
221 err
= phy_write(phydev
, MII_M1011_IMASK
,
222 MII_M1011_IMASK_INIT
);
224 err
= phy_write(phydev
, MII_M1011_IMASK
,
225 MII_M1011_IMASK_CLEAR
);
230 static int marvell_set_polarity(struct phy_device
*phydev
, int polarity
)
236 /* get the current settings */
237 reg
= phy_read(phydev
, MII_M1011_PHY_SCR
);
242 val
&= ~MII_M1011_PHY_SCR_AUTO_CROSS
;
245 val
|= MII_M1011_PHY_SCR_MDI
;
248 val
|= MII_M1011_PHY_SCR_MDI_X
;
250 case ETH_TP_MDI_AUTO
:
251 case ETH_TP_MDI_INVALID
:
253 val
|= MII_M1011_PHY_SCR_AUTO_CROSS
;
258 /* Set the new polarity value in the register */
259 err
= phy_write(phydev
, MII_M1011_PHY_SCR
, val
);
267 static int marvell_set_downshift(struct phy_device
*phydev
, bool enable
,
272 reg
= phy_read(phydev
, MII_M1011_PHY_SCR
);
276 reg
&= MII_M1011_PHY_SRC_DOWNSHIFT_MASK
;
277 reg
|= ((retries
- 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT
);
279 reg
|= MII_M1011_PHY_SCR_DOWNSHIFT_EN
;
281 return phy_write(phydev
, MII_M1011_PHY_SCR
, reg
);
284 static int marvell_config_aneg(struct phy_device
*phydev
)
288 err
= marvell_set_polarity(phydev
, phydev
->mdix_ctrl
);
292 err
= phy_write(phydev
, MII_M1111_PHY_LED_CONTROL
,
293 MII_M1111_PHY_LED_DIRECT
);
297 err
= genphy_config_aneg(phydev
);
301 if (phydev
->autoneg
!= AUTONEG_ENABLE
) {
302 /* A write to speed/duplex bits (that is performed by
303 * genphy_config_aneg() call above) must be followed by
304 * a software reset. Otherwise, the write has no effect.
306 err
= genphy_soft_reset(phydev
);
314 static int m88e1101_config_aneg(struct phy_device
*phydev
)
318 /* This Marvell PHY has an errata which requires
319 * that certain registers get written in order
320 * to restart autonegotiation
322 err
= genphy_soft_reset(phydev
);
326 err
= phy_write(phydev
, 0x1d, 0x1f);
330 err
= phy_write(phydev
, 0x1e, 0x200c);
334 err
= phy_write(phydev
, 0x1d, 0x5);
338 err
= phy_write(phydev
, 0x1e, 0);
342 err
= phy_write(phydev
, 0x1e, 0x100);
346 return marvell_config_aneg(phydev
);
349 static int m88e1111_config_aneg(struct phy_device
*phydev
)
353 /* The Marvell PHY has an errata which requires
354 * that certain registers get written in order
355 * to restart autonegotiation
357 err
= genphy_soft_reset(phydev
);
359 err
= marvell_set_polarity(phydev
, phydev
->mdix_ctrl
);
363 err
= phy_write(phydev
, MII_M1111_PHY_LED_CONTROL
,
364 MII_M1111_PHY_LED_DIRECT
);
368 err
= genphy_config_aneg(phydev
);
372 if (phydev
->autoneg
!= AUTONEG_ENABLE
) {
373 /* A write to speed/duplex bits (that is performed by
374 * genphy_config_aneg() call above) must be followed by
375 * a software reset. Otherwise, the write has no effect.
377 err
= genphy_soft_reset(phydev
);
385 #ifdef CONFIG_OF_MDIO
386 /* Set and/or override some configuration registers based on the
387 * marvell,reg-init property stored in the of_node for the phydev.
389 * marvell,reg-init = <reg-page reg mask value>,...;
391 * There may be one or more sets of <reg-page reg mask value>:
393 * reg-page: which register bank to use.
395 * mask: if non-zero, ANDed with existing register value.
396 * value: ORed with the masked value and written to the regiser.
399 static int marvell_of_reg_init(struct phy_device
*phydev
)
402 int len
, i
, saved_page
, current_page
, ret
;
404 if (!phydev
->mdio
.dev
.of_node
)
407 paddr
= of_get_property(phydev
->mdio
.dev
.of_node
,
408 "marvell,reg-init", &len
);
409 if (!paddr
|| len
< (4 * sizeof(*paddr
)))
412 saved_page
= marvell_get_page(phydev
);
415 current_page
= saved_page
;
418 len
/= sizeof(*paddr
);
419 for (i
= 0; i
< len
- 3; i
+= 4) {
420 u16 page
= be32_to_cpup(paddr
+ i
);
421 u16 reg
= be32_to_cpup(paddr
+ i
+ 1);
422 u16 mask
= be32_to_cpup(paddr
+ i
+ 2);
423 u16 val_bits
= be32_to_cpup(paddr
+ i
+ 3);
426 if (page
!= current_page
) {
428 ret
= marvell_set_page(phydev
, page
);
435 val
= phy_read(phydev
, reg
);
444 ret
= phy_write(phydev
, reg
, val
);
449 if (current_page
!= saved_page
) {
450 i
= marvell_set_page(phydev
, saved_page
);
457 static int marvell_of_reg_init(struct phy_device
*phydev
)
461 #endif /* CONFIG_OF_MDIO */
463 static int m88e1121_config_aneg_rgmii_delays(struct phy_device
*phydev
)
465 int err
, oldpage
, mscr
;
467 oldpage
= marvell_get_set_page(phydev
, MII_MARVELL_MSCR_PAGE
);
471 mscr
= phy_read(phydev
, MII_88E1121_PHY_MSCR_REG
);
477 mscr
&= MII_88E1121_PHY_MSCR_DELAY_MASK
;
479 if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_ID
)
480 mscr
|= (MII_88E1121_PHY_MSCR_RX_DELAY
|
481 MII_88E1121_PHY_MSCR_TX_DELAY
);
482 else if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_RXID
)
483 mscr
|= MII_88E1121_PHY_MSCR_RX_DELAY
;
484 else if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_TXID
)
485 mscr
|= MII_88E1121_PHY_MSCR_TX_DELAY
;
487 err
= phy_write(phydev
, MII_88E1121_PHY_MSCR_REG
, mscr
);
490 marvell_set_page(phydev
, oldpage
);
495 static int m88e1121_config_aneg(struct phy_device
*phydev
)
499 if (phy_interface_is_rgmii(phydev
)) {
500 err
= m88e1121_config_aneg_rgmii_delays(phydev
);
505 err
= genphy_soft_reset(phydev
);
509 err
= marvell_set_polarity(phydev
, phydev
->mdix_ctrl
);
513 return genphy_config_aneg(phydev
);
516 static int m88e1318_config_aneg(struct phy_device
*phydev
)
518 int err
, oldpage
, mscr
;
520 oldpage
= marvell_get_set_page(phydev
, MII_MARVELL_MSCR_PAGE
);
524 mscr
= phy_read(phydev
, MII_88E1318S_PHY_MSCR1_REG
);
525 mscr
|= MII_88E1318S_PHY_MSCR1_PAD_ODD
;
527 err
= phy_write(phydev
, MII_88E1318S_PHY_MSCR1_REG
, mscr
);
531 err
= marvell_set_page(phydev
, oldpage
);
535 return m88e1121_config_aneg(phydev
);
539 * ethtool_adv_to_fiber_adv_t
540 * @ethadv: the ethtool advertisement settings
542 * A small helper function that translates ethtool advertisement
543 * settings to phy autonegotiation advertisements for the
544 * MII_ADV register for fiber link.
546 static inline u32
ethtool_adv_to_fiber_adv_t(u32 ethadv
)
550 if (ethadv
& ADVERTISED_1000baseT_Half
)
551 result
|= ADVERTISE_FIBER_1000HALF
;
552 if (ethadv
& ADVERTISED_1000baseT_Full
)
553 result
|= ADVERTISE_FIBER_1000FULL
;
555 if ((ethadv
& ADVERTISE_PAUSE_ASYM
) && (ethadv
& ADVERTISE_PAUSE_CAP
))
556 result
|= LPA_PAUSE_ASYM_FIBER
;
557 else if (ethadv
& ADVERTISE_PAUSE_CAP
)
558 result
|= (ADVERTISE_PAUSE_FIBER
559 & (~ADVERTISE_PAUSE_ASYM_FIBER
));
565 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
566 * @phydev: target phy_device struct
568 * Description: If auto-negotiation is enabled, we configure the
569 * advertising, and then restart auto-negotiation. If it is not
570 * enabled, then we write the BMCR. Adapted for fiber link in
571 * some Marvell's devices.
573 static int marvell_config_aneg_fiber(struct phy_device
*phydev
)
580 if (phydev
->autoneg
!= AUTONEG_ENABLE
)
581 return genphy_setup_forced(phydev
);
583 /* Only allow advertising what this PHY supports */
584 phydev
->advertising
&= phydev
->supported
;
585 advertise
= phydev
->advertising
;
587 /* Setup fiber advertisement */
588 adv
= phy_read(phydev
, MII_ADVERTISE
);
593 adv
&= ~(ADVERTISE_FIBER_1000HALF
| ADVERTISE_FIBER_1000FULL
595 adv
|= ethtool_adv_to_fiber_adv_t(advertise
);
598 err
= phy_write(phydev
, MII_ADVERTISE
, adv
);
606 /* Advertisement hasn't changed, but maybe aneg was never on to
607 * begin with? Or maybe phy was isolated?
609 int ctl
= phy_read(phydev
, MII_BMCR
);
614 if (!(ctl
& BMCR_ANENABLE
) || (ctl
& BMCR_ISOLATE
))
615 changed
= 1; /* do restart aneg */
618 /* Only restart aneg if we are advertising something different
619 * than we were before.
622 changed
= genphy_restart_aneg(phydev
);
627 static int m88e1510_config_aneg(struct phy_device
*phydev
)
631 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
635 /* Configure the copper link first */
636 err
= m88e1318_config_aneg(phydev
);
640 /* Do not touch the fiber page if we're in copper->sgmii mode */
641 if (phydev
->interface
== PHY_INTERFACE_MODE_SGMII
)
644 /* Then the fiber link */
645 err
= marvell_set_page(phydev
, MII_MARVELL_FIBER_PAGE
);
649 err
= marvell_config_aneg_fiber(phydev
);
653 return marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
656 marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
660 static int marvell_config_init(struct phy_device
*phydev
)
662 /* Set registers from marvell,reg-init DT property */
663 return marvell_of_reg_init(phydev
);
666 static int m88e1116r_config_init(struct phy_device
*phydev
)
670 err
= genphy_soft_reset(phydev
);
676 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
680 err
= marvell_set_polarity(phydev
, phydev
->mdix_ctrl
);
684 err
= marvell_set_downshift(phydev
, true, 8);
688 if (phy_interface_is_rgmii(phydev
)) {
689 err
= m88e1121_config_aneg_rgmii_delays(phydev
);
694 err
= genphy_soft_reset(phydev
);
698 return marvell_config_init(phydev
);
701 static int m88e3016_config_init(struct phy_device
*phydev
)
705 /* Enable Scrambler and Auto-Crossover */
706 reg
= phy_read(phydev
, MII_88E3016_PHY_SPEC_CTRL
);
710 reg
&= ~MII_88E3016_DISABLE_SCRAMBLER
;
711 reg
|= MII_88E3016_AUTO_MDIX_CROSSOVER
;
713 reg
= phy_write(phydev
, MII_88E3016_PHY_SPEC_CTRL
, reg
);
717 return marvell_config_init(phydev
);
720 static int m88e1111_config_init_hwcfg_mode(struct phy_device
*phydev
,
722 int fibre_copper_auto
)
726 temp
= phy_read(phydev
, MII_M1111_PHY_EXT_SR
);
730 temp
&= ~(MII_M1111_HWCFG_MODE_MASK
|
731 MII_M1111_HWCFG_FIBER_COPPER_AUTO
|
732 MII_M1111_HWCFG_FIBER_COPPER_RES
);
735 if (fibre_copper_auto
)
736 temp
|= MII_M1111_HWCFG_FIBER_COPPER_AUTO
;
738 return phy_write(phydev
, MII_M1111_PHY_EXT_SR
, temp
);
741 static int m88e1111_config_init_rgmii_delays(struct phy_device
*phydev
)
745 temp
= phy_read(phydev
, MII_M1111_PHY_EXT_CR
);
749 if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_ID
) {
750 temp
|= (MII_M1111_RGMII_RX_DELAY
| MII_M1111_RGMII_TX_DELAY
);
751 } else if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_RXID
) {
752 temp
&= ~MII_M1111_RGMII_TX_DELAY
;
753 temp
|= MII_M1111_RGMII_RX_DELAY
;
754 } else if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_TXID
) {
755 temp
&= ~MII_M1111_RGMII_RX_DELAY
;
756 temp
|= MII_M1111_RGMII_TX_DELAY
;
759 return phy_write(phydev
, MII_M1111_PHY_EXT_CR
, temp
);
762 static int m88e1111_config_init_rgmii(struct phy_device
*phydev
)
767 err
= m88e1111_config_init_rgmii_delays(phydev
);
771 temp
= phy_read(phydev
, MII_M1111_PHY_EXT_SR
);
775 temp
&= ~(MII_M1111_HWCFG_MODE_MASK
);
777 if (temp
& MII_M1111_HWCFG_FIBER_COPPER_RES
)
778 temp
|= MII_M1111_HWCFG_MODE_FIBER_RGMII
;
780 temp
|= MII_M1111_HWCFG_MODE_COPPER_RGMII
;
782 return phy_write(phydev
, MII_M1111_PHY_EXT_SR
, temp
);
785 static int m88e1111_config_init_sgmii(struct phy_device
*phydev
)
789 err
= m88e1111_config_init_hwcfg_mode(
791 MII_M1111_HWCFG_MODE_SGMII_NO_CLK
,
792 MII_M1111_HWCFG_FIBER_COPPER_AUTO
);
796 /* make sure copper is selected */
797 return marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
800 static int m88e1111_config_init_rtbi(struct phy_device
*phydev
)
804 err
= m88e1111_config_init_rgmii_delays(phydev
);
808 err
= m88e1111_config_init_hwcfg_mode(
810 MII_M1111_HWCFG_MODE_RTBI
,
811 MII_M1111_HWCFG_FIBER_COPPER_AUTO
);
816 err
= genphy_soft_reset(phydev
);
820 return m88e1111_config_init_hwcfg_mode(
822 MII_M1111_HWCFG_MODE_RTBI
,
823 MII_M1111_HWCFG_FIBER_COPPER_AUTO
);
826 static int m88e1111_config_init(struct phy_device
*phydev
)
830 if (phy_interface_is_rgmii(phydev
)) {
831 err
= m88e1111_config_init_rgmii(phydev
);
836 if (phydev
->interface
== PHY_INTERFACE_MODE_SGMII
) {
837 err
= m88e1111_config_init_sgmii(phydev
);
842 if (phydev
->interface
== PHY_INTERFACE_MODE_RTBI
) {
843 err
= m88e1111_config_init_rtbi(phydev
);
848 err
= marvell_of_reg_init(phydev
);
852 return genphy_soft_reset(phydev
);
855 static int m88e1121_config_init(struct phy_device
*phydev
)
859 oldpage
= marvell_get_set_page(phydev
, MII_MARVELL_LED_PAGE
);
863 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
864 err
= phy_write(phydev
, MII_88E1121_PHY_LED_CTRL
,
865 MII_88E1121_PHY_LED_DEF
);
869 marvell_set_page(phydev
, oldpage
);
871 /* Set marvell,reg-init configuration from device tree */
872 return marvell_config_init(phydev
);
875 static int m88e1510_config_init(struct phy_device
*phydev
)
880 /* SGMII-to-Copper mode initialization */
881 if (phydev
->interface
== PHY_INTERFACE_MODE_SGMII
) {
885 err
= marvell_set_page(phydev
, 18);
889 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
890 temp
= phy_read(phydev
, MII_88E1510_GEN_CTRL_REG_1
);
891 temp
&= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK
;
892 temp
|= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII
;
893 err
= phy_write(phydev
, MII_88E1510_GEN_CTRL_REG_1
, temp
);
897 /* PHY reset is necessary after changing MODE[2:0] */
898 temp
|= MII_88E1510_GEN_CTRL_REG_1_RESET
;
899 err
= phy_write(phydev
, MII_88E1510_GEN_CTRL_REG_1
, temp
);
903 /* Reset page selection */
904 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
908 /* There appears to be a bug in the 88e1512 when used in
909 * SGMII to copper mode, where the AN advertisment register
910 * clears the pause bits each time a negotiation occurs.
911 * This means we can never be truely sure what was advertised,
912 * so disable Pause support.
914 pause
= SUPPORTED_Pause
| SUPPORTED_Asym_Pause
;
915 phydev
->supported
&= ~pause
;
916 phydev
->advertising
&= ~pause
;
919 return m88e1121_config_init(phydev
);
922 static int m88e1118_config_aneg(struct phy_device
*phydev
)
926 err
= genphy_soft_reset(phydev
);
930 err
= marvell_set_polarity(phydev
, phydev
->mdix_ctrl
);
934 err
= genphy_config_aneg(phydev
);
938 static int m88e1118_config_init(struct phy_device
*phydev
)
943 err
= marvell_set_page(phydev
, MII_MARVELL_MSCR_PAGE
);
947 /* Enable 1000 Mbit */
948 err
= phy_write(phydev
, 0x15, 0x1070);
953 err
= marvell_set_page(phydev
, MII_MARVELL_LED_PAGE
);
957 /* Adjust LED Control */
958 if (phydev
->dev_flags
& MARVELL_PHY_M1118_DNS323_LEDS
)
959 err
= phy_write(phydev
, 0x10, 0x1100);
961 err
= phy_write(phydev
, 0x10, 0x021e);
965 err
= marvell_of_reg_init(phydev
);
970 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
974 return genphy_soft_reset(phydev
);
977 static int m88e1149_config_init(struct phy_device
*phydev
)
982 err
= marvell_set_page(phydev
, MII_MARVELL_MSCR_PAGE
);
986 /* Enable 1000 Mbit */
987 err
= phy_write(phydev
, 0x15, 0x1048);
991 err
= marvell_of_reg_init(phydev
);
996 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1000 return genphy_soft_reset(phydev
);
1003 static int m88e1145_config_init_rgmii(struct phy_device
*phydev
)
1008 err
= m88e1111_config_init_rgmii_delays(phydev
);
1012 if (phydev
->dev_flags
& MARVELL_PHY_M1145_FLAGS_RESISTANCE
) {
1013 err
= phy_write(phydev
, 0x1d, 0x0012);
1017 temp
= phy_read(phydev
, 0x1e);
1022 temp
|= 2 << 9; /* 36 ohm */
1023 temp
|= 2 << 6; /* 39 ohm */
1025 err
= phy_write(phydev
, 0x1e, temp
);
1029 err
= phy_write(phydev
, 0x1d, 0x3);
1033 err
= phy_write(phydev
, 0x1e, 0x8000);
1038 static int m88e1145_config_init_sgmii(struct phy_device
*phydev
)
1040 return m88e1111_config_init_hwcfg_mode(
1041 phydev
, MII_M1111_HWCFG_MODE_SGMII_NO_CLK
,
1042 MII_M1111_HWCFG_FIBER_COPPER_AUTO
);
1045 static int m88e1145_config_init(struct phy_device
*phydev
)
1049 /* Take care of errata E0 & E1 */
1050 err
= phy_write(phydev
, 0x1d, 0x001b);
1054 err
= phy_write(phydev
, 0x1e, 0x418f);
1058 err
= phy_write(phydev
, 0x1d, 0x0016);
1062 err
= phy_write(phydev
, 0x1e, 0xa2da);
1066 if (phydev
->interface
== PHY_INTERFACE_MODE_RGMII_ID
) {
1067 err
= m88e1145_config_init_rgmii(phydev
);
1072 if (phydev
->interface
== PHY_INTERFACE_MODE_SGMII
) {
1073 err
= m88e1145_config_init_sgmii(phydev
);
1078 err
= marvell_of_reg_init(phydev
);
1086 * fiber_lpa_to_ethtool_lpa_t
1087 * @lpa: value of the MII_LPA register for fiber link
1089 * A small helper function that translates MII_LPA
1090 * bits to ethtool LP advertisement settings.
1092 static u32
fiber_lpa_to_ethtool_lpa_t(u32 lpa
)
1096 if (lpa
& LPA_FIBER_1000HALF
)
1097 result
|= ADVERTISED_1000baseT_Half
;
1098 if (lpa
& LPA_FIBER_1000FULL
)
1099 result
|= ADVERTISED_1000baseT_Full
;
1105 * marvell_update_link - update link status in real time in @phydev
1106 * @phydev: target phy_device struct
1108 * Description: Update the value in phydev->link to reflect the
1109 * current link value.
1111 static int marvell_update_link(struct phy_device
*phydev
, int fiber
)
1115 /* Use the generic register for copper link, or specific
1116 * register for fiber case
1119 status
= phy_read(phydev
, MII_M1011_PHY_STATUS
);
1123 if ((status
& REGISTER_LINK_STATUS
) == 0)
1128 return genphy_update_link(phydev
);
1134 static int marvell_read_status_page_an(struct phy_device
*phydev
,
1141 status
= phy_read(phydev
, MII_M1011_PHY_STATUS
);
1145 lpa
= phy_read(phydev
, MII_LPA
);
1149 lpagb
= phy_read(phydev
, MII_STAT1000
);
1153 if (status
& MII_M1011_PHY_STATUS_FULLDUPLEX
)
1154 phydev
->duplex
= DUPLEX_FULL
;
1156 phydev
->duplex
= DUPLEX_HALF
;
1158 status
= status
& MII_M1011_PHY_STATUS_SPD_MASK
;
1160 phydev
->asym_pause
= 0;
1163 case MII_M1011_PHY_STATUS_1000
:
1164 phydev
->speed
= SPEED_1000
;
1167 case MII_M1011_PHY_STATUS_100
:
1168 phydev
->speed
= SPEED_100
;
1172 phydev
->speed
= SPEED_10
;
1177 phydev
->lp_advertising
=
1178 mii_stat1000_to_ethtool_lpa_t(lpagb
) |
1179 mii_lpa_to_ethtool_lpa_t(lpa
);
1181 if (phydev
->duplex
== DUPLEX_FULL
) {
1182 phydev
->pause
= lpa
& LPA_PAUSE_CAP
? 1 : 0;
1183 phydev
->asym_pause
= lpa
& LPA_PAUSE_ASYM
? 1 : 0;
1186 /* The fiber link is only 1000M capable */
1187 phydev
->lp_advertising
= fiber_lpa_to_ethtool_lpa_t(lpa
);
1189 if (phydev
->duplex
== DUPLEX_FULL
) {
1190 if (!(lpa
& LPA_PAUSE_FIBER
)) {
1192 phydev
->asym_pause
= 0;
1193 } else if ((lpa
& LPA_PAUSE_ASYM_FIBER
)) {
1195 phydev
->asym_pause
= 1;
1198 phydev
->asym_pause
= 0;
1205 static int marvell_read_status_page_fixed(struct phy_device
*phydev
)
1207 int bmcr
= phy_read(phydev
, MII_BMCR
);
1212 if (bmcr
& BMCR_FULLDPLX
)
1213 phydev
->duplex
= DUPLEX_FULL
;
1215 phydev
->duplex
= DUPLEX_HALF
;
1217 if (bmcr
& BMCR_SPEED1000
)
1218 phydev
->speed
= SPEED_1000
;
1219 else if (bmcr
& BMCR_SPEED100
)
1220 phydev
->speed
= SPEED_100
;
1222 phydev
->speed
= SPEED_10
;
1225 phydev
->asym_pause
= 0;
1226 phydev
->lp_advertising
= 0;
1231 /* marvell_read_status_page
1234 * Check the link, then figure out the current state
1235 * by comparing what we advertise with what the link partner
1236 * advertises. Start by checking the gigabit possibilities,
1237 * then move on to 10/100.
1239 static int marvell_read_status_page(struct phy_device
*phydev
, int page
)
1244 /* Detect and update the link, but return if there
1247 if (page
== MII_MARVELL_FIBER_PAGE
)
1252 err
= marvell_update_link(phydev
, fiber
);
1256 if (phydev
->autoneg
== AUTONEG_ENABLE
)
1257 err
= marvell_read_status_page_an(phydev
, fiber
);
1259 err
= marvell_read_status_page_fixed(phydev
);
1264 /* marvell_read_status
1266 * Some Marvell's phys have two modes: fiber and copper.
1267 * Both need status checked.
1269 * First, check the fiber link and status.
1270 * If the fiber link is down, check the copper link and status which
1271 * will be the default value if both link are down.
1273 static int marvell_read_status(struct phy_device
*phydev
)
1277 /* Check the fiber mode first */
1278 if (phydev
->supported
& SUPPORTED_FIBRE
&&
1279 phydev
->interface
!= PHY_INTERFACE_MODE_SGMII
) {
1280 err
= marvell_set_page(phydev
, MII_MARVELL_FIBER_PAGE
);
1284 err
= marvell_read_status_page(phydev
, MII_MARVELL_FIBER_PAGE
);
1288 /* If the fiber link is up, it is the selected and
1289 * used link. In this case, we need to stay in the
1290 * fiber page. Please to be careful about that, avoid
1291 * to restore Copper page in other functions which
1292 * could break the behaviour for some fiber phy like
1298 /* If fiber link is down, check and save copper mode state */
1299 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1304 return marvell_read_status_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1307 marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1313 * Some Marvell's phys have two modes: fiber and copper.
1314 * Both need to be suspended
1316 static int marvell_suspend(struct phy_device
*phydev
)
1320 /* Suspend the fiber mode first */
1321 if (!(phydev
->supported
& SUPPORTED_FIBRE
)) {
1322 err
= marvell_set_page(phydev
, MII_MARVELL_FIBER_PAGE
);
1326 /* With the page set, use the generic suspend */
1327 err
= genphy_suspend(phydev
);
1331 /* Then, the copper link */
1332 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1337 /* With the page set, use the generic suspend */
1338 return genphy_suspend(phydev
);
1341 marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1347 * Some Marvell's phys have two modes: fiber and copper.
1348 * Both need to be resumed
1350 static int marvell_resume(struct phy_device
*phydev
)
1354 /* Resume the fiber mode first */
1355 if (!(phydev
->supported
& SUPPORTED_FIBRE
)) {
1356 err
= marvell_set_page(phydev
, MII_MARVELL_FIBER_PAGE
);
1360 /* With the page set, use the generic resume */
1361 err
= genphy_resume(phydev
);
1365 /* Then, the copper link */
1366 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1371 /* With the page set, use the generic resume */
1372 return genphy_resume(phydev
);
1375 marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1379 static int marvell_aneg_done(struct phy_device
*phydev
)
1381 int retval
= phy_read(phydev
, MII_M1011_PHY_STATUS
);
1383 return (retval
< 0) ? retval
: (retval
& MII_M1011_PHY_STATUS_RESOLVED
);
1386 static int m88e1121_did_interrupt(struct phy_device
*phydev
)
1390 imask
= phy_read(phydev
, MII_M1011_IEVENT
);
1392 if (imask
& MII_M1011_IMASK_INIT
)
1398 static void m88e1318_get_wol(struct phy_device
*phydev
,
1399 struct ethtool_wolinfo
*wol
)
1401 wol
->supported
= WAKE_MAGIC
;
1404 if (marvell_set_page(phydev
, MII_MARVELL_WOL_PAGE
) < 0)
1407 if (phy_read(phydev
, MII_88E1318S_PHY_WOL_CTRL
) &
1408 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE
)
1409 wol
->wolopts
|= WAKE_MAGIC
;
1411 if (marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
) < 0)
1415 static int m88e1318_set_wol(struct phy_device
*phydev
,
1416 struct ethtool_wolinfo
*wol
)
1418 int err
, oldpage
, temp
;
1420 oldpage
= marvell_get_page(phydev
);
1422 if (wol
->wolopts
& WAKE_MAGIC
) {
1423 /* Explicitly switch to page 0x00, just to be sure */
1424 err
= marvell_set_page(phydev
, MII_MARVELL_COPPER_PAGE
);
1428 /* Enable the WOL interrupt */
1429 temp
= phy_read(phydev
, MII_88E1318S_PHY_CSIER
);
1430 temp
|= MII_88E1318S_PHY_CSIER_WOL_EIE
;
1431 err
= phy_write(phydev
, MII_88E1318S_PHY_CSIER
, temp
);
1435 err
= marvell_set_page(phydev
, MII_MARVELL_LED_PAGE
);
1439 /* Setup LED[2] as interrupt pin (active low) */
1440 temp
= phy_read(phydev
, MII_88E1318S_PHY_LED_TCR
);
1441 temp
&= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT
;
1442 temp
|= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE
;
1443 temp
|= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW
;
1444 err
= phy_write(phydev
, MII_88E1318S_PHY_LED_TCR
, temp
);
1448 err
= marvell_set_page(phydev
, MII_MARVELL_WOL_PAGE
);
1452 /* Store the device address for the magic packet */
1453 err
= phy_write(phydev
, MII_88E1318S_PHY_MAGIC_PACKET_WORD2
,
1454 ((phydev
->attached_dev
->dev_addr
[5] << 8) |
1455 phydev
->attached_dev
->dev_addr
[4]));
1458 err
= phy_write(phydev
, MII_88E1318S_PHY_MAGIC_PACKET_WORD1
,
1459 ((phydev
->attached_dev
->dev_addr
[3] << 8) |
1460 phydev
->attached_dev
->dev_addr
[2]));
1463 err
= phy_write(phydev
, MII_88E1318S_PHY_MAGIC_PACKET_WORD0
,
1464 ((phydev
->attached_dev
->dev_addr
[1] << 8) |
1465 phydev
->attached_dev
->dev_addr
[0]));
1469 /* Clear WOL status and enable magic packet matching */
1470 temp
= phy_read(phydev
, MII_88E1318S_PHY_WOL_CTRL
);
1471 temp
|= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS
;
1472 temp
|= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE
;
1473 err
= phy_write(phydev
, MII_88E1318S_PHY_WOL_CTRL
, temp
);
1477 err
= marvell_set_page(phydev
, MII_MARVELL_WOL_PAGE
);
1481 /* Clear WOL status and disable magic packet matching */
1482 temp
= phy_read(phydev
, MII_88E1318S_PHY_WOL_CTRL
);
1483 temp
|= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS
;
1484 temp
&= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE
;
1485 err
= phy_write(phydev
, MII_88E1318S_PHY_WOL_CTRL
, temp
);
1490 err
= marvell_set_page(phydev
, oldpage
);
1497 static int marvell_get_sset_count(struct phy_device
*phydev
)
1499 if (phydev
->supported
& SUPPORTED_FIBRE
)
1500 return ARRAY_SIZE(marvell_hw_stats
);
1502 return ARRAY_SIZE(marvell_hw_stats
) - NB_FIBER_STATS
;
1505 static void marvell_get_strings(struct phy_device
*phydev
, u8
*data
)
1509 for (i
= 0; i
< ARRAY_SIZE(marvell_hw_stats
); i
++) {
1510 memcpy(data
+ i
* ETH_GSTRING_LEN
,
1511 marvell_hw_stats
[i
].string
, ETH_GSTRING_LEN
);
1516 #define UINT64_MAX (u64)(~((u64)0))
1518 static u64
marvell_get_stat(struct phy_device
*phydev
, int i
)
1520 struct marvell_hw_stat stat
= marvell_hw_stats
[i
];
1521 struct marvell_priv
*priv
= phydev
->priv
;
1525 oldpage
= marvell_get_set_page(phydev
, stat
.page
);
1529 val
= phy_read(phydev
, stat
.reg
);
1533 val
= val
& ((1 << stat
.bits
) - 1);
1534 priv
->stats
[i
] += val
;
1535 ret
= priv
->stats
[i
];
1538 marvell_set_page(phydev
, oldpage
);
1543 static void marvell_get_stats(struct phy_device
*phydev
,
1544 struct ethtool_stats
*stats
, u64
*data
)
1548 for (i
= 0; i
< ARRAY_SIZE(marvell_hw_stats
); i
++)
1549 data
[i
] = marvell_get_stat(phydev
, i
);
1553 static int m88e1121_get_temp(struct phy_device
*phydev
, long *temp
)
1561 mutex_lock(&phydev
->lock
);
1563 oldpage
= marvell_get_set_page(phydev
, MII_MARVELL_MISC_TEST_PAGE
);
1565 mutex_unlock(&phydev
->lock
);
1569 /* Enable temperature sensor */
1570 ret
= phy_read(phydev
, MII_88E1121_MISC_TEST
);
1574 ret
= phy_write(phydev
, MII_88E1121_MISC_TEST
,
1575 ret
| MII_88E1121_MISC_TEST_TEMP_SENSOR_EN
);
1579 /* Wait for temperature to stabilize */
1580 usleep_range(10000, 12000);
1582 val
= phy_read(phydev
, MII_88E1121_MISC_TEST
);
1588 /* Disable temperature sensor */
1589 ret
= phy_write(phydev
, MII_88E1121_MISC_TEST
,
1590 ret
& ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN
);
1594 *temp
= ((val
& MII_88E1121_MISC_TEST_TEMP_MASK
) - 5) * 5000;
1597 marvell_set_page(phydev
, oldpage
);
1598 mutex_unlock(&phydev
->lock
);
1603 static int m88e1121_hwmon_read(struct device
*dev
,
1604 enum hwmon_sensor_types type
,
1605 u32 attr
, int channel
, long *temp
)
1607 struct phy_device
*phydev
= dev_get_drvdata(dev
);
1611 case hwmon_temp_input
:
1612 err
= m88e1121_get_temp(phydev
, temp
);
1621 static umode_t
m88e1121_hwmon_is_visible(const void *data
,
1622 enum hwmon_sensor_types type
,
1623 u32 attr
, int channel
)
1625 if (type
!= hwmon_temp
)
1629 case hwmon_temp_input
:
1636 static u32 m88e1121_hwmon_chip_config
[] = {
1637 HWMON_C_REGISTER_TZ
,
1641 static const struct hwmon_channel_info m88e1121_hwmon_chip
= {
1643 .config
= m88e1121_hwmon_chip_config
,
1646 static u32 m88e1121_hwmon_temp_config
[] = {
1651 static const struct hwmon_channel_info m88e1121_hwmon_temp
= {
1653 .config
= m88e1121_hwmon_temp_config
,
1656 static const struct hwmon_channel_info
*m88e1121_hwmon_info
[] = {
1657 &m88e1121_hwmon_chip
,
1658 &m88e1121_hwmon_temp
,
1662 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops
= {
1663 .is_visible
= m88e1121_hwmon_is_visible
,
1664 .read
= m88e1121_hwmon_read
,
1667 static const struct hwmon_chip_info m88e1121_hwmon_chip_info
= {
1668 .ops
= &m88e1121_hwmon_hwmon_ops
,
1669 .info
= m88e1121_hwmon_info
,
1672 static int m88e1510_get_temp(struct phy_device
*phydev
, long *temp
)
1679 mutex_lock(&phydev
->lock
);
1681 oldpage
= marvell_get_set_page(phydev
, MII_MARVELL_MISC_TEST_PAGE
);
1683 mutex_unlock(&phydev
->lock
);
1687 ret
= phy_read(phydev
, MII_88E1510_TEMP_SENSOR
);
1691 *temp
= ((ret
& MII_88E1510_TEMP_SENSOR_MASK
) - 25) * 1000;
1694 marvell_set_page(phydev
, oldpage
);
1695 mutex_unlock(&phydev
->lock
);
1700 static int m88e1510_get_temp_critical(struct phy_device
*phydev
, long *temp
)
1707 mutex_lock(&phydev
->lock
);
1709 oldpage
= marvell_get_set_page(phydev
, MII_MARVELL_MISC_TEST_PAGE
);
1711 mutex_unlock(&phydev
->lock
);
1715 ret
= phy_read(phydev
, MII_88E1121_MISC_TEST
);
1719 *temp
= (((ret
& MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK
) >>
1720 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT
) * 5) - 25;
1725 marvell_set_page(phydev
, oldpage
);
1726 mutex_unlock(&phydev
->lock
);
1731 static int m88e1510_set_temp_critical(struct phy_device
*phydev
, long temp
)
1736 mutex_lock(&phydev
->lock
);
1738 oldpage
= marvell_get_set_page(phydev
, MII_MARVELL_MISC_TEST_PAGE
);
1740 mutex_unlock(&phydev
->lock
);
1744 ret
= phy_read(phydev
, MII_88E1121_MISC_TEST
);
1749 temp
= clamp_val(DIV_ROUND_CLOSEST(temp
, 5) + 5, 0, 0x1f);
1750 ret
= phy_write(phydev
, MII_88E1121_MISC_TEST
,
1751 (ret
& ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK
) |
1752 (temp
<< MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT
));
1755 marvell_set_page(phydev
, oldpage
);
1756 mutex_unlock(&phydev
->lock
);
1761 static int m88e1510_get_temp_alarm(struct phy_device
*phydev
, long *alarm
)
1768 mutex_lock(&phydev
->lock
);
1770 oldpage
= marvell_get_set_page(phydev
, MII_MARVELL_MISC_TEST_PAGE
);
1772 mutex_unlock(&phydev
->lock
);
1776 ret
= phy_read(phydev
, MII_88E1121_MISC_TEST
);
1779 *alarm
= !!(ret
& MII_88E1510_MISC_TEST_TEMP_IRQ
);
1782 marvell_set_page(phydev
, oldpage
);
1783 mutex_unlock(&phydev
->lock
);
1788 static int m88e1510_hwmon_read(struct device
*dev
,
1789 enum hwmon_sensor_types type
,
1790 u32 attr
, int channel
, long *temp
)
1792 struct phy_device
*phydev
= dev_get_drvdata(dev
);
1796 case hwmon_temp_input
:
1797 err
= m88e1510_get_temp(phydev
, temp
);
1799 case hwmon_temp_crit
:
1800 err
= m88e1510_get_temp_critical(phydev
, temp
);
1802 case hwmon_temp_max_alarm
:
1803 err
= m88e1510_get_temp_alarm(phydev
, temp
);
1812 static int m88e1510_hwmon_write(struct device
*dev
,
1813 enum hwmon_sensor_types type
,
1814 u32 attr
, int channel
, long temp
)
1816 struct phy_device
*phydev
= dev_get_drvdata(dev
);
1820 case hwmon_temp_crit
:
1821 err
= m88e1510_set_temp_critical(phydev
, temp
);
1829 static umode_t
m88e1510_hwmon_is_visible(const void *data
,
1830 enum hwmon_sensor_types type
,
1831 u32 attr
, int channel
)
1833 if (type
!= hwmon_temp
)
1837 case hwmon_temp_input
:
1838 case hwmon_temp_max_alarm
:
1840 case hwmon_temp_crit
:
1847 static u32 m88e1510_hwmon_temp_config
[] = {
1848 HWMON_T_INPUT
| HWMON_T_CRIT
| HWMON_T_MAX_ALARM
,
1852 static const struct hwmon_channel_info m88e1510_hwmon_temp
= {
1854 .config
= m88e1510_hwmon_temp_config
,
1857 static const struct hwmon_channel_info
*m88e1510_hwmon_info
[] = {
1858 &m88e1121_hwmon_chip
,
1859 &m88e1510_hwmon_temp
,
1863 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops
= {
1864 .is_visible
= m88e1510_hwmon_is_visible
,
1865 .read
= m88e1510_hwmon_read
,
1866 .write
= m88e1510_hwmon_write
,
1869 static const struct hwmon_chip_info m88e1510_hwmon_chip_info
= {
1870 .ops
= &m88e1510_hwmon_hwmon_ops
,
1871 .info
= m88e1510_hwmon_info
,
1874 static int marvell_hwmon_name(struct phy_device
*phydev
)
1876 struct marvell_priv
*priv
= phydev
->priv
;
1877 struct device
*dev
= &phydev
->mdio
.dev
;
1878 const char *devname
= dev_name(dev
);
1879 size_t len
= strlen(devname
);
1882 priv
->hwmon_name
= devm_kzalloc(dev
, len
, GFP_KERNEL
);
1883 if (!priv
->hwmon_name
)
1886 for (i
= j
= 0; i
< len
&& devname
[i
]; i
++) {
1887 if (isalnum(devname
[i
]))
1888 priv
->hwmon_name
[j
++] = devname
[i
];
1894 static int marvell_hwmon_probe(struct phy_device
*phydev
,
1895 const struct hwmon_chip_info
*chip
)
1897 struct marvell_priv
*priv
= phydev
->priv
;
1898 struct device
*dev
= &phydev
->mdio
.dev
;
1901 err
= marvell_hwmon_name(phydev
);
1905 priv
->hwmon_dev
= devm_hwmon_device_register_with_info(
1906 dev
, priv
->hwmon_name
, phydev
, chip
, NULL
);
1908 return PTR_ERR_OR_ZERO(priv
->hwmon_dev
);
1911 static int m88e1121_hwmon_probe(struct phy_device
*phydev
)
1913 return marvell_hwmon_probe(phydev
, &m88e1121_hwmon_chip_info
);
1916 static int m88e1510_hwmon_probe(struct phy_device
*phydev
)
1918 return marvell_hwmon_probe(phydev
, &m88e1510_hwmon_chip_info
);
1921 static int m88e1121_hwmon_probe(struct phy_device
*phydev
)
1926 static int m88e1510_hwmon_probe(struct phy_device
*phydev
)
1932 static int marvell_probe(struct phy_device
*phydev
)
1934 struct marvell_priv
*priv
;
1936 priv
= devm_kzalloc(&phydev
->mdio
.dev
, sizeof(*priv
), GFP_KERNEL
);
1940 phydev
->priv
= priv
;
1945 static int m88e1121_probe(struct phy_device
*phydev
)
1949 err
= marvell_probe(phydev
);
1953 return m88e1121_hwmon_probe(phydev
);
1956 static int m88e1510_probe(struct phy_device
*phydev
)
1960 err
= marvell_probe(phydev
);
1964 return m88e1510_hwmon_probe(phydev
);
1967 static struct phy_driver marvell_drivers
[] = {
1969 .phy_id
= MARVELL_PHY_ID_88E1101
,
1970 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
1971 .name
= "Marvell 88E1101",
1972 .features
= PHY_GBIT_FEATURES
,
1973 .flags
= PHY_HAS_INTERRUPT
,
1974 .probe
= marvell_probe
,
1975 .config_init
= &marvell_config_init
,
1976 .config_aneg
= &m88e1101_config_aneg
,
1977 .read_status
= &genphy_read_status
,
1978 .ack_interrupt
= &marvell_ack_interrupt
,
1979 .config_intr
= &marvell_config_intr
,
1980 .resume
= &genphy_resume
,
1981 .suspend
= &genphy_suspend
,
1982 .get_sset_count
= marvell_get_sset_count
,
1983 .get_strings
= marvell_get_strings
,
1984 .get_stats
= marvell_get_stats
,
1987 .phy_id
= MARVELL_PHY_ID_88E1112
,
1988 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
1989 .name
= "Marvell 88E1112",
1990 .features
= PHY_GBIT_FEATURES
,
1991 .flags
= PHY_HAS_INTERRUPT
,
1992 .probe
= marvell_probe
,
1993 .config_init
= &m88e1111_config_init
,
1994 .config_aneg
= &marvell_config_aneg
,
1995 .read_status
= &genphy_read_status
,
1996 .ack_interrupt
= &marvell_ack_interrupt
,
1997 .config_intr
= &marvell_config_intr
,
1998 .resume
= &genphy_resume
,
1999 .suspend
= &genphy_suspend
,
2000 .get_sset_count
= marvell_get_sset_count
,
2001 .get_strings
= marvell_get_strings
,
2002 .get_stats
= marvell_get_stats
,
2005 .phy_id
= MARVELL_PHY_ID_88E1111
,
2006 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2007 .name
= "Marvell 88E1111",
2008 .features
= PHY_GBIT_FEATURES
,
2009 .flags
= PHY_HAS_INTERRUPT
,
2010 .probe
= marvell_probe
,
2011 .config_init
= &m88e1111_config_init
,
2012 .config_aneg
= &m88e1111_config_aneg
,
2013 .read_status
= &marvell_read_status
,
2014 .ack_interrupt
= &marvell_ack_interrupt
,
2015 .config_intr
= &marvell_config_intr
,
2016 .resume
= &genphy_resume
,
2017 .suspend
= &genphy_suspend
,
2018 .get_sset_count
= marvell_get_sset_count
,
2019 .get_strings
= marvell_get_strings
,
2020 .get_stats
= marvell_get_stats
,
2023 .phy_id
= MARVELL_PHY_ID_88E1118
,
2024 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2025 .name
= "Marvell 88E1118",
2026 .features
= PHY_GBIT_FEATURES
,
2027 .flags
= PHY_HAS_INTERRUPT
,
2028 .probe
= marvell_probe
,
2029 .config_init
= &m88e1118_config_init
,
2030 .config_aneg
= &m88e1118_config_aneg
,
2031 .read_status
= &genphy_read_status
,
2032 .ack_interrupt
= &marvell_ack_interrupt
,
2033 .config_intr
= &marvell_config_intr
,
2034 .resume
= &genphy_resume
,
2035 .suspend
= &genphy_suspend
,
2036 .get_sset_count
= marvell_get_sset_count
,
2037 .get_strings
= marvell_get_strings
,
2038 .get_stats
= marvell_get_stats
,
2041 .phy_id
= MARVELL_PHY_ID_88E1121R
,
2042 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2043 .name
= "Marvell 88E1121R",
2044 .features
= PHY_GBIT_FEATURES
,
2045 .flags
= PHY_HAS_INTERRUPT
,
2046 .probe
= &m88e1121_probe
,
2047 .config_init
= &m88e1121_config_init
,
2048 .config_aneg
= &m88e1121_config_aneg
,
2049 .read_status
= &marvell_read_status
,
2050 .ack_interrupt
= &marvell_ack_interrupt
,
2051 .config_intr
= &marvell_config_intr
,
2052 .did_interrupt
= &m88e1121_did_interrupt
,
2053 .resume
= &genphy_resume
,
2054 .suspend
= &genphy_suspend
,
2055 .get_sset_count
= marvell_get_sset_count
,
2056 .get_strings
= marvell_get_strings
,
2057 .get_stats
= marvell_get_stats
,
2060 .phy_id
= MARVELL_PHY_ID_88E1318S
,
2061 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2062 .name
= "Marvell 88E1318S",
2063 .features
= PHY_GBIT_FEATURES
,
2064 .flags
= PHY_HAS_INTERRUPT
,
2065 .probe
= marvell_probe
,
2066 .config_init
= &m88e1121_config_init
,
2067 .config_aneg
= &m88e1318_config_aneg
,
2068 .read_status
= &marvell_read_status
,
2069 .ack_interrupt
= &marvell_ack_interrupt
,
2070 .config_intr
= &marvell_config_intr
,
2071 .did_interrupt
= &m88e1121_did_interrupt
,
2072 .get_wol
= &m88e1318_get_wol
,
2073 .set_wol
= &m88e1318_set_wol
,
2074 .resume
= &genphy_resume
,
2075 .suspend
= &genphy_suspend
,
2076 .get_sset_count
= marvell_get_sset_count
,
2077 .get_strings
= marvell_get_strings
,
2078 .get_stats
= marvell_get_stats
,
2081 .phy_id
= MARVELL_PHY_ID_88E1145
,
2082 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2083 .name
= "Marvell 88E1145",
2084 .features
= PHY_GBIT_FEATURES
,
2085 .flags
= PHY_HAS_INTERRUPT
,
2086 .probe
= marvell_probe
,
2087 .config_init
= &m88e1145_config_init
,
2088 .config_aneg
= &m88e1101_config_aneg
,
2089 .read_status
= &genphy_read_status
,
2090 .ack_interrupt
= &marvell_ack_interrupt
,
2091 .config_intr
= &marvell_config_intr
,
2092 .resume
= &genphy_resume
,
2093 .suspend
= &genphy_suspend
,
2094 .get_sset_count
= marvell_get_sset_count
,
2095 .get_strings
= marvell_get_strings
,
2096 .get_stats
= marvell_get_stats
,
2099 .phy_id
= MARVELL_PHY_ID_88E1149R
,
2100 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2101 .name
= "Marvell 88E1149R",
2102 .features
= PHY_GBIT_FEATURES
,
2103 .flags
= PHY_HAS_INTERRUPT
,
2104 .probe
= marvell_probe
,
2105 .config_init
= &m88e1149_config_init
,
2106 .config_aneg
= &m88e1118_config_aneg
,
2107 .read_status
= &genphy_read_status
,
2108 .ack_interrupt
= &marvell_ack_interrupt
,
2109 .config_intr
= &marvell_config_intr
,
2110 .resume
= &genphy_resume
,
2111 .suspend
= &genphy_suspend
,
2112 .get_sset_count
= marvell_get_sset_count
,
2113 .get_strings
= marvell_get_strings
,
2114 .get_stats
= marvell_get_stats
,
2117 .phy_id
= MARVELL_PHY_ID_88E1240
,
2118 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2119 .name
= "Marvell 88E1240",
2120 .features
= PHY_GBIT_FEATURES
,
2121 .flags
= PHY_HAS_INTERRUPT
,
2122 .probe
= marvell_probe
,
2123 .config_init
= &m88e1111_config_init
,
2124 .config_aneg
= &marvell_config_aneg
,
2125 .read_status
= &genphy_read_status
,
2126 .ack_interrupt
= &marvell_ack_interrupt
,
2127 .config_intr
= &marvell_config_intr
,
2128 .resume
= &genphy_resume
,
2129 .suspend
= &genphy_suspend
,
2130 .get_sset_count
= marvell_get_sset_count
,
2131 .get_strings
= marvell_get_strings
,
2132 .get_stats
= marvell_get_stats
,
2135 .phy_id
= MARVELL_PHY_ID_88E1116R
,
2136 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2137 .name
= "Marvell 88E1116R",
2138 .features
= PHY_GBIT_FEATURES
,
2139 .flags
= PHY_HAS_INTERRUPT
,
2140 .probe
= marvell_probe
,
2141 .config_init
= &m88e1116r_config_init
,
2142 .config_aneg
= &genphy_config_aneg
,
2143 .read_status
= &genphy_read_status
,
2144 .ack_interrupt
= &marvell_ack_interrupt
,
2145 .config_intr
= &marvell_config_intr
,
2146 .resume
= &genphy_resume
,
2147 .suspend
= &genphy_suspend
,
2148 .get_sset_count
= marvell_get_sset_count
,
2149 .get_strings
= marvell_get_strings
,
2150 .get_stats
= marvell_get_stats
,
2153 .phy_id
= MARVELL_PHY_ID_88E1510
,
2154 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2155 .name
= "Marvell 88E1510",
2156 .features
= PHY_GBIT_FEATURES
| SUPPORTED_FIBRE
,
2157 .flags
= PHY_HAS_INTERRUPT
,
2158 .probe
= &m88e1510_probe
,
2159 .config_init
= &m88e1510_config_init
,
2160 .config_aneg
= &m88e1510_config_aneg
,
2161 .read_status
= &marvell_read_status
,
2162 .ack_interrupt
= &marvell_ack_interrupt
,
2163 .config_intr
= &marvell_config_intr
,
2164 .did_interrupt
= &m88e1121_did_interrupt
,
2165 .get_wol
= &m88e1318_get_wol
,
2166 .set_wol
= &m88e1318_set_wol
,
2167 .resume
= &marvell_resume
,
2168 .suspend
= &marvell_suspend
,
2169 .get_sset_count
= marvell_get_sset_count
,
2170 .get_strings
= marvell_get_strings
,
2171 .get_stats
= marvell_get_stats
,
2172 .set_loopback
= genphy_loopback
,
2175 .phy_id
= MARVELL_PHY_ID_88E1540
,
2176 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2177 .name
= "Marvell 88E1540",
2178 .features
= PHY_GBIT_FEATURES
,
2179 .flags
= PHY_HAS_INTERRUPT
,
2180 .probe
= m88e1510_probe
,
2181 .config_init
= &marvell_config_init
,
2182 .config_aneg
= &m88e1510_config_aneg
,
2183 .read_status
= &marvell_read_status
,
2184 .ack_interrupt
= &marvell_ack_interrupt
,
2185 .config_intr
= &marvell_config_intr
,
2186 .did_interrupt
= &m88e1121_did_interrupt
,
2187 .resume
= &genphy_resume
,
2188 .suspend
= &genphy_suspend
,
2189 .get_sset_count
= marvell_get_sset_count
,
2190 .get_strings
= marvell_get_strings
,
2191 .get_stats
= marvell_get_stats
,
2194 .phy_id
= MARVELL_PHY_ID_88E1545
,
2195 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2196 .name
= "Marvell 88E1545",
2197 .probe
= m88e1510_probe
,
2198 .features
= PHY_GBIT_FEATURES
,
2199 .flags
= PHY_HAS_INTERRUPT
,
2200 .config_init
= &marvell_config_init
,
2201 .config_aneg
= &m88e1510_config_aneg
,
2202 .read_status
= &marvell_read_status
,
2203 .ack_interrupt
= &marvell_ack_interrupt
,
2204 .config_intr
= &marvell_config_intr
,
2205 .did_interrupt
= &m88e1121_did_interrupt
,
2206 .resume
= &genphy_resume
,
2207 .suspend
= &genphy_suspend
,
2208 .get_sset_count
= marvell_get_sset_count
,
2209 .get_strings
= marvell_get_strings
,
2210 .get_stats
= marvell_get_stats
,
2213 .phy_id
= MARVELL_PHY_ID_88E3016
,
2214 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2215 .name
= "Marvell 88E3016",
2216 .features
= PHY_BASIC_FEATURES
,
2217 .flags
= PHY_HAS_INTERRUPT
,
2218 .probe
= marvell_probe
,
2219 .config_aneg
= &genphy_config_aneg
,
2220 .config_init
= &m88e3016_config_init
,
2221 .aneg_done
= &marvell_aneg_done
,
2222 .read_status
= &marvell_read_status
,
2223 .ack_interrupt
= &marvell_ack_interrupt
,
2224 .config_intr
= &marvell_config_intr
,
2225 .did_interrupt
= &m88e1121_did_interrupt
,
2226 .resume
= &genphy_resume
,
2227 .suspend
= &genphy_suspend
,
2228 .get_sset_count
= marvell_get_sset_count
,
2229 .get_strings
= marvell_get_strings
,
2230 .get_stats
= marvell_get_stats
,
2233 .phy_id
= MARVELL_PHY_ID_88E6390
,
2234 .phy_id_mask
= MARVELL_PHY_ID_MASK
,
2235 .name
= "Marvell 88E6390",
2236 .features
= PHY_GBIT_FEATURES
,
2237 .flags
= PHY_HAS_INTERRUPT
,
2238 .probe
= m88e1510_probe
,
2239 .config_init
= &marvell_config_init
,
2240 .config_aneg
= &m88e1510_config_aneg
,
2241 .read_status
= &marvell_read_status
,
2242 .ack_interrupt
= &marvell_ack_interrupt
,
2243 .config_intr
= &marvell_config_intr
,
2244 .did_interrupt
= &m88e1121_did_interrupt
,
2245 .resume
= &genphy_resume
,
2246 .suspend
= &genphy_suspend
,
2247 .get_sset_count
= marvell_get_sset_count
,
2248 .get_strings
= marvell_get_strings
,
2249 .get_stats
= marvell_get_stats
,
2253 module_phy_driver(marvell_drivers
);
2255 static struct mdio_device_id __maybe_unused marvell_tbl
[] = {
2256 { MARVELL_PHY_ID_88E1101
, MARVELL_PHY_ID_MASK
},
2257 { MARVELL_PHY_ID_88E1112
, MARVELL_PHY_ID_MASK
},
2258 { MARVELL_PHY_ID_88E1111
, MARVELL_PHY_ID_MASK
},
2259 { MARVELL_PHY_ID_88E1118
, MARVELL_PHY_ID_MASK
},
2260 { MARVELL_PHY_ID_88E1121R
, MARVELL_PHY_ID_MASK
},
2261 { MARVELL_PHY_ID_88E1145
, MARVELL_PHY_ID_MASK
},
2262 { MARVELL_PHY_ID_88E1149R
, MARVELL_PHY_ID_MASK
},
2263 { MARVELL_PHY_ID_88E1240
, MARVELL_PHY_ID_MASK
},
2264 { MARVELL_PHY_ID_88E1318S
, MARVELL_PHY_ID_MASK
},
2265 { MARVELL_PHY_ID_88E1116R
, MARVELL_PHY_ID_MASK
},
2266 { MARVELL_PHY_ID_88E1510
, MARVELL_PHY_ID_MASK
},
2267 { MARVELL_PHY_ID_88E1540
, MARVELL_PHY_ID_MASK
},
2268 { MARVELL_PHY_ID_88E1545
, MARVELL_PHY_ID_MASK
},
2269 { MARVELL_PHY_ID_88E3016
, MARVELL_PHY_ID_MASK
},
2270 { MARVELL_PHY_ID_88E6390
, MARVELL_PHY_ID_MASK
},
2274 MODULE_DEVICE_TABLE(mdio
, marvell_tbl
);