drivers/clk/at91/at91sam9x5.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <linux/clk-provider.h>
   3 #include <linux/mfd/syscon.h>
   4 #include <linux/slab.h>
   5
   6 #include <dt-bindings/clock/at91.h>
   7
   8 #include "pmc.h"
   9
  10 static const struct clk_master_characteristics mck_characteristics = {
  11         .output = { .min = 0, .max = 133333333 },
  12         .divisors = { 1, 2, 4, 3 },
  13         .have_div3_pres = 1,
  14 };
  15
  16 static u8 plla_out[] = { 0, 1, 2, 3, 0, 1, 2, 3 };
  17
  18 static u16 plla_icpll[] = { 0, 0, 0, 0, 1, 1, 1, 1 };
  19
  20 static const struct clk_range plla_outputs[] = {
  21         { .min = 745000000, .max = 800000000 },
  22         { .min = 695000000, .max = 750000000 },
  23         { .min = 645000000, .max = 700000000 },
  24         { .min = 595000000, .max = 650000000 },
  25         { .min = 545000000, .max = 600000000 },
  26         { .min = 495000000, .max = 555000000 },
  27         { .min = 445000000, .max = 500000000 },
  28         { .min = 400000000, .max = 450000000 },
  29 };
  30
  31 static const struct clk_pll_characteristics plla_characteristics = {
  32         .input = { .min = 2000000, .max = 32000000 },
  33         .num_output = ARRAY_SIZE(plla_outputs),
  34         .output = plla_outputs,
  35         .icpll = plla_icpll,
  36         .out = plla_out,
  37 };
  38
  39 static const struct {
  40         char *n;
  41         char *p;
  42         u8 id;
  43 } at91sam9x5_systemck[] = {
  44         { .n = "ddrck", .p = "masterck", .id = 2 },
  45         { .n = "smdck", .p = "smdclk",   .id = 4 },
  46         { .n = "uhpck", .p = "usbck",    .id = 6 },
  47         { .n = "udpck", .p = "usbck",    .id = 7 },
  48         { .n = "pck0",  .p = "prog0",    .id = 8 },
  49         { .n = "pck1",  .p = "prog1",    .id = 9 },
  50 };
  51
  52 static const struct clk_pcr_layout at91sam9x5_pcr_layout = {
  53         .offset = 0x10c,
  54         .cmd = BIT(12),
  55         .pid_mask = GENMASK(5, 0),
  56         .div_mask = GENMASK(17, 16),
  57 };
  58
  59 struct pck {
  60         char *n;
  61         u8 id;
  62 };
  63
  64 static const struct pck at91sam9x5_periphck[] = {
  65         { .n = "pioAB_clk",  .id = 2, },
  66         { .n = "pioCD_clk",  .id = 3, },
  67         { .n = "smd_clk",    .id = 4, },
  68         { .n = "usart0_clk", .id = 5, },
  69         { .n = "usart1_clk", .id = 6, },
  70         { .n = "usart2_clk", .id = 7, },
  71         { .n = "twi0_clk",   .id = 9, },
  72         { .n = "twi1_clk",   .id = 10, },
  73         { .n = "twi2_clk",   .id = 11, },
  74         { .n = "mci0_clk",   .id = 12, },
  75         { .n = "spi0_clk",   .id = 13, },
  76         { .n = "spi1_clk",   .id = 14, },
  77         { .n = "uart0_clk",  .id = 15, },
  78         { .n = "uart1_clk",  .id = 16, },
  79         { .n = "tcb0_clk",   .id = 17, },
  80         { .n = "pwm_clk",    .id = 18, },
  81         { .n = "adc_clk",    .id = 19, },
  82         { .n = "dma0_clk",   .id = 20, },
  83         { .n = "dma1_clk",   .id = 21, },
  84         { .n = "uhphs_clk",  .id = 22, },
  85         { .n = "udphs_clk",  .id = 23, },
  86         { .n = "mci1_clk",   .id = 26, },
  87         { .n = "ssc0_clk",   .id = 28, },
  88 };
  89
  90 static const struct pck at91sam9g15_periphck[] = {
  91         { .n = "lcdc_clk", .id = 25, },
  92         { /* sentinel */}
  93 };
  94
  95 static const struct pck at91sam9g25_periphck[] = {
  96         { .n = "usart3_clk", .id = 8, },
  97         { .n = "macb0_clk", .id = 24, },
  98         { .n = "isi_clk", .id = 25, },
  99         { /* sentinel */}
 100 };
 101
 102 static const struct pck at91sam9g35_periphck[] = {
 103         { .n = "macb0_clk", .id = 24, },
 104         { .n = "lcdc_clk", .id = 25, },
 105         { /* sentinel */}
 106 };
 107
 108 static const struct pck at91sam9x25_periphck[] = {
 109         { .n = "usart3_clk", .id = 8, },
 110         { .n = "macb0_clk", .id = 24, },
 111         { .n = "macb1_clk", .id = 27, },
 112         { .n = "can0_clk", .id = 29, },
 113         { .n = "can1_clk", .id = 30, },
 114         { /* sentinel */}
 115 };
 116
 117 static const struct pck at91sam9x35_periphck[] = {
 118         { .n = "macb0_clk", .id = 24, },
 119         { .n = "lcdc_clk", .id = 25, },
 120         { .n = "can0_clk", .id = 29, },
 121         { .n = "can1_clk", .id = 30, },
 122         { /* sentinel */}
 123 };
 124
 125 static void __init at91sam9x5_pmc_setup(struct device_node *np,
 126                                         const struct pck *extra_pcks,
 127                                         bool has_lcdck)
 128 {
 129         struct clk_range range = CLK_RANGE(0, 0);
 130         const char *slck_name, *mainxtal_name;
 131         struct pmc_data *at91sam9x5_pmc;
 132         const char *parent_names[6];
 133         struct regmap *regmap;
 134         struct clk_hw *hw;
 135         int i;
 136         bool bypass;
 137
 138         i = of_property_match_string(np, "clock-names", "slow_clk");
 139         if (i < 0)
 140                 return;
 141
 142         slck_name = of_clk_get_parent_name(np, i);
 143
 144         i = of_property_match_string(np, "clock-names", "main_xtal");
 145         if (i < 0)
 146                 return;
 147         mainxtal_name = of_clk_get_parent_name(np, i);
 148
 149         regmap = syscon_node_to_regmap(np);
 150         if (IS_ERR(regmap))
 151                 return;
 152
 153         at91sam9x5_pmc = pmc_data_allocate(PMC_MAIN + 1,
 154                                            nck(at91sam9x5_systemck), 31, 0);
 155         if (!at91sam9x5_pmc)
 156                 return;
 157
 158         hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
 159                                            50000000);
 160         if (IS_ERR(hw))
 161                 goto err_free;
 162
 163         bypass = of_property_read_bool(np, "atmel,osc-bypass");
 164
 165         hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name,
 166                                         bypass);
 167         if (IS_ERR(hw))
 168                 goto err_free;
 169
 170         parent_names[0] = "main_rc_osc";
 171         parent_names[1] = "main_osc";
 172         hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, 2);
 173         if (IS_ERR(hw))
 174                 goto err_free;
 175
 176         at91sam9x5_pmc->chws[PMC_MAIN] = hw;
 177
 178         hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
 179                                    &at91rm9200_pll_layout, &plla_characteristics);
 180         if (IS_ERR(hw))
 181                 goto err_free;
 182
 183         hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
 184         if (IS_ERR(hw))
 185                 goto err_free;
 186
 187         hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck");
 188         if (IS_ERR(hw))
 189                 goto err_free;
 190
 191         at91sam9x5_pmc->chws[PMC_UTMI] = hw;
 192
 193         parent_names[0] = slck_name;
 194         parent_names[1] = "mainck";
 195         parent_names[2] = "plladivck";
 196         parent_names[3] = "utmick";
 197         hw = at91_clk_register_master(regmap, "masterck", 4, parent_names,
 198                                       &at91sam9x5_master_layout,
 199                                       &mck_characteristics);
 200         if (IS_ERR(hw))
 201                 goto err_free;
 202
 203         at91sam9x5_pmc->chws[PMC_MCK] = hw;
 204
 205         parent_names[0] = "plladivck";
 206         parent_names[1] = "utmick";
 207         hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, 2);
 208         if (IS_ERR(hw))
 209                 goto err_free;
 210
 211         hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, 2);
 212         if (IS_ERR(hw))
 213                 goto err_free;
 214
 215         parent_names[0] = slck_name;
 216         parent_names[1] = "mainck";
 217         parent_names[2] = "plladivck";
 218         parent_names[3] = "utmick";
 219         parent_names[4] = "masterck";
 220         for (i = 0; i < 2; i++) {
 221                 char name[6];
 222
 223                 snprintf(name, sizeof(name), "prog%d", i);
 224
 225                 hw = at91_clk_register_programmable(regmap, name,
 226                                                     parent_names, 5, i,
 227                                                     &at91sam9x5_programmable_layout);
 228                 if (IS_ERR(hw))
 229                         goto err_free;
 230         }
 231
 232         for (i = 0; i < ARRAY_SIZE(at91sam9x5_systemck); i++) {
 233                 hw = at91_clk_register_system(regmap, at91sam9x5_systemck[i].n,
 234                                               at91sam9x5_systemck[i].p,
 235                                               at91sam9x5_systemck[i].id);
 236                 if (IS_ERR(hw))
 237                         goto err_free;
 238
 239                 at91sam9x5_pmc->shws[at91sam9x5_systemck[i].id] = hw;
 240         }
 241
 242         if (has_lcdck) {
 243                 hw = at91_clk_register_system(regmap, "lcdck", "masterck", 3);
 244                 if (IS_ERR(hw))
 245                         goto err_free;
 246
 247                 at91sam9x5_pmc->shws[3] = hw;
 248         }
 249
 250         for (i = 0; i < ARRAY_SIZE(at91sam9x5_periphck); i++) {
 251                 hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
 252                                                          &at91sam9x5_pcr_layout,
 253                                                          at91sam9x5_periphck[i].n,
 254                                                          "masterck",
 255                                                          at91sam9x5_periphck[i].id,
 256                                                          &range);
 257                 if (IS_ERR(hw))
 258                         goto err_free;
 259
 260                 at91sam9x5_pmc->phws[at91sam9x5_periphck[i].id] = hw;
 261         }
 262
 263         for (i = 0; extra_pcks[i].id; i++) {
 264                 hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
 265                                                          &at91sam9x5_pcr_layout,
 266                                                          extra_pcks[i].n,
 267                                                          "masterck",
 268                                                          extra_pcks[i].id,
 269                                                          &range);
 270                 if (IS_ERR(hw))
 271                         goto err_free;
 272
 273                 at91sam9x5_pmc->phws[extra_pcks[i].id] = hw;
 274         }
 275
 276         of_clk_add_hw_provider(np, of_clk_hw_pmc_get, at91sam9x5_pmc);
 277
 278         return;
 279
 280 err_free:
 281         pmc_data_free(at91sam9x5_pmc);
 282 }
 283
 284 static void __init at91sam9g15_pmc_setup(struct device_node *np)
 285 {
 286         at91sam9x5_pmc_setup(np, at91sam9g15_periphck, true);
 287 }
 288 CLK_OF_DECLARE_DRIVER(at91sam9g15_pmc, "atmel,at91sam9g15-pmc",
 289                       at91sam9g15_pmc_setup);
 290
 291 static void __init at91sam9g25_pmc_setup(struct device_node *np)
 292 {
 293         at91sam9x5_pmc_setup(np, at91sam9g25_periphck, false);
 294 }
 295 CLK_OF_DECLARE_DRIVER(at91sam9g25_pmc, "atmel,at91sam9g25-pmc",
 296                       at91sam9g25_pmc_setup);
 297
 298 static void __init at91sam9g35_pmc_setup(struct device_node *np)
 299 {
 300         at91sam9x5_pmc_setup(np, at91sam9g35_periphck, true);
 301 }
 302 CLK_OF_DECLARE_DRIVER(at91sam9g35_pmc, "atmel,at91sam9g35-pmc",
 303                       at91sam9g35_pmc_setup);
 304
 305 static void __init at91sam9x25_pmc_setup(struct device_node *np)
 306 {
 307         at91sam9x5_pmc_setup(np, at91sam9x25_periphck, false);
 308 }
 309 CLK_OF_DECLARE_DRIVER(at91sam9x25_pmc, "atmel,at91sam9x25-pmc",
 310                       at91sam9x25_pmc_setup);
 311
 312 static void __init at91sam9x35_pmc_setup(struct device_node *np)
 313 {
 314         at91sam9x5_pmc_setup(np, at91sam9x35_periphck, true);
 315 }
 316 CLK_OF_DECLARE_DRIVER(at91sam9x35_pmc, "atmel,at91sam9x35-pmc",
 317                       at91sam9x35_pmc_setup);