2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 - 2000, 2001, 2003 Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc.
12 #include <asm/asmmacro.h>
13 #include <asm/compiler.h>
14 #include <asm/regdef.h>
15 #include <asm/mipsregs.h>
16 #include <asm/stackframe.h>
17 #include <asm/isadep.h>
18 #include <asm/thread_info.h>
21 #ifndef CONFIG_PREEMPT
22 #define resume_kernel restore_all
24 #define __ret_from_irq ret_from_exception
29 #ifndef CONFIG_PREEMPT
30 FEXPORT(ret_from_exception)
31 local_irq_disable # preempt stop
35 LONG_S s0, TI_REGS($28)
36 FEXPORT(__ret_from_irq)
38 * We can be coming here from a syscall done in the kernel space,
39 * e.g. a failed kernel_execve().
41 resume_userspace_check:
42 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
44 beqz t0, resume_kernel
47 local_irq_disable # make sure we dont miss an
48 # interrupt setting need_resched
49 # between sampling and return
50 #ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
51 lw k0, TI_R2_EMUL_RET($28)
52 bnez k0, restore_all_from_r2_emul
55 LONG_L a2, TI_FLAGS($28) # current->work
56 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
63 lw t0, TI_PRE_COUNT($28)
66 LONG_L t0, TI_FLAGS($28)
67 andi t1, t0, _TIF_NEED_RESCHED
69 LONG_L t0, PT_STATUS(sp) # Interrupts off?
72 jal preempt_schedule_irq
76 FEXPORT(ret_from_kernel_thread)
77 jal schedule_tail # a0 = struct task_struct *prev
82 FEXPORT(ret_from_fork)
83 jal schedule_tail # a0 = struct task_struct *prev
86 local_irq_disable # make sure need_resched and
87 # signals dont change between
89 LONG_L a2, TI_FLAGS($28) # current->work
90 li t0, _TIF_ALLWORK_MASK
92 bnez t0, syscall_exit_work
94 restore_all: # restore full frame
99 restore_partial: # restore partial frame
100 #ifdef CONFIG_TRACE_IRQFLAGS
104 LONG_L v0, PT_STATUS(sp)
105 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
111 jal trace_hardirqs_on
113 1: jal trace_hardirqs_off
123 #ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
124 restore_all_from_r2_emul: # restore full frame
126 sw zero, TI_R2_EMUL_RET($28) # reset it
131 LONG_L sp, PT_R29(sp)
137 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
138 beqz t0, work_notifysig
142 local_irq_disable # make sure need_resched and
143 # signals dont change between
144 # sampling and return
145 LONG_L a2, TI_FLAGS($28)
146 andi t0, a2, _TIF_WORK_MASK # is there any work to be done
147 # other than syscall tracing?
149 andi t0, a2, _TIF_NEED_RESCHED
150 bnez t0, work_resched
152 work_notifysig: # deal with pending signals and
153 # notify-resume requests
156 jal do_notify_resume # a2 already loaded
157 j resume_userspace_check
159 FEXPORT(syscall_exit_partial)
160 local_irq_disable # make sure need_resched doesn't
161 # change between and return
162 LONG_L a2, TI_FLAGS($28) # current->work
163 li t0, _TIF_ALLWORK_MASK
165 beqz t0, restore_partial
168 LONG_L t0, PT_STATUS(sp) # returning to kernel mode?
170 beqz t0, resume_kernel
171 li t0, _TIF_WORK_SYSCALL_EXIT
172 and t0, a2 # a2 is preloaded with TI_FLAGS
173 beqz t0, work_pending # trace bit set?
174 local_irq_enable # could let syscall_trace_leave()
175 # call schedule() instead
177 jal syscall_trace_leave
180 #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) || \
181 defined(CONFIG_MIPS_MT)
184 * MIPS32R2 Instruction Hazard Barrier - must be called
186 * For C code use the inline version named instruction_hazard().
189 .set MIPS_ISA_LEVEL_RAW
194 #endif /* CONFIG_CPU_MIPSR2 or CONFIG_CPU_MIPSR6 or CONFIG_MIPS_MT */