1 ROCKCHIP USB2.0 PHY WITH INNO IP BLOCK
3 Required properties (phy (parent) node):
4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-usb2phy"
6 * "rockchip,rk3328-usb2phy"
7 * "rockchip,rk3366-usb2phy"
8 * "rockchip,rk3399-usb2phy"
9 * "rockchip,rv1108-usb2phy"
10 - reg : the address offset of grf for usb-phy configuration.
11 - #clock-cells : should be 0.
12 - clock-output-names : specify the 480m output clock name.
15 - clocks : phandle + phy specifier pair, for the input clock of phy.
16 - clock-names : input clock name of phy, must be "phyclk".
17 - assigned-clocks : phandle of usb 480m clock.
18 - assigned-clock-parents : parent of usb 480m clock, select between
19 usb-phy output 480m and xin24m.
20 Refer to clk/clock-bindings.txt for generic clock
22 - rockchip,usbgrf : phandle to the syscon managing the "usb general
23 register files". When set driver will request its
24 phandle as one companion-grf for some special SoCs
27 Required nodes : a sub-node is required for each port the phy provides.
28 The sub-node name is used to identify host or otg port,
29 and shall be the following entries:
30 * "otg-port" : the name of otg port.
31 * "host-port" : the name of host port.
33 Required properties (port (child) node):
34 - #phy-cells : must be 0. See ./phy-bindings.txt for details.
35 - interrupts : specify an interrupt for each entry in interrupt-names.
36 - interrupt-names : a list which should be one of the following cases:
38 * "otg-id" : for the otg id interrupt.
39 * "otg-bvalid" : for the otg vbus interrupt.
40 * "linestate" : for the host/otg linestate interrupt.
41 Some SoCs use one interrupt with the above muxed together, so for these
42 * "otg-mux" : otg-port interrupt, which mux otg-id/otg-bvalid/linestate
46 - phy-supply : phandle to a regulator that provides power to VBUS.
47 See ./phy-bindings.txt for details.
51 grf: syscon@ff770000 {
52 compatible = "rockchip,rk3366-grf", "syscon", "simple-mfd";
59 compatible = "rockchip,rk3366-usb2phy";
62 clock-output-names = "sclk_otgphy0_480m";
66 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
67 <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
68 <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
69 interrupt-names = "otg-id", "otg-bvalid", "linestate";
72 u2phy_host: host-port {
74 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
75 interrupt-names = "linestate";