arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14
  15 / {
  16         chosen {
  17                 stdout-path = &uart2;
  18         };
  19
  20         memory {
  21                 reg = <0x10000000 0x40000000>;
  22         };
  23
  24         regulators {
  25                 compatible = "simple-bus";
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 reg_2p5v: regulator@0 {
  30                         compatible = "regulator-fixed";
  31                         reg = <0>;
  32                         regulator-name = "2P5V";
  33                         regulator-min-microvolt = <2500000>;
  34                         regulator-max-microvolt = <2500000>;
  35                         regulator-always-on;
  36                 };
  37
  38                 reg_3p3v: regulator@1 {
  39                         compatible = "regulator-fixed";
  40                         reg = <1>;
  41                         regulator-name = "3P3V";
  42                         regulator-min-microvolt = <3300000>;
  43                         regulator-max-microvolt = <3300000>;
  44                         regulator-always-on;
  45                 };
  46
  47                 reg_usb_otg_vbus: regulator@2 {
  48                         compatible = "regulator-fixed";
  49                         reg = <2>;
  50                         regulator-name = "usb_otg_vbus";
  51                         regulator-min-microvolt = <5000000>;
  52                         regulator-max-microvolt = <5000000>;
  53                         gpio = <&gpio3 22 0>;
  54                         enable-active-high;
  55                 };
  56
  57                 reg_can_xcvr: regulator@3 {
  58                         compatible = "regulator-fixed";
  59                         reg = <3>;
  60                         regulator-name = "CAN XCVR";
  61                         regulator-min-microvolt = <3300000>;
  62                         regulator-max-microvolt = <3300000>;
  63                         pinctrl-names = "default";
  64                         pinctrl-0 = <&pinctrl_can_xcvr>;
  65                         gpio = <&gpio1 2 GPIO_ACTIVE_LOW>;
  66                 };
  67         };
  68
  69         gpio-keys {
  70                 compatible = "gpio-keys";
  71                 pinctrl-names = "default";
  72                 pinctrl-0 = <&pinctrl_gpio_keys>;
  73
  74                 power {
  75                         label = "Power Button";
  76                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  77                         linux,code = <KEY_POWER>;
  78                         gpio-key,wakeup;
  79                 };
  80
  81                 menu {
  82                         label = "Menu";
  83                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  84                         linux,code = <KEY_MENU>;
  85                 };
  86
  87                 home {
  88                         label = "Home";
  89                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  90                         linux,code = <KEY_HOME>;
  91                 };
  92
  93                 back {
  94                         label = "Back";
  95                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  96                         linux,code = <KEY_BACK>;
  97                 };
  98
  99                 volume-up {
 100                         label = "Volume Up";
 101                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
 102                         linux,code = <KEY_VOLUMEUP>;
 103                 };
 104
 105                 volume-down {
 106                         label = "Volume Down";
 107                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
 108                         linux,code = <KEY_VOLUMEDOWN>;
 109                 };
 110         };
 111
 112         sound {
 113                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 114                              "fsl,imx-audio-sgtl5000";
 115                 model = "imx6q-sabrelite-sgtl5000";
 116                 ssi-controller = <&ssi1>;
 117                 audio-codec = <&codec>;
 118                 audio-routing =
 119                         "MIC_IN", "Mic Jack",
 120                         "Mic Jack", "Mic Bias",
 121                         "Headphone Jack", "HP_OUT";
 122                 mux-int-port = <1>;
 123                 mux-ext-port = <4>;
 124         };
 125
 126         backlight_lcd {
 127                 compatible = "pwm-backlight";
 128                 pwms = <&pwm1 0 5000000>;
 129                 brightness-levels = <0 4 8 16 32 64 128 255>;
 130                 default-brightness-level = <7>;
 131                 power-supply = <&reg_3p3v>;
 132                 status = "okay";
 133         };
 134
 135         backlight_lvds: backlight_lvds {
 136                 compatible = "pwm-backlight";
 137                 pwms = <&pwm4 0 5000000>;
 138                 brightness-levels = <0 4 8 16 32 64 128 255>;
 139                 default-brightness-level = <7>;
 140                 power-supply = <&reg_3p3v>;
 141                 status = "okay";
 142         };
 143
 144         panel {
 145                 compatible = "hannstar,hsd100pxn1";
 146                 backlight = <&backlight_lvds>;
 147
 148                 port {
 149                         panel_in: endpoint {
 150                                 remote-endpoint = <&lvds0_out>;
 151                         };
 152                 };
 153         };
 154 };
 155
 156 &audmux {
 157         pinctrl-names = "default";
 158         pinctrl-0 = <&pinctrl_audmux>;
 159         status = "okay";
 160 };
 161
 162 &can1 {
 163         pinctrl-names = "default";
 164         pinctrl-0 = <&pinctrl_can1>;
 165         xceiver-supply = <&reg_can_xcvr>;
 166         status = "okay";
 167 };
 168
 169 &clks {
 170         assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
 171                           <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
 172         assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
 173                                  <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
 174 };
 175
 176 &ecspi1 {
 177         fsl,spi-num-chipselects = <1>;
 178         cs-gpios = <&gpio3 19 0>;
 179         pinctrl-names = "default";
 180         pinctrl-0 = <&pinctrl_ecspi1>;
 181         status = "okay";
 182
 183         flash: m25p80@0 {
 184                 compatible = "sst,sst25vf016b", "jedec,spi-nor";
 185                 spi-max-frequency = <20000000>;
 186                 reg = <0>;
 187         };
 188 };
 189
 190 &fec {
 191         pinctrl-names = "default";
 192         pinctrl-0 = <&pinctrl_enet>;
 193         phy-mode = "rgmii";
 194         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 195         txen-skew-ps = <0>;
 196         txc-skew-ps = <3000>;
 197         rxdv-skew-ps = <0>;
 198         rxc-skew-ps = <3000>;
 199         rxd0-skew-ps = <0>;
 200         rxd1-skew-ps = <0>;
 201         rxd2-skew-ps = <0>;
 202         rxd3-skew-ps = <0>;
 203         txd0-skew-ps = <0>;
 204         txd1-skew-ps = <0>;
 205         txd2-skew-ps = <0>;
 206         txd3-skew-ps = <0>;
 207         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 208                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 209         status = "okay";
 210 };
 211
 212 &hdmi {
 213         ddc-i2c-bus = <&i2c2>;
 214         status = "okay";
 215 };
 216
 217 &i2c1 {
 218         clock-frequency = <100000>;
 219         pinctrl-names = "default";
 220         pinctrl-0 = <&pinctrl_i2c1>;
 221         status = "okay";
 222
 223         codec: sgtl5000@0a {
 224                 compatible = "fsl,sgtl5000";
 225                 reg = <0x0a>;
 226                 clocks = <&clks 201>;
 227                 VDDA-supply = <&reg_2p5v>;
 228                 VDDIO-supply = <&reg_3p3v>;
 229         };
 230 };
 231
 232 &i2c2 {
 233         clock-frequency = <100000>;
 234         pinctrl-names = "default";
 235         pinctrl-0 = <&pinctrl_i2c2>;
 236         status = "okay";
 237 };
 238
 239 &i2c3 {
 240         clock-frequency = <100000>;
 241         pinctrl-names = "default";
 242         pinctrl-0 = <&pinctrl_i2c3>;
 243         status = "okay";
 244 };
 245
 246 &iomuxc {
 247         pinctrl-names = "default";
 248         pinctrl-0 = <&pinctrl_hog>;
 249
 250         imx6q-sabrelite {
 251                 pinctrl_hog: hoggrp {
 252                         fsl,pins = <
 253                                 /* SGTL5000 sys_mclk */
 254                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 255                         >;
 256                 };
 257
 258                 pinctrl_audmux: audmuxgrp {
 259                         fsl,pins = <
 260                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 261                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 262                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 263                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 264                         >;
 265                 };
 266
 267                 pinctrl_can1: can1grp {
 268                         fsl,pins = <
 269                                 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX        0x1b0b0
 270                                 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX        0x1b0b0
 271                         >;
 272                 };
 273
 274                 pinctrl_can_xcvr: can-xcvrgrp {
 275                         fsl,pins = <
 276                                 /* Flexcan XCVR enable */
 277                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x1b0b0
 278                         >;
 279                 };
 280
 281                 pinctrl_ecspi1: ecspi1grp {
 282                         fsl,pins = <
 283                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 284                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 285                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 286                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 287                         >;
 288                 };
 289
 290                 pinctrl_enet: enetgrp {
 291                         fsl,pins = <
 292                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 293                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 294                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
 295                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
 296                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
 297                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
 298                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
 299                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
 300                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 301                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 302                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 303                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 304                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 305                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 306                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 307                                 /* Phy reset */
 308                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
 309                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 310                         >;
 311                 };
 312
 313                 pinctrl_gpio_keys: gpio_keysgrp {
 314                         fsl,pins = <
 315                                 /* Power Button */
 316                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 317                                 /* Menu Button */
 318                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 319                                 /* Home Button */
 320                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 321                                 /* Back Button */
 322                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 323                                 /* Volume Up Button */
 324                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 325                                 /* Volume Down Button */
 326                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 327                         >;
 328                 };
 329
 330                 pinctrl_i2c1: i2c1grp {
 331                         fsl,pins = <
 332                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 333                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 334                         >;
 335                 };
 336
 337                 pinctrl_i2c2: i2c2grp {
 338                         fsl,pins = <
 339                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 340                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 341                         >;
 342                 };
 343
 344                 pinctrl_i2c3: i2c3grp {
 345                         fsl,pins = <
 346                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 347                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 348                         >;
 349                 };
 350
 351                 pinctrl_pwm1: pwm1grp {
 352                         fsl,pins = <
 353                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 354                         >;
 355                 };
 356
 357                 pinctrl_pwm3: pwm3grp {
 358                         fsl,pins = <
 359                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 360                         >;
 361                 };
 362
 363                 pinctrl_pwm4: pwm4grp {
 364                         fsl,pins = <
 365                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 366                         >;
 367                 };
 368
 369                 pinctrl_uart1: uart1grp {
 370                         fsl,pins = <
 371                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 372                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 373                         >;
 374                 };
 375
 376                 pinctrl_uart2: uart2grp {
 377                         fsl,pins = <
 378                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 379                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 380                         >;
 381                 };
 382
 383                 pinctrl_usbotg: usbotggrp {
 384                         fsl,pins = <
 385                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 386                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 387                                 /* power enable, high active */
 388                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 389                         >;
 390                 };
 391
 392                 pinctrl_usdhc3: usdhc3grp {
 393                         fsl,pins = <
 394                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 395                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 396                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 397                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 398                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 399                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 400                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 401                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
 402                         >;
 403                 };
 404
 405                 pinctrl_usdhc4: usdhc4grp {
 406                         fsl,pins = <
 407                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 408                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 409                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 410                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 411                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 412                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 413                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 414                         >;
 415                 };
 416         };
 417 };
 418
 419 &ldb {
 420         status = "okay";
 421
 422         lvds-channel@0 {
 423                 fsl,data-mapping = "spwg";
 424                 fsl,data-width = <18>;
 425                 status = "okay";
 426
 427                 port@4 {
 428                         reg = <4>;
 429
 430                         lvds0_out: endpoint {
 431                                 remote-endpoint = <&panel_in>;
 432                         };
 433                 };
 434         };
 435 };
 436
 437 &pcie {
 438         status = "okay";
 439 };
 440
 441 &pwm1 {
 442         pinctrl-names = "default";
 443         pinctrl-0 = <&pinctrl_pwm1>;
 444         status = "okay";
 445 };
 446
 447 &pwm3 {
 448         pinctrl-names = "default";
 449         pinctrl-0 = <&pinctrl_pwm3>;
 450         status = "okay";
 451 };
 452
 453 &pwm4 {
 454         pinctrl-names = "default";
 455         pinctrl-0 = <&pinctrl_pwm4>;
 456         status = "okay";
 457 };
 458
 459 &ssi1 {
 460         status = "okay";
 461 };
 462
 463 &uart1 {
 464         pinctrl-names = "default";
 465         pinctrl-0 = <&pinctrl_uart1>;
 466         status = "okay";
 467 };
 468
 469 &uart2 {
 470         pinctrl-names = "default";
 471         pinctrl-0 = <&pinctrl_uart2>;
 472         status = "okay";
 473 };
 474
 475 &usbh1 {
 476         status = "okay";
 477 };
 478
 479 &usbotg {
 480         vbus-supply = <&reg_usb_otg_vbus>;
 481         pinctrl-names = "default";
 482         pinctrl-0 = <&pinctrl_usbotg>;
 483         disable-over-current;
 484         status = "okay";
 485 };
 486
 487 &usdhc3 {
 488         pinctrl-names = "default";
 489         pinctrl-0 = <&pinctrl_usdhc3>;
 490         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 491         wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
 492         vmmc-supply = <&reg_3p3v>;
 493         status = "okay";
 494 };
 495
 496 &usdhc4 {
 497         pinctrl-names = "default";
 498         pinctrl-0 = <&pinctrl_usdhc4>;
 499         cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
 500         vmmc-supply = <&reg_3p3v>;
 501         status = "okay";
 502 };